Pass floating point constant moves to integer registers

as mov immediates for Thumb1.


2009-12-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

        PR target/40670
        * config/arm/arm.md: Split for Thumb1 as well.

        * gcc.target/arm/pr40670.c: New test.

From-SVN: r155427

gcc/ChangeLog

+2009-12-23  Ramana Radhakrishnan  <ramrad01@arm.com>
+
+	PR target/40670
+	* config/arm/arm.md: Split for Thumb1 as well.
+
 2009-12-22  Cary Coutant  <ccoutant@google.com>
 
 	PR debug/42454

gcc/config/arm/arm.md

@@ -6073,7 +6073,7 @@
 (define_split
   [(set (match_operand:SF 0 "arm_general_register_operand" "")
 	(match_operand:SF 1 "immediate_operand" ""))]
-  "TARGET_32BIT
+  "TARGET_EITHER
    && reload_completed
    && GET_CODE (operands[1]) == CONST_DOUBLE"
   [(set (match_dup 2) (match_dup 3))]

gcc/testsuite/ChangeLog

+2009-12-23  Ramana Radhakrishnan  <ramrad01@arm.com>
+
+	PR target/40670
+	* gcc.target/arm/pr40670.c: New test.
+	
 2009-12-23  Uros Bizjak  <ubizjak@gmail.com>
 
 	* gcc.target/alpha/20000715-1.c: Remove target selector.

gcc/testsuite/gcc.target/arm/pr40670.c

+/* { dg-options "-mthumb -O2" }  */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-final { scan-assembler-not "ldr" } } */
+
+float foo (void)
+{
+  return 2.0;
+}