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riscv-gcc-1
Commit 06ed4795 by Richard Sandiford Committed by Richard Sandiford
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* config/pdp11/pdp11.h (target_flags, TARGET_SWITCHES, TARGET_DEFAULT) 

	(TARGET_FPU, TARGET_SOFT_FLOAT, TARGET_AC0, TARGET_NO_AC0, TARGET_45)
	(TARGET_BCOPY_BUILTIN, TARGET_INT16, TARGET_INT32, TARGET_FLOAT32)
	(TARGET_FLOAT64, TARGET_ABSHI_BUILTIN, TARGET_BRANCH_EXPENSIVE)
	(TARGET_BRANCH_CHEAP, TARGET_SPLIT, TARGET_NOSPLIT)
	(TARGET_UNIX_ASM): Delete.
	(TARGET_40_PLUS): Redefine in terms of TARGET_40 and TARGET_45.
	* config/pdp11/2bsd.h (TARGET_UNIX_ASM_DEFAULT): Use MASK_UNIX_ASM.
	* config/pdp11/pdp11.c (pdp11_handle_option): New function.
	(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
	* config/pdp11/pdp11.opt: New file.

From-SVN: r97525
parent 283da5df
Showing with 132 additions and 84 deletions
gcc/ChangeLog
2005-04-04 Richard Sandiford <rsandifo@redhat.com>
* config/pdp11/pdp11.h (target_flags, TARGET_SWITCHES, TARGET_DEFAULT)
(TARGET_FPU, TARGET_SOFT_FLOAT, TARGET_AC0, TARGET_NO_AC0, TARGET_45)
(TARGET_BCOPY_BUILTIN, TARGET_INT16, TARGET_INT32, TARGET_FLOAT32)
(TARGET_FLOAT64, TARGET_ABSHI_BUILTIN, TARGET_BRANCH_EXPENSIVE)
(TARGET_BRANCH_CHEAP, TARGET_SPLIT, TARGET_NOSPLIT)
(TARGET_UNIX_ASM): Delete.
(TARGET_40_PLUS): Redefine in terms of TARGET_40 and TARGET_45.
* config/pdp11/2bsd.h (TARGET_UNIX_ASM_DEFAULT): Use MASK_UNIX_ASM.
* config/pdp11/pdp11.c (pdp11_handle_option): New function.
(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
* config/pdp11/pdp11.opt: New file.
2005-04-03 Roger Sayle <roger@eyesopen.com>
Alexandre Oliva <aoliva@redhat.com>
......
gcc/config/pdp11/2bsd.h
......@@ -63,4 +63,4 @@ fprintf (STREAM, "~~%s:\n", NAME); \
} while (0)
#undef TARGET_UNIX_ASM_DEFAULT
#define TARGET_UNIX_ASM_DEFAULT 2048
#define TARGET_UNIX_ASM_DEFAULT MASK_UNIX_ASM
gcc/config/pdp11/pdp11.c
......@@ -138,6 +138,7 @@ decode_pdp11_d (const struct real_format *fmt ATTRIBUTE_UNUSED,
/* This is where the condition code register lives. */
/* rtx cc0_reg_rtx; - no longer needed? */
static bool pdp11_handle_option (size_t, const char *, int);
static rtx find_addr_reg (rtx);
static const char *singlemove_string (rtx *);
static bool pdp11_assemble_integer (rtx, unsigned int, int);
......@@ -166,6 +167,12 @@ static bool pdp11_return_in_memory (tree, tree);
#undef TARGET_ASM_CLOSE_PAREN
#define TARGET_ASM_CLOSE_PAREN "]"
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS \
(MASK_FPU | MASK_45 | MASK_ABSHI_BUILTIN | TARGET_UNIX_ASM_DEFAULT)
#undef TARGET_HANDLE_OPTION
#define TARGET_HANDLE_OPTION pdp11_handle_option
#undef TARGET_RTX_COSTS
#define TARGET_RTX_COSTS pdp11_rtx_costs
......@@ -174,6 +181,23 @@ static bool pdp11_return_in_memory (tree, tree);
struct gcc_target targetm = TARGET_INITIALIZER;
/* Implement TARGET_HANDLE_OPTION. */
static bool
pdp11_handle_option (size_t code, const char *arg ATTRIBUTE_UNUSED,
int value ATTRIBUTE_UNUSED)
{
switch (code)
{
case OPT_m10:
target_flags &= ~(MASK_40 | MASK_45);
return true;
default:
return true;
}
}
/* Nonzero if OP is a valid second operand for an arithmetic insn. */
int
......
gcc/config/pdp11/pdp11.h
......@@ -45,91 +45,9 @@ Boston, MA 02111-1307, USA. */
/* #define DBX_DEBUGGING_INFO */
/* Run-time compilation parameters selecting different hardware subsets.
*/
extern int target_flags;
/* Macro to define tables used to set the flags.
This is a list in braces of triplets in braces,
each triplet being { "NAME", VALUE, DOC }
where VALUE is the bits to set or minus the bits to clear and DOC
is the documentation for --help (NULL if intentionally undocumented).
An empty string NAME is used to identify the default VALUE. */
#define TARGET_SWITCHES \
{ { "fpu", 1, N_("Use hardware floating point") }, \
{ "soft-float", -1, N_("Do not use hardware floating point") }, \
/* return float result in ac0 */ \
{ "ac0", 2, N_("Return floating point results in ac0") }, \
{ "no-ac0", -2, N_("Return floating point results in memory") }, \
/* is 11/40 */ \
{ "40", 4, N_("Generate code for an 11/40") }, \
{ "no-40", -4, "" }, \
/* is 11/45 */ \
{ "45", 8, N_("Generate code for an 11/45") }, \
{ "no-45", -8, "" }, \
/* is 11/10 */ \
{ "10", -12, N_("Generate code for an 11/10") }, \
/* use movmemhi for bcopy */ \
{ "bcopy", 16, NULL }, \
{ "bcopy-builtin", -16, NULL }, \
/* use 32 bit for int */ \
{ "int32", 32, N_("Use 32 bit int") }, \
{ "no-int16", 32, N_("Use 32 bit int") }, \
{ "int16", -32, N_("Use 16 bit int") }, \
{ "no-int32", -32, N_("Use 16 bit int") }, \
/* use 32 bit for float */ \
{ "float32", 64, N_("Use 32 bit float") }, \
{ "no-float64", 64, N_("Use 32 bit float") }, \
{ "float64", -64, N_("Use 64 bit float") }, \
{ "no-float32", -64, N_("Use 64 bit float") }, \
/* allow abshi pattern? - can trigger "optimizations" which make code SLOW! */\
{ "abshi", 128, NULL }, \
{ "no-abshi", -128, NULL }, \
/* is branching expensive - on a PDP, it's actually really cheap */ \
/* this is just to play around and check what code gcc generates */ \
{ "branch-expensive", 256, NULL }, \
{ "branch-cheap", -256, NULL }, \
/* split instruction and data memory? */ \
{ "split", 1024, N_("Target has split I&D") }, \
{ "no-split", -1024, N_("Target does not have split I&D") }, \
/* UNIX assembler syntax? */ \
{ "unix-asm", 2048, N_("Use UNIX assembler syntax") }, \
{ "dec-asm", -2048, N_("Use DEC assembler syntax") }, \
/* default */ \
{ "", TARGET_DEFAULT, NULL} \
}
#define TARGET_DEFAULT (1 | 8 | 128 | TARGET_UNIX_ASM_DEFAULT)
#define TARGET_FPU (target_flags & 1)
#define TARGET_SOFT_FLOAT (!TARGET_FPU)
#define TARGET_AC0 ((target_flags & 2) && TARGET_FPU)
#define TARGET_NO_AC0 (! TARGET_AC0)
#define TARGET_45 (target_flags & 8)
#define TARGET_40_PLUS ((target_flags & 4) || (target_flags & 8))
#define TARGET_40_PLUS (TARGET_40 || TARGET_45)
#define TARGET_10 (! TARGET_40_PLUS)
#define TARGET_BCOPY_BUILTIN (! (target_flags & 16))
#define TARGET_INT16 (! TARGET_INT32)
#define TARGET_INT32 (target_flags & 32)
#define TARGET_FLOAT32 (target_flags & 64)
#define TARGET_FLOAT64 (! TARGET_FLOAT32)
#define TARGET_ABSHI_BUILTIN (target_flags & 128)
#define TARGET_BRANCH_EXPENSIVE (target_flags & 256)
#define TARGET_BRANCH_CHEAP (!TARGET_BRANCH_EXPENSIVE)
#define TARGET_SPLIT (target_flags & 1024)
#define TARGET_NOSPLIT (! TARGET_SPLIT)
#define TARGET_UNIX_ASM (target_flags & 2048)
#define TARGET_UNIX_ASM_DEFAULT 0
#define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
......
gcc/config/pdp11/pdp11.opt 0 → 100644
; Options for the PDP11 port of the compiler.
; Copyright (C) 2005 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
; 02111-1307, USA.
m10
Target RejectNegative
Generate code for an 11/10
m40
Target Report Mask(40)
Generate code for an 11/40
m45
Target Report Mask(45)
Generate code for an 11/45
mabshi
Target Report Mask(ABSHI_BUILTIN)
Use 16-bit abs patterns
mac0
Target Report Mask(AC0)
Return floating-point results in ac0 (fr0 in Unix assembler syntax)
mbcopy
Target RejectNegative Report Mask(BCOPY)
Do not use inline patterns for copying memory
mbcopy-builtin
Target RejectNegative Report InverseMask(BCOPY, BCOPY_BUILTIN)
Use inline patterns for copying memory
mbranch-cheap
Target RejectNegative Report InverseMask(BRANCH_EXPENSIVE, BRANCH_CHEAP)
Do not pretend that branches are expensive
mbranch-expensive
Target RejectNegative Report Mask(BRANCH_EXPENSIVE)
Pretend that branches are expensive
mdec-asm
Target RejectNegative Report InverseMask(UNIX_ASM)
Use the DEC assembler syntax
mfloat32
Target Report Mask(FLOAT32)
Use 32 bit float
mfloat64
Target Report InverseMask(FLOAT32, FLOAT64)
Use 64 bit float
mfpu
Target RejectNegative Report Mask(FPU)
Use hardware floating point
mint16
Target Report InverseMask(INT32, INT16)
Use 16 bit int
mint32
Target Report Mask(INT32)
Use 32 bit int
msoft-float
Target RejectNegative Report InverseMask(FPU, SOFT_FLOAT)
Do not use hardware floating point
msplit
Target Report Mask(SPLIT)
Target has split I&D
munix-asm
Target RejectNegative Report Mask(UNIX_ASM)
Use UNIX assembler syntax
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