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riscv-gcc-1
Commit 06ccd3c1 by Richard Sandiford Committed by Richard Sandiford
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cond.md (stzx_16): Use register_operand for operand 0. 

gcc/
	* config/m32c/cond.md (stzx_16): Use register_operand for operand 0.
	(stzx_24_<mode>): Likewise mra_operand.

From-SVN: r205247
parent e7e7f402
Showing with 7 additions and 2 deletions
gcc/ChangeLog
2013-11-22 Richard Sandiford <rdsandiford@googlemail.com>
* config/m32c/cond.md (stzx_16): Use register_operand for operand 0.
(stzx_24_<mode>): Likewise mra_operand.
2013-11-22 Jeff Law <law@redhat.com>
* tree-ssa-threadupdate.c: Include tree-cfg.h and tree-pass.h
gcc/config/m32c/cond.md
......@@ -75,7 +75,7 @@
)
(define_insn "stzx_16"
[(set (match_operand:QI 0 "mrai_operand" "=R0w,R0w,R0w")
[(set (match_operand:QI 0 "register_operand" "=R0w,R0w,R0w")
(if_then_else:QI (eq (reg:CC FLG_REGNO) (const_int 0))
(match_operand:QI 1 "const_int_operand" "i,i,0")
(match_operand:QI 2 "const_int_operand" "i,0,i")))]
......@@ -88,7 +88,7 @@
)
(define_insn "stzx_24_<mode>"
[(set (match_operand:QHI 0 "mrai_operand" "=RraSd,RraSd,RraSd")
[(set (match_operand:QHI 0 "mra_operand" "=RraSd,RraSd,RraSd")
(if_then_else:QHI (eq (reg:CC FLG_REGNO) (const_int 0))
(match_operand:QHI 1 "const_int_operand" "i,i,0")
(match_operand:QHI 2 "const_int_operand" "i,0,i")))]
......
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