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lvzhengyang
riscv-gcc-1
Commits
06c386ea
Commit
06c386ea
authored
Aug 23, 1994
by
Steve Chamberlain
Browse files
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Plain Diff
*** empty log message ***
From-SVN: r7958
parent
667f6759
Hide whitespace changes
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Showing
3 changed files
with
73 additions
and
63 deletions
+73
-63
gcc/config/sh/sh.c
+41
-32
gcc/config/sh/sh.h
+24
-21
gcc/config/sh/sh.md
+8
-10
No files found.
gcc/config/sh/sh.c
View file @
06c386ea
...
@@ -1365,7 +1365,7 @@ output_file_start (file, f_options, f_len, W_options, W_len)
...
@@ -1365,7 +1365,7 @@ output_file_start (file, f_options, f_len, W_options, W_len)
data_section
();
data_section
();
pos
=
fprintf
(
file
,
"
\n
! Hitachi SH cc1 (%s) (release
E-2
) arguments:"
,
version_string
);
pos
=
fprintf
(
file
,
"
\n
! Hitachi SH cc1 (%s) (release
H-1
) arguments:"
,
version_string
);
output_options
(
file
,
f_options
,
f_len
,
W_options
,
W_len
,
output_options
(
file
,
f_options
,
f_len
,
W_options
,
W_len
,
pos
,
75
,
" "
,
"
\n
! "
,
"
\n\n
"
);
pos
,
75
,
" "
,
"
\n
! "
,
"
\n\n
"
);
}
}
...
@@ -1748,18 +1748,16 @@ hi_const (src)
...
@@ -1748,18 +1748,16 @@ hi_const (src)
/* Find the last barrier less than MAX_COUNT bytes from FROM, or create one.
/* Find the last barrier less than MAX_COUNT bytes from FROM, or create one.
If an HI move is found, then make sure that MAX_COUNT_HI isn't broken from that one. */
If an HI move is found, then make sure that MAX_COUNT_HI isn't broken from that one. */
static
rtx
from
;
static
static
rtx
rtx
find_barrier
(
from
_
)
find_barrier
(
from
)
rtx
from
_
;
rtx
from
;
{
{
int
count_si
=
0
;
int
count_si
=
0
;
int
count_hi
=
0
;
int
count_hi
=
0
;
int
found_hi
=
0
;
int
found_hi
=
0
;
int
found_si
=
0
;
int
found_si
=
0
;
rtx
found_barrier
=
0
;
rtx
found_barrier
=
0
;
from
=
from_
;
while
(
from
while
(
from
&&
count_si
<
max_count_si
&&
count_si
<
max_count_si
&&
count_hi
<
max_count_hi
)
&&
count_hi
<
max_count_hi
)
...
@@ -1769,8 +1767,8 @@ from = from_;
...
@@ -1769,8 +1767,8 @@ from = from_;
{
{
found_barrier
=
from
;
found_barrier
=
from
;
}
}
/* Count the length of this insn - we assume that all
the pcrelloads
/* Count the length of this insn - we assume that all
moves will
will work out to be only 2 bytes long
*/
be 2 bytes long, except the DIs
*/
if
(
GET_CODE
(
from
)
==
INSN
&&
if
(
GET_CODE
(
from
)
==
INSN
&&
GET_CODE
(
PATTERN
(
from
))
==
SET
)
GET_CODE
(
PATTERN
(
from
))
==
SET
)
...
@@ -1780,7 +1778,7 @@ from = from_;
...
@@ -1780,7 +1778,7 @@ from = from_;
found_hi
=
1
;
found_hi
=
1
;
else
else
found_si
=
1
;
found_si
=
1
;
inc
=
2
;
inc
=
(
GET_MODE_SIZE
(
GET_MODE
(
src
))
>
4
)
?
4
:
2
;
}
}
else
else
{
{
...
@@ -1799,7 +1797,7 @@ from = from_;
...
@@ -1799,7 +1797,7 @@ from = from_;
dump our stuff, so we'll make one */
dump our stuff, so we'll make one */
rtx
label
=
gen_label_rtx
();
rtx
label
=
gen_label_rtx
();
/* Walk back to be just before any jump */
/* Walk back to be just before any jump */
from
=
PREV_INSN
(
from
);
from
=
PREV_INSN
(
from
);
while
(
GET_CODE
(
from
)
==
JUMP_INSN
while
(
GET_CODE
(
from
)
==
JUMP_INSN
||
GET_CODE
(
from
)
==
NOTE
||
GET_CODE
(
from
)
==
NOTE
||
GET_CODE
(
from
)
==
CODE_LABEL
)
||
GET_CODE
(
from
)
==
CODE_LABEL
)
...
@@ -2128,12 +2126,12 @@ handle_pragma (file)
...
@@ -2128,12 +2126,12 @@ handle_pragma (file)
if
(
psize
==
9
&&
strncmp
(
pbuf
,
"interrupt"
,
9
)
==
0
)
if
(
psize
==
9
&&
strncmp
(
pbuf
,
"interrupt"
,
9
)
==
0
)
{
{
pragma_interrupt
=
1
;
pragma_interrupt
=
1
;
return
c
;
return
' '
;
}
}
if
(
psize
==
5
&&
strncmp
(
pbuf
,
"trapa"
,
5
)
==
0
)
if
(
psize
==
5
&&
strncmp
(
pbuf
,
"trapa"
,
5
)
==
0
)
{
{
pragma_interrupt
=
pragma_trapa
=
1
;
pragma_interrupt
=
pragma_trapa
=
1
;
return
c
;
return
' '
;
}
}
c
=
getc
(
file
);
c
=
getc
(
file
);
}
}
...
@@ -2206,23 +2204,35 @@ general_movsrc_operand (op, mode)
...
@@ -2206,23 +2204,35 @@ general_movsrc_operand (op, mode)
enum
machine_mode
mode
;
enum
machine_mode
mode
;
{
{
/* Any MEM(label_ref) is ok, that's a pcrel load */
/* Any MEM(label_ref) is ok, that's a pcrel load */
if
(
GET_CODE
(
op
)
==
MEM
&&
xo
if
(
GET_CODE
(
op
)
==
MEM
GET_CODE
(
XEXP
(
op
,
0
))
==
LABEL_REF
)
&&
GET_CODE
(
XEXP
(
op
,
0
))
==
LABEL_REF
)
return
1
;
return
1
;
/* No post inc allowed */
if
(
GET_CODE
(
op
)
==
MEM
)
{
rtx
inside
=
XEXP
(
op
,
0
);
if
(
GET_CODE
(
inside
)
==
CONST
)
inside
=
XEXP
(
inside
,
0
);
if
(
GET_CODE
(
op
)
==
MEM
if
(
GET_CODE
(
inside
)
==
LABEL_REF
)
&&
(
GET_CODE
(
XEXP
(
op
,
0
))
==
POST_DEC
return
1
;
||
GET_CODE
(
XEXP
(
op
,
0
))
==
PRE_INC
||
GET_CODE
(
XEXP
(
op
,
0
))
==
PRE_DEC
))
return
0
;
/* Can't do that with large modes */
if
(
GET_CODE
(
inside
)
==
PLUS
if
(
GET_CODE
(
op
)
==
MEM
&&
GET_CODE
(
XEXP
(
inside
,
0
))
==
LABEL_REF
&&
GET_CODE
(
XEXP
(
op
,
0
))
==
POST_INC
&&
GET_CODE
(
XEXP
(
inside
,
1
))
==
CONST_INT
)
&&
GET_MODE_SIZE
(
mode
)
>
4
)
return
1
;
return
0
;
/* No post inc allowed */
if
(
GET_CODE
(
inside
)
==
POST_DEC
||
GET_CODE
(
inside
)
==
PRE_INC
||
GET_CODE
(
inside
)
==
PRE_DEC
)
return
0
;
/* Can't do that with large modes */
if
(
GET_CODE
(
inside
)
==
POST_INC
&&
GET_MODE_SIZE
(
mode
)
>
4
)
return
0
;
}
if
((
mode
==
QImode
||
mode
==
HImode
)
if
((
mode
==
QImode
||
mode
==
HImode
)
&&
(
GET_CODE
(
op
)
==
SUBREG
&&
(
GET_CODE
(
op
)
==
SUBREG
...
@@ -2438,12 +2448,12 @@ sh_function_arg (cum, mode, type, named)
...
@@ -2438,12 +2448,12 @@ sh_function_arg (cum, mode, type, named)
if
(
rr
<
NPARM_REGS
)
if
(
rr
<
NPARM_REGS
)
{
{
return
(((
(
mode
)
!=
BLKmode
return
(((
type
)
==
0
||
!
TREE_ADDRESSABLE
((
tree
)
(
type
)))
&&
((
type
)
==
0
||
!
TREE_ADDRESSABLE
((
tree
)
(
type
)))
&&
((
type
)
==
0
||
(
mode
)
!=
BLKmode
&&
((
type
)
==
0
||
(
mode
)
!=
BLKmode
||
(
TYPE_ALIGN
((
type
))
%
PARM_BOUNDARY
==
0
))
||
(
TYPE_ALIGN
((
type
))
%
PARM_BOUNDARY
==
0
))
?
gen_rtx
(
REG
,
(
mode
),
?
gen_rtx
(
REG
,
(
mode
),
(
FIRST_PARM_REG
+
rr
))
(
FIRST_PARM_REG
+
rr
))
:
0
))
);
:
0
);
}
}
}
}
...
@@ -2466,8 +2476,7 @@ sh_function_arg_partial_nregs (CUM, MODE, TYPE, NAMED)
...
@@ -2466,8 +2476,7 @@ sh_function_arg_partial_nregs (CUM, MODE, TYPE, NAMED)
if
((
CUM
)
<
NPARM_REGS
)
if
((
CUM
)
<
NPARM_REGS
)
{
{
if
(((
TYPE
)
==
0
||
!
TREE_ADDRESSABLE
((
tree
)
(
TYPE
)))
if
(((
TYPE
)
==
0
||
!
TREE_ADDRESSABLE
((
tree
)
(
TYPE
)))
&&
((
TYPE
)
==
0
||
(
MODE
)
!=
BLKmode
&&
((
TYPE
)
==
0
||
(
TYPE_ALIGN
((
TYPE
))
%
PARM_BOUNDARY
==
0
))
||
(
TYPE_ALIGN
((
TYPE
))
%
PARM_BOUNDARY
==
0
))
&&
((
CUM
)
+
((
MODE
)
==
BLKmode
&&
((
CUM
)
+
((
MODE
)
==
BLKmode
?
ROUND_ADVANCE
(
int_size_in_bytes
(
TYPE
))
?
ROUND_ADVANCE
(
int_size_in_bytes
(
TYPE
))
:
ROUND_ADVANCE
(
GET_MODE_SIZE
(
MODE
)))
-
NPARM_REGS
>
0
))
:
ROUND_ADVANCE
(
GET_MODE_SIZE
(
MODE
)))
-
NPARM_REGS
>
0
))
...
...
gcc/config/sh/sh.h
View file @
06c386ea
...
@@ -31,6 +31,15 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
...
@@ -31,6 +31,15 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
#define SDB_DEBUGGING_INFO 1
#define SDB_DEBUGGING_INFO 1
/* CYGNUS LOCAL stabs-in-coff */
/* Output DBX (stabs) debugging information if doing -gstabs. */
#define DBX_DEBUGGING_INFO
/* Generate SDB debugging information by default. */
#define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
#define SDB_DELIM ";"
#define SDB_DELIM ";"
#define CPP_PREDEFINES "-D__sh__ -Acpu(sh) -Amachine(sh)"
#define CPP_PREDEFINES "-D__sh__ -Acpu(sh) -Amachine(sh)"
...
@@ -179,7 +188,7 @@ extern int target_flags;
...
@@ -179,7 +188,7 @@ extern int target_flags;
{"", TARGET_DEFAULT} \
{"", TARGET_DEFAULT} \
}
}
#define TARGET_DEFAULT (FAST_BIT
| BIGTABLE_BIT
)
#define TARGET_DEFAULT (FAST_BIT)
/* Macro to define table for command options with values. */
/* Macro to define table for command options with values. */
#define TARGET_OPTIONS \
#define TARGET_OPTIONS \
...
@@ -918,17 +927,22 @@ extern int current_function_anonymous_args;
...
@@ -918,17 +927,22 @@ extern int current_function_anonymous_args;
#endif
#endif
/* The Q is a pc relative load operand */
/* The Q is a pc relative load operand */
#define EXTRA_CONSTRAINT_Q(OP) \
#define EXTRA_CONSTRAINT_Q(OP) \
(GET_CODE (OP) == MEM && GET_CODE (XEXP (OP,0)) == LABEL_REF)
(GET_CODE (OP) == MEM && \
((GET_CODE (XEXP (OP, 0)) == LABEL_REF) \
|| (GET_CODE (XEXP (OP, 0)) == CONST \
&& GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
&& GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == LABEL_REF \
&& GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT)))
/* The U is a label ref */
/* The U is a label ref */
#define EXTRA_CONSTRAINT_U(OP) \
#define EXTRA_CONSTRAINT_U(OP) \
(GET_CODE (OP) == LABEL_REF)
(GET_CODE (OP) == LABEL_REF)
#define IS_INDEX(OP) \
#define IS_INDEX(OP)
\
((GET_CODE
(OP) == PLUS &&
\
((GET_CODE
(OP) == PLUS &&
\
(INDEX_REGISTER_RTX_P
(XEXP(OP,0)) && BASE_REGISTER_RTX_P(XEXP(OP,
1))) || \
(INDEX_REGISTER_RTX_P
(XEXP (OP, 0)) && BASE_REGISTER_RTX_P (XEXP (OP,
1))) || \
(INDEX_REGISTER_RTX_P
(XEXP(OP,1)) && BASE_REGISTER_RTX_P(XEXP(OP,
0)))))
(INDEX_REGISTER_RTX_P
(XEXP (OP, 1)) && BASE_REGISTER_RTX_P (XEXP (OP,
0)))))
...
@@ -1045,7 +1059,7 @@ extern int current_function_anonymous_args;
...
@@ -1045,7 +1059,7 @@ extern int current_function_anonymous_args;
/* Define this if the tablejump instruction expects the table
/* Define this if the tablejump instruction expects the table
to contain offsets from the address of the table.
to contain offsets from the address of the table.
Do not define this if the table should contain absolute addresses. */
Do not define this if the table should contain absolute addresses. */
/*#define CASE_VECTOR_PC_RELATIVE */
#define CASE_VECTOR_PC_RELATIVE
/* Specify the tree operation to be used to convert reals to integers. */
/* Specify the tree operation to be used to convert reals to integers. */
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
...
@@ -1206,12 +1220,10 @@ extern int current_function_anonymous_args;
...
@@ -1206,12 +1220,10 @@ extern int current_function_anonymous_args;
#define TEXT_SECTION_ASM_OP "\t.text"
#define TEXT_SECTION_ASM_OP "\t.text"
#define DATA_SECTION_ASM_OP "\t.data"
#define DATA_SECTION_ASM_OP "\t.data"
#define READONLY_DATA_SECTION_ASM_OP "\t.section\t.rdata\n"
#define CTORS_SECTION_ASM_OP "\t.section\t.ctors\n"
#define CTORS_SECTION_ASM_OP "\t.section\t.ctors\n"
#define DTORS_SECTION_ASM_OP "\t.section\t.dtors\n"
#define DTORS_SECTION_ASM_OP "\t.section\t.dtors\n"
#define INIT_SECTION_ASM_OP "\t.section\t.init\n"
#define INIT_SECTION_ASM_OP "\t.section\t.init\n"
#define EXTRA_SECTIONS in_ctors, in_dtors, in_rdata
#define EXTRA_SECTIONS in_ctors, in_dtors
#define READONLY_DATA_SECTION rdata_section
#define EXTRA_SECTION_FUNCTIONS \
#define EXTRA_SECTION_FUNCTIONS \
void \
void \
ctors_section() \
ctors_section() \
...
@@ -1230,16 +1242,7 @@ dtors_section() \
...
@@ -1230,16 +1242,7 @@ dtors_section() \
fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
in_section = in_dtors; \
in_section = in_dtors; \
} \
} \
} \
}
void \
rdata_section() \
{ \
if (in_section != in_rdata) \
{ \
fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
in_section = in_rdata; \
} \
}
/* Assemble generic sections.
/* Assemble generic sections.
This is currently only used to support section attributes. */
This is currently only used to support section attributes. */
...
...
gcc/config/sh/sh.md
View file @
06c386ea
...
@@ -1119,7 +1119,8 @@
...
@@ -1119,7 +1119,8 @@
&& REGNO (operands
[
1
]
) >= FIRST_PSEUDO_REGISTER)
&& REGNO (operands
[
1
]
) >= FIRST_PSEUDO_REGISTER)
&& ! (GET_CODE (operands
[
0
]
) == REG && GET_CODE (operands
[
1
]
) == REG
&& ! (GET_CODE (operands
[
0
]
) == REG && GET_CODE (operands
[
1
]
) == REG
&& ! reload_completed
&& ! reload_completed
&& reg_overlap_mentioned_p (operands
[
0
]
, operands
[
1
]
))"
&& reg_overlap_mentioned_p (operands
[
0
]
, operands
[
1
]
))
&& ! EXTRA_CONSTRAINT_Q (operands
[
1
]
)"
[
(set (match_dup 2) (match_dup 3))
[
(set (match_dup 2) (match_dup 3))
(set (match_dup 4) (match_dup 5))]
(set (match_dup 4) (match_dup 5))]
"
"
...
@@ -1537,15 +1538,12 @@
...
@@ -1537,15 +1538,12 @@
(const_int 1))
(const_int 1))
(label_ref (match_operand 4 "" ""))
(label_ref (match_operand 4 "" ""))
(pc)))
(pc)))
(parallel
[
(set (match_dup 5) (ashift:SI (match_dup 5) (const_int 2)))
(set (match_dup 6) (plus:SI (match_dup 5) (match_dup 5)))
(clobber (reg:SI 18))])
(set (reg:SI 0) (label_ref (match_operand 3 "" "")))
(set (reg:SI 0) (label_ref (match_operand 3 "" "")))
(set (reg:SI 0) (mem:SI (plus:SI (reg:SI 0) (match_dup 5))))
(parallel
[
(set (reg:SI 0) (plus:SI (reg:SI 0)
(mem:HI (plus:SI (reg:SI 0)
;; (parallel
[
(set (reg:SI 0) (plus:SI (reg:SI 0)
(match_dup 6)))))
;; (mem:HI (plus:SI (reg:SI 0)
(set (match_dup 6) (mem:HI (plus:SI (reg:SI 0) (match_dup 6))))])
;; (match_dup 5)))))
;; (set (match_dup 6) (mem:HI (plus:SI (reg:SI 0) (match_dup 6))))])
(set (pc) (reg:SI 0))]
(set (pc) (reg:SI 0))]
""
""
"
"
...
@@ -1553,7 +1551,7 @@
...
@@ -1553,7 +1551,7 @@
operands
[
1
]
= copy_to_mode_reg (SImode, operands
[
1
]
);
operands
[
1
]
= copy_to_mode_reg (SImode, operands
[
1
]
);
operands
[
2
]
= copy_to_mode_reg (SImode, operands
[
2
]
);
operands
[
2
]
= copy_to_mode_reg (SImode, operands
[
2
]
);
operands
[
5
]
= gen_reg_rtx (SImode);
operands
[
5
]
= gen_reg_rtx (SImode);
operands
[
6
]
= gen_reg_rtx (SImode);
}")
}")
(define_insn "casesi_worker"
(define_insn "casesi_worker"
...
...
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