Commit 06a5f1ec by H.J. Lu Committed by H.J. Lu

i386.c (ix86_expand_vector_init_concat): Change sizes of operand array from 8/4 to 4/2.

2008-05-19  H.J. Lu  <hongjiu.lu@intel.com>

	* gcc/config/i386/i386.c (ix86_expand_vector_init_concat): Change
	sizes of operand array from 8/4 to 4/2.
	(ix86_expand_vector_init_general): Change size of operand array
	from 32 to 16.  Remove op0, op1 and half_mode.

From-SVN: r135579
parent 63e46cce
2008-05-19 H.J. Lu <hongjiu.lu@intel.com>
* gcc/config/i386/i386.c (ix86_expand_vector_init_concat): Change
sizes of operand array from 8/4 to 4/2.
(ix86_expand_vector_init_general): Change size of operand array
from 32 to 16. Remove op0, op1 and half_mode.
2008-05-19 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (ix86_expand_vector_init_concat): New.
(ix86_expand_vector_init_interleave): Likewise.
(ix86_expand_vector_init_general): Use them. Assert word_mode
......
......@@ -23878,7 +23878,7 @@ ix86_expand_vector_init_concat (enum machine_mode mode,
rtx target, rtx *ops, int n)
{
enum machine_mode cmode, hmode = VOIDmode;
rtx first[8], second[4];
rtx first[4], second[2];
rtvec v;
int i, j;
......@@ -24084,8 +24084,7 @@ static void
ix86_expand_vector_init_general (bool mmx_ok, enum machine_mode mode,
rtx target, rtx vals)
{
rtx ops[32], op0, op1;
enum machine_mode half_mode = VOIDmode;
rtx ops[16];
int n, i;
switch (mode)
......
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