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riscv-gcc-1
Commit 05b9aaaa by Ulrich Weigand Committed by Ulrich Weigand
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s390.md ("*tmdi_reg", [...]): Do not mark as commutative. 

	* config/s390/s390.md ("*tmdi_reg", "*tmsi_reg"): Do not mark as
	commutative.  Use "nonimmediate_operand" instead of "register_operand"
	as predicate for operand 0.  Move to after the "*tmXX_mem" insns.

	("*tmdi_mem", "*tmsi_mem", "*tmhi_mem", "*tmqi_mem"): Do not mark
	as commutative.

	("*anddi3_ni", "*andsi3_ni", "*iordi3_ni", "*iorsi3_ni"): Do not
	mark as commutative.  Use "nonimmediate_operand" instead of
	"register_operand" as predicate for operand 1.

	("movstrictsi"): Fix typo in insn name.

From-SVN: r56974
parent f724acb8
Showing with 70 additions and 55 deletions
gcc/ChangeLog
2002-09-09 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.md ("*tmdi_reg", "*tmsi_reg"): Do not mark as
commutative. Use "nonimmediate_operand" instead of "register_operand"
as predicate for operand 0. Move to after the "*tmXX_mem" insns.
("*tmdi_mem", "*tmsi_mem", "*tmhi_mem", "*tmqi_mem"): Do not mark
as commutative.
("*anddi3_ni", "*andsi3_ni", "*iordi3_ni", "*iorsi3_ni"): Do not
mark as commutative. Use "nonimmediate_operand" instead of
"register_operand" as predicate for operand 1.
("movstrictsi"): Fix typo in insn name.
2002-09-09 Jan Hubicka <jh@suse.cz>
* i386.c (index_register_operand): New.
......
gcc/config/s390/s390.md
......@@ -298,54 +298,9 @@
; Test-under-Mask instructions
(define_insn "*tmdi_reg"
[(set (reg 33)
(compare (and:DI (match_operand:DI 0 "register_operand" "%d")
(match_operand:DI 1 "immediate_operand" "n"))
(match_operand:DI 2 "immediate_operand" "n")))]
"TARGET_64BIT
&& s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1))
&& s390_single_hi (operands[1], DImode, 0) >= 0"
"*
{
int part = s390_single_hi (operands[1], DImode, 0);
operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part));
switch (part)
{
case 0: return \"tmhh\\t%0,%x1\";
case 1: return \"tmhl\\t%0,%x1\";
case 2: return \"tmlh\\t%0,%x1\";
case 3: return \"tmll\\t%0,%x1\";
default: abort ();
}
}"
[(set_attr "op_type" "RI")])
(define_insn "*tmsi_reg"
[(set (reg 33)
(compare (and:SI (match_operand:SI 0 "register_operand" "%d")
(match_operand:SI 1 "immediate_operand" "n"))
(match_operand:SI 2 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1))
&& s390_single_hi (operands[1], SImode, 0) >= 0"
"*
{
int part = s390_single_hi (operands[1], SImode, 0);
operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part));
switch (part)
{
case 0: return \"tmh\\t%0,%x1\";
case 1: return \"tml\\t%0,%x1\";
default: abort ();
}
}"
[(set_attr "op_type" "RI")])
(define_insn "*tmdi_mem"
[(set (reg 33)
(compare (and:DI (match_operand:DI 0 "memory_operand" "%Q")
(compare (and:DI (match_operand:DI 0 "memory_operand" "Q")
(match_operand:DI 1 "immediate_operand" "n"))
(match_operand:DI 2 "immediate_operand" "n")))]
"TARGET_64BIT
......@@ -365,7 +320,7 @@
(define_insn "*tmsi_mem"
[(set (reg 33)
(compare (and:SI (match_operand:SI 0 "memory_operand" "%Q")
(compare (and:SI (match_operand:SI 0 "memory_operand" "Q")
(match_operand:SI 1 "immediate_operand" "n"))
(match_operand:SI 2 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))
......@@ -384,7 +339,7 @@
(define_insn "*tmhi_mem"
[(set (reg 33)
(compare (and:SI (subreg:SI (match_operand:HI 0 "memory_operand" "%Q") 0)
(compare (and:SI (subreg:SI (match_operand:HI 0 "memory_operand" "Q") 0)
(match_operand:SI 1 "immediate_operand" "n"))
(match_operand:SI 2 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))
......@@ -403,7 +358,7 @@
(define_insn "*tmqi_mem"
[(set (reg 33)
(compare (and:SI (subreg:SI (match_operand:QI 0 "memory_operand" "%Q") 0)
(compare (and:SI (subreg:SI (match_operand:QI 0 "memory_operand" "Q") 0)
(match_operand:SI 1 "immediate_operand" "n"))
(match_operand:SI 2 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))"
......@@ -411,6 +366,51 @@
[(set_attr "op_type" "SI")
(set_attr "atype" "mem")])
(define_insn "*tmdi_reg"
[(set (reg 33)
(compare (and:DI (match_operand:DI 0 "nonimmediate_operand" "d")
(match_operand:DI 1 "immediate_operand" "n"))
(match_operand:DI 2 "immediate_operand" "n")))]
"TARGET_64BIT
&& s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1))
&& s390_single_hi (operands[1], DImode, 0) >= 0"
"*
{
int part = s390_single_hi (operands[1], DImode, 0);
operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part));
switch (part)
{
case 0: return \"tmhh\\t%0,%x1\";
case 1: return \"tmhl\\t%0,%x1\";
case 2: return \"tmlh\\t%0,%x1\";
case 3: return \"tmll\\t%0,%x1\";
default: abort ();
}
}"
[(set_attr "op_type" "RI")])
(define_insn "*tmsi_reg"
[(set (reg 33)
(compare (and:SI (match_operand:SI 0 "nonimmediate_operand" "d")
(match_operand:SI 1 "immediate_operand" "n"))
(match_operand:SI 2 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1))
&& s390_single_hi (operands[1], SImode, 0) >= 0"
"*
{
int part = s390_single_hi (operands[1], SImode, 0);
operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part));
switch (part)
{
case 0: return \"tmh\\t%0,%x1\";
case 1: return \"tml\\t%0,%x1\";
default: abort ();
}
}"
[(set_attr "op_type" "RI")])
(define_insn "*tmhi_full"
[(set (reg 33)
(compare (match_operand:HI 0 "register_operand" "d")
......@@ -1122,7 +1122,7 @@
;
; moveqstrictqi instruction pattern(s).
; movstrictqi instruction pattern(s).
;
(define_insn "*movstrictqi"
......@@ -1151,7 +1151,7 @@
; movstrictsi instruction pattern(s).
;
(define_insn "movestrictsi"
(define_insn "movstrictsi"
[(set (strict_low_part (match_operand:SI 0 "register_operand" "+d,d"))
(match_operand:SI 1 "general_operand" "d,m"))]
"TARGET_64BIT"
......@@ -4422,7 +4422,7 @@
(define_insn "*anddi3_ni"
[(set (match_operand:DI 0 "register_operand" "=d")
(and:DI (match_operand:DI 1 "register_operand" "%0")
(and:DI (match_operand:DI 1 "nonimmediate_operand" "0")
(match_operand:DI 2 "immediate_operand" "n")))
(clobber (reg:CC 33))]
"TARGET_64BIT && s390_single_hi (operands[2], DImode, -1) >= 0"
......@@ -4508,7 +4508,7 @@
(define_insn "*andsi3_ni"
[(set (match_operand:SI 0 "register_operand" "=d")
(and:SI (match_operand:SI 1 "register_operand" "%0")
(and:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:SI 2 "immediate_operand" "n")))
(clobber (reg:CC 33))]
"TARGET_64BIT && s390_single_hi (operands[2], SImode, -1) >= 0"
......@@ -4693,7 +4693,7 @@
(define_insn "*iordi3_oi"
[(set (match_operand:DI 0 "register_operand" "=d")
(ior:DI (match_operand:DI 1 "register_operand" "%0")
(ior:DI (match_operand:DI 1 "nonimmediate_operand" "%0")
(match_operand:DI 2 "immediate_operand" "n")))
(clobber (reg:CC 33))]
"TARGET_64BIT && s390_single_hi (operands[2], DImode, 0) >= 0"
......@@ -4779,7 +4779,7 @@
(define_insn "*iorsi3_oi"
[(set (match_operand:SI 0 "register_operand" "=d")
(ior:SI (match_operand:SI 1 "register_operand" "%0")
(ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
(match_operand:SI 2 "immediate_operand" "n")))
(clobber (reg:CC 33))]
"TARGET_64BIT && s390_single_hi (operands[2], SImode, 0) >= 0"
......
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