Commit 052754ea by Will Schmidt Committed by Will Schmidt

fold-vec-logical-ors-longlong.c: Update the target to power8-vector.


[gcc/testsuite]

2017-05-26  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-logical-ors-longlong.c:
	Update the target to power8-vector.

From-SVN: r248805
parent d80d5239
2017-06-01 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-logical-ors-longlong.c:
Update the target to power8-vector.
2017-06-01 David Malcolm <dmalcolm@redhat.com> 2017-06-01 David Malcolm <dmalcolm@redhat.com>
* lib/gcc-dg.exp: Ensure GCC_COLORS is unset. * lib/gcc-dg.exp: Ensure GCC_COLORS is unset.
......
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* long long inputs produce the right results. */ * long long inputs produce the right results. */
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-options "-mvsx -O2" } */ /* { dg-options "-mpower8-vector -O2" } */
#include <altivec.h> #include <altivec.h>
...@@ -151,11 +151,11 @@ test6_nor (vector unsigned long long x, vector unsigned long long y) ...@@ -151,11 +151,11 @@ test6_nor (vector unsigned long long x, vector unsigned long long y)
return *foo; return *foo;
} }
// Codegen on power7 is such that the vec_or() tests generate more xxlor // The number of xxlor instructions generated varies between 6 and 24 for
// instructions than what is seen on power8 or newer. // older systems (power6,power7), as well as for 32-bit versus 64-bit targets.
// Thus, an additional target clause for the xxlor instruction check. // For simplicity, this test now only targets "powerpc_p8vector_ok" environments
/* { dg-final { scan-assembler-times {\mxxlor\M} 6 { target p8vector_hw } } } */ // where the answer is expected to be 6.
/* { dg-final { scan-assembler-times {\mxxlor\M} 24 { target { ! p8vector_hw } } } } */
/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */ /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlnor\M} 6 } } */ /* { dg-final { scan-assembler-times {\mxxlnor\M} 6 } } */
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