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Commit 040a2b43 by Segher Boessenkool Committed by Segher Boessenkool
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2014-09-02 Segher Boessenkool <segher@kernel.crashing.org> 

	* config/rs6000/rs6000.md (mulsi3, *mulsi3_internal1,
	*mulsi3_internal2, and two splitters): Delete.
	(muldi3, *muldi3_internal1, *muldi3_internal2, and two splitters):
	Delete.
	(mul<mode>3, mul<mode>3_dot, mul<mode>3_dot2): New.

From-SVN: r214813
parent 3f734f66
Showing with 49 additions and 126 deletions
gcc/ChangeLog
2014-09-02 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (mulsi3, *mulsi3_internal1,
*mulsi3_internal2, and two splitters): Delete.
(muldi3, *muldi3_internal1, *muldi3_internal2, and two splitters):
Delete.
(mul<mode>3, mul<mode>3_dot, mul<mode>3_dot2): New.
2014-09-02 Richard Biener <rguenther@suse.de> 2014-09-02 Richard Biener <rguenther@suse.de>
PR tree-optimization/62695 PR tree-optimization/62695
gcc/config/rs6000/rs6000.md
...@@ -2701,79 +2701,70 @@ ...@@ -2701,79 +2701,70 @@
DONE; DONE;
}") }")
(define_insn "mulsi3"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r") (define_insn "mul<mode>3"
(mult:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r") [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
(match_operand:SI 2 "reg_or_short_operand" "r,I")))] (mult:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,r")
(match_operand:GPR 2 "reg_or_short_operand" "r,I")))]
"" ""
"@ "@
mullw %0,%1,%2 mull<wd> %0,%1,%2
mulli %0,%1,%2" mulli %0,%1,%2"
[(set_attr "type" "mul") [(set_attr "type" "mul")
(set (attr "size") (set (attr "size")
(cond [(match_operand:SI 2 "s8bit_cint_operand" "") (cond [(match_operand:GPR 2 "s8bit_cint_operand" "")
(const_string "8") (const_string "8")
(match_operand:SI 2 "short_cint_operand" "") (match_operand:GPR 2 "short_cint_operand" "")
(const_string "16")] (const_string "16")]
(const_string "32")))]) (const_string "<bits>")))])
(define_insn "*mulsi3_internal1" (define_insn_and_split "*mul<mode>3_dot"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
(compare:CC (mult:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r") (compare:CC (mult:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "gpc_reg_operand" "r,r")) (match_operand:GPR 2 "gpc_reg_operand" "r,r"))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:SI 3 "=r,r"))] (clobber (match_scratch:GPR 0 "=r,r"))]
"TARGET_32BIT" "<MODE>mode == Pmode && rs6000_gen_cell_microcode"
"@ "@
mullw. %3,%1,%2 mull<wd>. %0,%1,%2
#" #"
"&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)"
[(set (match_dup 0)
(mult:GPR (match_dup 1)
(match_dup 2)))
(set (match_dup 3)
(compare:CC (match_dup 0)
(const_int 0)))]
""
[(set_attr "type" "mul") [(set_attr "type" "mul")
(set_attr "size" "<bits>")
(set_attr "dot" "yes") (set_attr "dot" "yes")
(set_attr "length" "4,8")]) (set_attr "length" "4,8")])
(define_split (define_insn_and_split "*mul<mode>3_dot2"
[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")
(compare:CC (mult:SI (match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "gpc_reg_operand" ""))
(const_int 0)))
(clobber (match_scratch:SI 3 ""))]
"TARGET_32BIT && reload_completed"
[(set (match_dup 3)
(mult:SI (match_dup 1) (match_dup 2)))
(set (match_dup 0)
(compare:CC (match_dup 3)
(const_int 0)))]
"")
(define_insn "*mulsi3_internal2"
[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y") [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
(compare:CC (mult:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r") (compare:CC (mult:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "gpc_reg_operand" "r,r")) (match_operand:GPR 2 "gpc_reg_operand" "r,r"))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r") (set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
(mult:SI (match_dup 1) (match_dup 2)))] (mult:GPR (match_dup 1)
"TARGET_32BIT" (match_dup 2)))]
"<MODE>mode == Pmode && rs6000_gen_cell_microcode"
"@ "@
mullw. %0,%1,%2 mull<wd>. %0,%1,%2
#" #"
[(set_attr "type" "mul") "&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)"
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")
(compare:CC (mult:SI (match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "gpc_reg_operand" ""))
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "")
(mult:SI (match_dup 1) (match_dup 2)))]
"TARGET_32BIT && reload_completed"
[(set (match_dup 0) [(set (match_dup 0)
(mult:SI (match_dup 1) (match_dup 2))) (mult:GPR (match_dup 1)
(match_dup 2)))
(set (match_dup 3) (set (match_dup 3)
(compare:CC (match_dup 0) (compare:CC (match_dup 0)
(const_int 0)))] (const_int 0)))]
"") ""
[(set_attr "type" "mul")
(set_attr "size" "<bits>")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_insn "udiv<mode>3" (define_insn "udiv<mode>3"
...@@ -6767,82 +6758,6 @@ ...@@ -6767,82 +6758,6 @@
;; PowerPC64 DImode operations. ;; PowerPC64 DImode operations.
(define_insn "muldi3"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(mult:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r")
(match_operand:DI 2 "reg_or_short_operand" "r,I")))]
"TARGET_POWERPC64"
"@
mulld %0,%1,%2
mulli %0,%1,%2"
[(set_attr "type" "mul")
(set (attr "size")
(cond [(match_operand:SI 2 "s8bit_cint_operand" "")
(const_string "8")
(match_operand:SI 2 "short_cint_operand" "")
(const_string "16")]
(const_string "64")))])
(define_insn "*muldi3_internal1"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
(compare:CC (mult:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r")
(match_operand:DI 2 "gpc_reg_operand" "r,r"))
(const_int 0)))
(clobber (match_scratch:DI 3 "=r,r"))]
"TARGET_POWERPC64"
"@
mulld. %3,%1,%2
#"
[(set_attr "type" "mul")
(set_attr "size" "64")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
(compare:CC (mult:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:DI 2 "gpc_reg_operand" ""))
(const_int 0)))
(clobber (match_scratch:DI 3 ""))]
"TARGET_POWERPC64 && reload_completed"
[(set (match_dup 3)
(mult:DI (match_dup 1) (match_dup 2)))
(set (match_dup 0)
(compare:CC (match_dup 3)
(const_int 0)))]
"")
(define_insn "*muldi3_internal2"
[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
(compare:CC (mult:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r")
(match_operand:DI 2 "gpc_reg_operand" "r,r"))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(mult:DI (match_dup 1) (match_dup 2)))]
"TARGET_POWERPC64"
"@
mulld. %0,%1,%2
#"
[(set_attr "type" "mul")
(set_attr "size" "64")
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")
(compare:CC (mult:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:DI 2 "gpc_reg_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "")
(mult:DI (match_dup 1) (match_dup 2)))]
"TARGET_POWERPC64 && reload_completed"
[(set (match_dup 0)
(mult:DI (match_dup 1) (match_dup 2)))
(set (match_dup 3)
(compare:CC (match_dup 0)
(const_int 0)))]
"")
(define_insn "smuldi3_highpart" (define_insn "smuldi3_highpart"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r") [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(truncate:DI (truncate:DI
......
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