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riscv-gcc-1
Commit 036def0f by Joern Rennecke Committed by Joern Rennecke
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* config/arc/constraints.md (Rcq): Simplify register number test. 

From-SVN: r204900
parent 53677b17
Showing with 5 additions and 1 deletions
gcc/ChangeLog
2013-11-16 Joern Rennecke <joern.rennecke@embecosm.com>
* config/arc/constraints.md (Rcq): Simplify register number test.
2013-11-15 Aldy Hernandez <aldyh@redhat.com>
* gimple.h (enum gf_mask): Change the ordering of GF_OMP_* bits.
gcc/config/arc/constraints.md
......@@ -338,7 +338,7 @@
(and (match_code "REG")
(match_test "TARGET_Rcq
&& !arc_ccfsm_cond_exec_p ()
&& ((((REGNO (op) & 7) ^ 4) - 4) & 15) == REGNO (op)")))
&& IN_RANGE (REGNO (op) ^ 4, 4, 11)")))
; If we need a reload, we generally want to steer reload to use three-address
; alternatives in preference of two-address alternatives, unless the
......
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