Commit 036a2b7a by Bob Wilson Committed by Bob Wilson

predicates.md (addsubx_operand): New.

	* config/xtensa/predicates.md (addsubx_operand): New.
	* config/xtensa/xtensa.c (xtensa_emit_branch): New.
	(xtensa_emit_bit_branch): New.
	(xtensa_emit_movcc): New.
	* config/xtensa/xtensa.md (any_minmax): New code macro.
	(minmax): New code attribute.
	(any_cond, any_scc, any_scc_sf): New code macros.
	(*addx2, *addx4, *addx8): Delete.
	(*addx): New.
	(*subx2, *subx4, *subx8): Delete.
	(*subx): New.
	(sminsi3, uminsi3, smaxsi3, umaxsi3): Use any_minmax macro.
	(beq, bne, bgt, bge, blt, ble, bgtu, bgeu, bltu, bleu): Use any_cond.
	(*btrue, *bfalse, *ubtrue, *ubfalse): Use xtensa_emit_branch.
	(*bittrue, *bitfalse): Use xtensa_emit_bit_branch.
	(seq, sne, sgt, sge, slt, sle): Use any_scc macro.
	(movsicc_internal0, movsicc_internal1): Use xtensa_emit_movcc.
	(movsfcc_internal0, movsfcc_internal1): Likewise.
	(seq_sf, slt_sf, sle_sf): Use any_scc_sf macro.
	* config/xtensa/xtensa-protos.h: (xtensa_emit_branch): New.
	(xtensa_emit_bit_branch): New.
	(xtensa_emit_movcc): New.
	(function_arg_boundary): Add missing prototype.

From-SVN: r118952
parent 3e980143
2006-11-17 Bob Wilson <bob.wilson@acm.org> 2006-11-17 Bob Wilson <bob.wilson@acm.org>
* config/xtensa/predicates.md (addsubx_operand): New.
* config/xtensa/xtensa.c (xtensa_emit_branch): New.
(xtensa_emit_bit_branch): New.
(xtensa_emit_movcc): New.
* config/xtensa/xtensa.md (any_minmax): New code macro.
(minmax): New code attribute.
(any_cond, any_scc, any_scc_sf): New code macros.
(*addx2, *addx4, *addx8): Delete.
(*addx): New.
(*subx2, *subx4, *subx8): Delete.
(*subx): New.
(sminsi3, uminsi3, smaxsi3, umaxsi3): Use any_minmax macro.
(beq, bne, bgt, bge, blt, ble, bgtu, bgeu, bltu, bleu): Use any_cond.
(*btrue, *bfalse, *ubtrue, *ubfalse): Use xtensa_emit_branch.
(*bittrue, *bitfalse): Use xtensa_emit_bit_branch.
(seq, sne, sgt, sge, slt, sle): Use any_scc macro.
(movsicc_internal0, movsicc_internal1): Use xtensa_emit_movcc.
(movsfcc_internal0, movsfcc_internal1): Likewise.
(seq_sf, slt_sf, sle_sf): Use any_scc_sf macro.
* config/xtensa/xtensa-protos.h: (xtensa_emit_branch): New.
(xtensa_emit_bit_branch): New.
(xtensa_emit_movcc): New.
(function_arg_boundary): Add missing prototype.
2006-11-17 Bob Wilson <bob.wilson@acm.org>
* config/xtensa/xtensa.md (tstsi): Delete * config/xtensa/xtensa.md (tstsi): Delete
2006-11-17 Bob Wilson <bob.wilson@acm.org> 2006-11-17 Bob Wilson <bob.wilson@acm.org>
......
;; Predicate definitions for Xtensa. ;; Predicate definitions for Xtensa.
;; Copyright (C) 2005 Free Software Foundation, Inc. ;; Copyright (C) 2005, 2006 Free Software Foundation, Inc.
;; ;;
;; This file is part of GCC. ;; This file is part of GCC.
;; ;;
...@@ -24,6 +24,12 @@ ...@@ -24,6 +24,12 @@
|| xtensa_simm8x256 (INTVAL (op))")) || xtensa_simm8x256 (INTVAL (op))"))
(match_operand 0 "register_operand"))) (match_operand 0 "register_operand")))
(define_predicate "addsubx_operand"
(and (match_code "const_int")
(match_test "INTVAL (op) == 2
|| INTVAL (op) == 4
|| INTVAL (op) == 8")))
(define_predicate "arith_operand" (define_predicate "arith_operand"
(ior (and (match_code "const_int") (ior (and (match_code "const_int")
(match_test "xtensa_simm8 (INTVAL (op))")) (match_test "xtensa_simm8 (INTVAL (op))"))
......
...@@ -50,6 +50,9 @@ extern int xtensa_emit_move_sequence (rtx *, enum machine_mode); ...@@ -50,6 +50,9 @@ extern int xtensa_emit_move_sequence (rtx *, enum machine_mode);
extern rtx xtensa_copy_incoming_a7 (rtx); extern rtx xtensa_copy_incoming_a7 (rtx);
extern void xtensa_expand_nonlocal_goto (rtx *); extern void xtensa_expand_nonlocal_goto (rtx *);
extern void xtensa_emit_loop_end (rtx, rtx *); extern void xtensa_emit_loop_end (rtx, rtx *);
extern char *xtensa_emit_branch (bool, bool, rtx *);
extern char *xtensa_emit_bit_branch (bool, bool, rtx *);
extern char *xtensa_emit_movcc (bool, bool, bool, rtx *);
extern char *xtensa_emit_call (int, rtx *); extern char *xtensa_emit_call (int, rtx *);
#ifdef TREE_CODE #ifdef TREE_CODE
...@@ -71,6 +74,7 @@ extern enum reg_class xtensa_secondary_reload_class (enum reg_class, ...@@ -71,6 +74,7 @@ extern enum reg_class xtensa_secondary_reload_class (enum reg_class,
extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree); extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree);
extern struct rtx_def *function_arg (CUMULATIVE_ARGS *, enum machine_mode, extern struct rtx_def *function_arg (CUMULATIVE_ARGS *, enum machine_mode,
tree, int); tree, int);
extern int function_arg_boundary (enum machine_mode, tree);
#endif /* TREE_CODE */ #endif /* TREE_CODE */
extern void xtensa_setup_frame_addresses (void); extern void xtensa_setup_frame_addresses (void);
......
...@@ -1369,6 +1369,101 @@ xtensa_emit_loop_end (rtx insn, rtx *operands) ...@@ -1369,6 +1369,101 @@ xtensa_emit_loop_end (rtx insn, rtx *operands)
char * char *
xtensa_emit_branch (bool inverted, bool immed, rtx *operands)
{
static char result[64];
enum rtx_code code;
const char *op;
code = GET_CODE (operands[3]);
switch (code)
{
case EQ: op = inverted ? "ne" : "eq"; break;
case NE: op = inverted ? "eq" : "ne"; break;
case LT: op = inverted ? "ge" : "lt"; break;
case GE: op = inverted ? "lt" : "ge"; break;
case LTU: op = inverted ? "geu" : "ltu"; break;
case GEU: op = inverted ? "ltu" : "geu"; break;
default: gcc_unreachable ();
}
if (immed)
{
if (INTVAL (operands[1]) == 0)
sprintf (result, "b%sz%s\t%%0, %%2", op,
(TARGET_DENSITY && (code == EQ || code == NE)) ? ".n" : "");
else
sprintf (result, "b%si\t%%0, %%d1, %%2", op);
}
else
sprintf (result, "b%s\t%%0, %%1, %%2", op);
return result;
}
char *
xtensa_emit_bit_branch (bool inverted, bool immed, rtx *operands)
{
static char result[64];
const char *op;
switch (GET_CODE (operands[3]))
{
case EQ: op = inverted ? "bs" : "bc"; break;
case NE: op = inverted ? "bc" : "bs"; break;
default: gcc_unreachable ();
}
if (immed)
{
unsigned bitnum = INTVAL (operands[1]) & 0x1f;
operands[1] = GEN_INT (bitnum);
sprintf (result, "b%si\t%%0, %%d1, %%2", op);
}
else
sprintf (result, "b%s\t%%0, %%1, %%2", op);
return result;
}
char *
xtensa_emit_movcc (bool inverted, bool isfp, bool isbool, rtx *operands)
{
static char result[64];
enum rtx_code code;
const char *op;
code = GET_CODE (operands[4]);
if (isbool)
{
switch (code)
{
case EQ: op = inverted ? "t" : "f"; break;
case NE: op = inverted ? "f" : "t"; break;
default: gcc_unreachable ();
}
}
else
{
switch (code)
{
case EQ: op = inverted ? "nez" : "eqz"; break;
case NE: op = inverted ? "eqz" : "nez"; break;
case LT: op = inverted ? "gez" : "ltz"; break;
case GE: op = inverted ? "ltz" : "gez"; break;
default: gcc_unreachable ();
}
}
sprintf (result, "mov%s%s\t%%0, %%%d, %%1",
op, isfp ? ".s" : "", inverted ? 3 : 2);
return result;
}
char *
xtensa_emit_call (int callop, rtx *operands) xtensa_emit_call (int callop, rtx *operands)
{ {
static char result[64]; static char result[64];
......
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