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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
0326207e
Commit
0326207e
authored
Jan 23, 1995
by
Ian Lance Taylor
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Permit any small integer mode in the HI/LO registers
From-SVN: r8790
parent
80c838cd
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1 changed file
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2 additions
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9 deletions
+2
-9
gcc/config/mips/mips.c
+2
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gcc/config/mips/mips.c
View file @
0326207e
...
...
@@ -3361,15 +3361,8 @@ override_options ()
&&
(
!
TARGET_SINGLE_FLOAT
||
size
<=
4
));
else
if
(
MD_REG_P
(
regno
))
{
if
(
TARGET_64BIT
)
temp
=
(
mode
==
DImode
||
mode
==
SImode
||
(
regno
==
MD_REG_FIRST
&&
mode
==
TImode
));
else
temp
=
(
mode
==
SImode
||
(
regno
==
MD_REG_FIRST
&&
mode
==
DImode
));
}
temp
=
(
size
<=
UNITS_PER_WORD
||
(
regno
==
MD_REG_FIRST
&&
size
==
2
*
UNITS_PER_WORD
));
else
temp
=
FALSE
;
...
...
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