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Commit 02529902 by Kazu Hirata Committed by Kazu Hirata
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h8300-protos.h: Add a prototype for same_cmp_preceding_p. 

	* config/h8300/h8300-protos.h: Add a prototype for
	same_cmp_preceding_p.
	* config/h8300/h8300.c (same_cmp_preceding): New.
	* config/h8300/h8300.md: Extend peephole2's that transform
	compare:SI into shorter sequences so that they can deal with
	signed comparisons.

From-SVN: r68296
parent 2d0c9050
Showing with 86 additions and 25 deletions
gcc/ChangeLog
2003-06-20 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300-protos.h: Add a prototype for
same_cmp_preceding_p.
* config/h8300/h8300.c (same_cmp_preceding): New.
* config/h8300/h8300.md: Extend peephole2's that transform
compare:SI into shorter sequences so that they can deal with
signed comparisons.
2003-06-14 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at> 2003-06-14 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at>
* doc/contrib.texi (Contributors): Use Windows instead of Win32. * doc/contrib.texi (Contributors): Use Windows instead of Win32.
......
gcc/config/h8300/h8300-protos.h
...@@ -76,6 +76,7 @@ extern int iorxor_operator (rtx, enum machine_mode); ...@@ -76,6 +76,7 @@ extern int iorxor_operator (rtx, enum machine_mode);
extern int h8300_eightbit_constant_address_p (rtx); extern int h8300_eightbit_constant_address_p (rtx);
extern int h8300_tiny_constant_address_p (rtx); extern int h8300_tiny_constant_address_p (rtx);
extern int byte_accesses_mergeable_p (rtx, rtx); extern int byte_accesses_mergeable_p (rtx, rtx);
extern int same_cmp_preceding_p (rtx);
/* Used in builtins.c */ /* Used in builtins.c */
extern rtx h8300_return_addr_rtx (int, rtx); extern rtx h8300_return_addr_rtx (int, rtx);
......
gcc/config/h8300/h8300.c
...@@ -4335,6 +4335,26 @@ byte_accesses_mergeable_p (rtx addr1, rtx addr2) ...@@ -4335,6 +4335,26 @@ byte_accesses_mergeable_p (rtx addr1, rtx addr2)
return 0; return 0;
} }
/* Return nonzero if we have the same comparison insn as I3 two insns
before I3. I3 is assumed to be a comparision insn. */
int
same_cmp_preceding_p (rtx i3)
{
rtx i1, i2;
/* Make sure we have a sequence of three insns. */
i2 = prev_nonnote_insn (i3);
if (i2 == NULL_RTX)
return 0;
i1 = prev_nonnote_insn (i2);
if (i1 == NULL_RTX)
return 0;
return (INSN_P (i1) && rtx_equal_p (PATTERN (i1), PATTERN (i3))
&& any_condjump_p (i2) && onlyjump_p (i2));
}
/* Initialize the GCC target structure. */ /* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE #undef TARGET_ATTRIBUTE_TABLE
......
gcc/config/h8300/h8300.md
...@@ -3968,8 +3968,8 @@ ...@@ -3968,8 +3968,8 @@
;; dead 1 eq/ne dec.l ;; dead 1 eq/ne dec.l
;; dead 2 eq/ne dec.l ;; dead 2 eq/ne dec.l
;; ;;
;; dead 1 geu/ltu shlr.l ;; dead 1 geu/ltu shar.l
;; dead 3 (H8S) geu/ltu shlr.l ;; dead 3 (H8S) geu/ltu shar.l
;; ;;
;; ---- 255 geu/ltu mov.b ;; ---- 255 geu/ltu mov.b
...@@ -4013,7 +4013,7 @@ ...@@ -4013,7 +4013,7 @@
;; ;;
;; into ;; into
;; ;;
;; shlr.w r0 ;; shar.w r0
;; bne .L1 ;; bne .L1
(define_peephole2 (define_peephole2
...@@ -4021,7 +4021,7 @@ ...@@ -4021,7 +4021,7 @@
(compare (match_operand:HI 0 "register_operand" "") (compare (match_operand:HI 0 "register_operand" "")
(match_operand:HI 1 "const_int_operand" ""))) (match_operand:HI 1 "const_int_operand" "")))
(set (pc) (set (pc)
(if_then_else (match_operator 2 "gtuleu_operator" (if_then_else (match_operator 2 "gtle_operator"
[(cc0) (const_int 0)]) [(cc0) (const_int 0)])
(label_ref (match_operand 3 "" "")) (label_ref (match_operand 3 "" ""))
(pc)))] (pc)))]
...@@ -4030,7 +4030,7 @@ ...@@ -4030,7 +4030,7 @@
&& (INTVAL (operands[1]) == 1 && (INTVAL (operands[1]) == 1
|| (TARGET_H8300S && INTVAL (operands[1]) == 3))" || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
[(parallel [(set (match_dup 0) [(parallel [(set (match_dup 0)
(lshiftrt:HI (match_dup 0) (ashiftrt:HI (match_dup 0)
(match_dup 5))) (match_dup 5)))
(clobber (scratch:QI))]) (clobber (scratch:QI))])
(set (cc0) (set (cc0)
...@@ -4039,9 +4039,18 @@ ...@@ -4039,9 +4039,18 @@
(if_then_else (match_dup 4) (if_then_else (match_dup 4)
(label_ref (match_dup 3)) (label_ref (match_dup 3))
(pc)))] (pc)))]
"operands[4] = ((GET_CODE (operands[2]) == GTU) ? "switch (GET_CODE (operands[2]))
gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx) : {
gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx)); case GTU:
operands[4] = gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx);
break;
case LEU:
operands[4] = gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx);
break;
default:
operands[4] = operands[2];
break;
}
operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));") operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));")
;; Transform ;; Transform
...@@ -4112,11 +4121,11 @@ ...@@ -4112,11 +4121,11 @@
;; dead 0xffffff?? except -1 and -2 eq/ne xor.b and not.l ;; dead 0xffffff?? except -1 and -2 eq/ne xor.b and not.l
;; dead 0xffff??ff eq/ne xor.b and not.l ;; dead 0xffff??ff eq/ne xor.b and not.l
;; ;;
;; live 1 geu/ltu copy and shlr.l ;; live 1 geu/ltu copy and shar.l
;; live 3 (H8S) geu/ltu copy and shlr.l ;; live 3 (H8S) geu/ltu copy and shar.l
;; ;;
;; dead 1 geu/ltu shlr.l ;; dead 1 geu/ltu shar.l
;; dead 3 (H8S) geu/ltu shlr.l ;; dead 3 (H8S) geu/ltu shar.l
;; ;;
;; dead 3 (H8/300H) geu/ltu and.b and test ;; dead 3 (H8/300H) geu/ltu and.b and test
;; dead 7 geu/ltu and.b and test ;; dead 7 geu/ltu and.b and test
...@@ -4247,27 +4256,31 @@ ...@@ -4247,27 +4256,31 @@
;; into ;; into
;; ;;
;; mov.l er0,er1 ;; mov.l er0,er1
;; shlr.l er1 ;; shar.l er1
;; bne .L1 ;; bne .L1
;; We avoid this transformation if we see more than one copy of the
;; same compare insn immediately before this one.
(define_peephole2 (define_peephole2
[(match_scratch:SI 4 "r") [(match_scratch:SI 4 "r")
(set (cc0) (set (cc0)
(compare (match_operand:SI 0 "register_operand" "") (compare (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "const_int_operand" ""))) (match_operand:SI 1 "const_int_operand" "")))
(set (pc) (set (pc)
(if_then_else (match_operator 2 "gtuleu_operator" (if_then_else (match_operator 2 "gtle_operator"
[(cc0) (const_int 0)]) [(cc0) (const_int 0)])
(label_ref (match_operand 3 "" "")) (label_ref (match_operand 3 "" ""))
(pc)))] (pc)))]
"(TARGET_H8300H || TARGET_H8300S) "(TARGET_H8300H || TARGET_H8300S)
&& !peep2_reg_dead_p (1, operands[0]) && !peep2_reg_dead_p (1, operands[0])
&& (INTVAL (operands[1]) == 1 && (INTVAL (operands[1]) == 1
|| (TARGET_H8300S && INTVAL (operands[1]) == 3))" || (TARGET_H8300S && INTVAL (operands[1]) == 3))
&& !same_cmp_preceding_p (insn)"
[(set (match_dup 4) [(set (match_dup 4)
(match_dup 0)) (match_dup 0))
(parallel [(set (match_dup 4) (parallel [(set (match_dup 4)
(lshiftrt:SI (match_dup 4) (ashiftrt:SI (match_dup 4)
(match_dup 6))) (match_dup 6)))
(clobber (scratch:QI))]) (clobber (scratch:QI))])
(set (cc0) (set (cc0)
...@@ -4276,9 +4289,18 @@ ...@@ -4276,9 +4289,18 @@
(if_then_else (match_dup 5) (if_then_else (match_dup 5)
(label_ref (match_dup 3)) (label_ref (match_dup 3))
(pc)))] (pc)))]
"operands[5] = ((GET_CODE (operands[2]) == GTU) ? "switch (GET_CODE (operands[2]))
gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx) : {
gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx)); case GTU:
operands[5] = gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx);
break;
case LEU:
operands[5] = gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx);
break;
default:
operands[5] = operands[2];
break;
}
operands[6] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));") operands[6] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));")
;; Transform ;; Transform
...@@ -4288,7 +4310,7 @@ ...@@ -4288,7 +4310,7 @@
;; ;;
;; into ;; into
;; ;;
;; shlr.l er0 ;; shar.l er0
;; bne .L1 ;; bne .L1
(define_peephole2 (define_peephole2
...@@ -4296,7 +4318,7 @@ ...@@ -4296,7 +4318,7 @@
(compare (match_operand:SI 0 "register_operand" "") (compare (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "const_int_operand" ""))) (match_operand:SI 1 "const_int_operand" "")))
(set (pc) (set (pc)
(if_then_else (match_operator 2 "gtuleu_operator" (if_then_else (match_operator 2 "gtle_operator"
[(cc0) (const_int 0)]) [(cc0) (const_int 0)])
(label_ref (match_operand 3 "" "")) (label_ref (match_operand 3 "" ""))
(pc)))] (pc)))]
...@@ -4305,7 +4327,7 @@ ...@@ -4305,7 +4327,7 @@
&& (INTVAL (operands[1]) == 1 && (INTVAL (operands[1]) == 1
|| (TARGET_H8300S && INTVAL (operands[1]) == 3))" || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
[(parallel [(set (match_dup 0) [(parallel [(set (match_dup 0)
(lshiftrt:SI (match_dup 0) (ashiftrt:SI (match_dup 0)
(match_dup 5))) (match_dup 5)))
(clobber (scratch:QI))]) (clobber (scratch:QI))])
(set (cc0) (set (cc0)
...@@ -4314,9 +4336,18 @@ ...@@ -4314,9 +4336,18 @@
(if_then_else (match_dup 4) (if_then_else (match_dup 4)
(label_ref (match_dup 3)) (label_ref (match_dup 3))
(pc)))] (pc)))]
"operands[4] = ((GET_CODE (operands[2]) == GTU) ? "switch (GET_CODE (operands[2]))
gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx) : {
gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx)); case GTU:
operands[4] = gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx);
break;
case LEU:
operands[4] = gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx);
break;
default:
operands[4] = operands[2];
break;
}
operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));") operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));")
;; Transform ;; Transform
......
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