Commit 02147868 by Uros Bizjak

cpuid.h (__cpuid): Remove definitions that handle %ebx register in a special way.

	* config/i386/cpuid.h (__cpuid): Remove definitions that handle %ebx
	register in a special way.
	(__cpuid_count): Ditto.
	* config/i386/driver-i386.h: Protect with
	"#if defined(__GNUC__) && (__GNUC__ >= 5 || !defined(__PIC__))".
	(host_detect_local_cpu): Mention that GCC with non-fixed %ebx
	is required to compile the function.

From-SVN: r216362
parent 5fcffe51
...@@ -146,55 +146,6 @@ ...@@ -146,55 +146,6 @@
#define signature_VORTEX_ecx 0x436f5320 #define signature_VORTEX_ecx 0x436f5320
#define signature_VORTEX_edx 0x36387865 #define signature_VORTEX_edx 0x36387865
#if defined(__i386__) && defined(__PIC__)
/* %ebx may be the PIC register. */
#if __GNUC__ >= 3
#define __cpuid(level, a, b, c, d) \
__asm__ ("xchg{l}\t{%%}ebx, %k1\n\t" \
"cpuid\n\t" \
"xchg{l}\t{%%}ebx, %k1\n\t" \
: "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
: "0" (level))
#define __cpuid_count(level, count, a, b, c, d) \
__asm__ ("xchg{l}\t{%%}ebx, %k1\n\t" \
"cpuid\n\t" \
"xchg{l}\t{%%}ebx, %k1\n\t" \
: "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
: "0" (level), "2" (count))
#else
/* Host GCCs older than 3.0 weren't supporting Intel asm syntax
nor alternatives in i386 code. */
#define __cpuid(level, a, b, c, d) \
__asm__ ("xchgl\t%%ebx, %k1\n\t" \
"cpuid\n\t" \
"xchgl\t%%ebx, %k1\n\t" \
: "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
: "0" (level))
#define __cpuid_count(level, count, a, b, c, d) \
__asm__ ("xchgl\t%%ebx, %k1\n\t" \
"cpuid\n\t" \
"xchgl\t%%ebx, %k1\n\t" \
: "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
: "0" (level), "2" (count))
#endif
#elif defined(__x86_64__) && (defined(__code_model_medium__) || defined(__code_model_large__)) && defined(__PIC__)
/* %rbx may be the PIC register. */
#define __cpuid(level, a, b, c, d) \
__asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \
"cpuid\n\t" \
"xchg{q}\t{%%}rbx, %q1\n\t" \
: "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
: "0" (level))
#define __cpuid_count(level, count, a, b, c, d) \
__asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \
"cpuid\n\t" \
"xchg{q}\t{%%}rbx, %q1\n\t" \
: "=a" (a), "=&r" (b), "=c" (c), "=d" (d) \
: "0" (level), "2" (count))
#else
#define __cpuid(level, a, b, c, d) \ #define __cpuid(level, a, b, c, d) \
__asm__ ("cpuid\n\t" \ __asm__ ("cpuid\n\t" \
: "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
...@@ -204,7 +155,7 @@ ...@@ -204,7 +155,7 @@
__asm__ ("cpuid\n\t" \ __asm__ ("cpuid\n\t" \
: "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
: "0" (level), "2" (count)) : "0" (level), "2" (count))
#endif
/* Return highest supported input value for cpuid instruction. ext can /* Return highest supported input value for cpuid instruction. ext can
be either 0x0 or 0x8000000 to return highest supported value for be either 0x0 or 0x8000000 to return highest supported value for
......
...@@ -24,7 +24,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -24,7 +24,7 @@ along with GCC; see the file COPYING3. If not see
const char *host_detect_local_cpu (int argc, const char **argv); const char *host_detect_local_cpu (int argc, const char **argv);
#ifdef __GNUC__ #if defined(__GNUC__) && (__GNUC__ >= 5 || !defined(__PIC__))
#include "cpuid.h" #include "cpuid.h"
struct cache_desc struct cache_desc
...@@ -942,9 +942,9 @@ done: ...@@ -942,9 +942,9 @@ done:
} }
#else #else
/* If we aren't compiling with GCC then the driver will just ignore /* If we are compiling with GCC where %EBX register is fixed, then the
-march and -mtune "native" target and will leave to the newly driver will just ignore -march and -mtune "native" target and will leave
built compiler to generate code for its default target. */ to the newly built compiler to generate code for its default target. */
const char *host_detect_local_cpu (int, const char **) const char *host_detect_local_cpu (int, const char **)
{ {
......
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