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riscv-gcc-1
Commit 01d74729 by Jim Wilson
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(INITIALIZE_TRAMPOLINE): Likewise for cacheflush. 

From-SVN: r10812
parent 2973b444
Showing with 2 additions and 3 deletions
gcc/config/mips/mips.h
...@@ -2162,12 +2162,11 @@ typedef struct mips_args { ...@@ -2162,12 +2162,11 @@ typedef struct mips_args {
} \ } \
\ \
/* Flush the instruction cache. */ \ /* Flush the instruction cache. */ \
/* ??? Are the modes right? Maybe they should depend on -mint64/-mlong64? */\
/* ??? Should check the return value for errors. */ \ /* ??? Should check the return value for errors. */ \
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"), \ emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"), \
0, VOIDmode, 3, addr, Pmode, \ 0, VOIDmode, 3, addr, Pmode, \
GEN_INT (TRAMPOLINE_SIZE), SImode, \ GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\
GEN_INT (1), SImode); \ GEN_INT (1), TYPE_MODE (integer_type_node)); \
} }
/* Addressing modes, and classification of registers for them. */ /* Addressing modes, and classification of registers for them. */
......
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