Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
01c82bbb
Commit
01c82bbb
authored
Feb 13, 1996
by
Richard Kenner
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
(force_to_mode, num_sign_bit_copies, simplify_comparison): Fix
precedence errors. From-SVN: r11251
parent
9f6de2b9
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
7 additions
and
7 deletions
+7
-7
gcc/combine.c
+7
-7
No files found.
gcc/combine.c
View file @
01c82bbb
...
...
@@ -5927,7 +5927,7 @@ force_to_mode (x, mode, mask, reg, just_select)
+
floor_log2
(
INTVAL
(
XEXP
(
x
,
1
))))
<
GET_MODE_BITSIZE
(
GET_MODE
(
x
)))
&&
(
INTVAL
(
XEXP
(
x
,
1
))
&
~
nonzero_bits
(
XEXP
(
x
,
0
),
GET_MODE
(
x
))
==
0
)
)
&
~
nonzero_bits
(
XEXP
(
x
,
0
),
GET_MODE
(
x
))
)
==
0
)
{
temp
=
GEN_INT
((
INTVAL
(
XEXP
(
x
,
1
))
&
mask
)
<<
INTVAL
(
XEXP
(
XEXP
(
x
,
0
),
1
)));
...
...
@@ -7449,8 +7449,8 @@ num_sign_bit_copies (x, mode)
&&
bitwidth
<=
HOST_BITS_PER_WIDE_INT
&&
((
nonzero_bits
(
XEXP
(
x
,
0
),
mode
)
&
((
HOST_WIDE_INT
)
1
<<
(
bitwidth
-
1
)))
!=
0
)
&&
(
nonzero_bits
(
XEXP
(
x
,
1
),
mode
)
&
((
HOST_WIDE_INT
)
1
<<
(
bitwidth
-
1
))
!=
0
))
&&
(
(
nonzero_bits
(
XEXP
(
x
,
1
),
mode
)
&
((
HOST_WIDE_INT
)
1
<<
(
bitwidth
-
1
))
)
!=
0
))
result
--
;
return
MAX
(
1
,
result
);
...
...
@@ -8885,10 +8885,10 @@ simplify_comparison (code, pop0, pop1)
==
GET_MODE
(
SUBREG_REG
(
inner_op1
)))
&&
(
GET_MODE_BITSIZE
(
GET_MODE
(
SUBREG_REG
(
op0
)))
<=
HOST_BITS_PER_WIDE_INT
)
&&
(
0
==
(
~
c0
)
&
nonzero_bits
(
SUBREG_REG
(
inner_op0
),
GET_MODE
(
SUBREG_REG
(
op0
))))
&&
(
0
==
(
~
c1
)
&
nonzero_bits
(
SUBREG_REG
(
inner_op1
),
GET_MODE
(
SUBREG_REG
(
inner_op1
)))))
&&
(
0
==
(
(
~
c0
)
&
nonzero_bits
(
SUBREG_REG
(
inner_op0
),
GET_MODE
(
SUBREG_REG
(
op0
))))
)
&&
(
0
==
(
(
~
c1
)
&
nonzero_bits
(
SUBREG_REG
(
inner_op1
),
GET_MODE
(
SUBREG_REG
(
inner_op1
)))))
)
{
op0
=
SUBREG_REG
(
inner_op0
);
op1
=
SUBREG_REG
(
inner_op1
);
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment