Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
01c0e9dc
Commit
01c0e9dc
authored
Feb 28, 1992
by
Jim Wilson
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
*** empty log message ***
From-SVN: r365
parent
400fbf9f
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
5 additions
and
4 deletions
+5
-4
gcc/config/sparc/sparc.c
+5
-4
No files found.
gcc/config/sparc/sparc.c
View file @
01c0e9dc
...
@@ -620,7 +620,7 @@ legitimize_pic_address (orig, mode, reg, scratch)
...
@@ -620,7 +620,7 @@ legitimize_pic_address (orig, mode, reg, scratch)
if
(
reg
==
0
)
if
(
reg
==
0
)
{
{
if
(
reload_in_progress
)
if
(
reload_in_progress
||
reload_completed
)
abort
();
abort
();
else
else
reg
=
gen_reg_rtx
(
Pmode
);
reg
=
gen_reg_rtx
(
Pmode
);
...
@@ -631,7 +631,8 @@ legitimize_pic_address (orig, mode, reg, scratch)
...
@@ -631,7 +631,8 @@ legitimize_pic_address (orig, mode, reg, scratch)
/* If not during reload, allocate another temp reg here for loading
/* If not during reload, allocate another temp reg here for loading
in the address, so that these instructions can be optimized
in the address, so that these instructions can be optimized
properly. */
properly. */
rtx
temp_reg
=
(
reload_in_progress
?
reg
:
gen_reg_rtx
(
Pmode
));
rtx
temp_reg
=
((
reload_in_progress
||
reload_completed
)
?
reg
:
gen_reg_rtx
(
Pmode
));
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
temp_reg
,
emit_insn
(
gen_rtx
(
SET
,
VOIDmode
,
temp_reg
,
gen_rtx
(
HIGH
,
Pmode
,
orig
)));
gen_rtx
(
HIGH
,
Pmode
,
orig
)));
...
@@ -664,7 +665,7 @@ legitimize_pic_address (orig, mode, reg, scratch)
...
@@ -664,7 +665,7 @@ legitimize_pic_address (orig, mode, reg, scratch)
if
(
reg
==
0
)
if
(
reg
==
0
)
{
{
if
(
reload_in_progress
)
if
(
reload_in_progress
||
reload_completed
)
abort
();
abort
();
else
else
reg
=
gen_reg_rtx
(
Pmode
);
reg
=
gen_reg_rtx
(
Pmode
);
...
@@ -684,7 +685,7 @@ legitimize_pic_address (orig, mode, reg, scratch)
...
@@ -684,7 +685,7 @@ legitimize_pic_address (orig, mode, reg, scratch)
{
{
if
(
SMALL_INT
(
offset
))
if
(
SMALL_INT
(
offset
))
return
plus_constant_for_output
(
base
,
INTVAL
(
offset
));
return
plus_constant_for_output
(
base
,
INTVAL
(
offset
));
else
if
(
!
reload_in_progress
)
else
if
(
!
reload_in_progress
&&
!
reload_completed
)
offset
=
force_reg
(
Pmode
,
offset
);
offset
=
force_reg
(
Pmode
,
offset
);
/* We can't create any new registers during reload, so use the
/* We can't create any new registers during reload, so use the
SCRATCH reg provided by the reload_insi pattern. */
SCRATCH reg provided by the reload_insi pattern. */
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment