Commit 00a3a76a by Andrew Stubbs Committed by Andrew Stubbs

arm.c (neon_valid_immediate): Allow const_int.

2012-04-30  Andrew Stubbs  <ams@codesourcery.com>

	* config/arm/arm.c (neon_valid_immediate): Allow const_int.
	(arm_print_operand): Add 'x' format.
	* config/arm/constraints.md (Dn): Allow const_int.
	* config/arm/neon.md (neon_mov<mode>): Use VDX to allow DImode.
	Use 'x' format to print constants.
	* config/arm/predicates.md (imm_for_neon_mov_operand): Allow const_int.
	* config/arm/vfp.md (movdi_vfp): Disable for const_int when neon
	is enabled.
	(movdi_vfp_cortexa8): Likewise.

From-SVN: r186983
parent 84ba0835
2012-04-30 Andrew Stubbs <ams@codesourcery.com>
* config/arm/arm.c (neon_valid_immediate): Allow const_int.
(arm_print_operand): Add 'x' format.
* config/arm/constraints.md (Dn): Allow const_int.
* config/arm/neon.md (neon_mov<mode>): Use VDX to allow DImode.
Use 'x' format to print constants.
* config/arm/predicates.md (imm_for_neon_mov_operand): Allow const_int.
* config/arm/vfp.md (movdi_vfp): Disable for const_int when neon
is enabled.
(movdi_vfp_cortexa8): Likewise.
2012-04-30 Ian Bolton <ian.bolton@arm.com>
Sameera Deshpande <sameera.deshpande@arm.com>
Greta Yorsh <greta.yorsh@arm.com>
......
......@@ -8911,11 +8911,25 @@ neon_valid_immediate (rtx op, enum machine_mode mode, int inverse,
break; \
}
unsigned int i, elsize = 0, idx = 0, n_elts = CONST_VECTOR_NUNITS (op);
unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
unsigned int i, elsize = 0, idx = 0, n_elts;
unsigned int innersize;
unsigned char bytes[16];
int immtype = -1, matches;
unsigned int invmask = inverse ? 0xff : 0;
bool vector = GET_CODE (op) == CONST_VECTOR;
if (vector)
{
n_elts = CONST_VECTOR_NUNITS (op);
innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
}
else
{
n_elts = 1;
if (mode == VOIDmode)
mode = DImode;
innersize = GET_MODE_SIZE (mode);
}
/* Vectors of float constants. */
if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
......@@ -8951,7 +8965,7 @@ neon_valid_immediate (rtx op, enum machine_mode mode, int inverse,
/* Splat vector constant out into a byte vector. */
for (i = 0; i < n_elts; i++)
{
rtx el = CONST_VECTOR_ELT (op, i);
rtx el = vector ? CONST_VECTOR_ELT (op, i) : op;
unsigned HOST_WIDE_INT elpart;
unsigned int part, parts;
......@@ -17579,6 +17593,19 @@ arm_print_operand (FILE *stream, rtx x, int code)
}
return;
/* An integer that we want to print in HEX. */
case 'x':
switch (GET_CODE (x))
{
case CONST_INT:
fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX, INTVAL (x));
break;
default:
output_operand_lossage ("Unsupported operand for code '%c'", code);
}
return;
case 'B':
if (GET_CODE (x) == CONST_INT)
{
......
......@@ -260,9 +260,9 @@
(define_constraint "Dn"
"@internal
In ARM/Thumb-2 state a const_vector which can be loaded with a Neon vmov
immediate instruction."
(and (match_code "const_vector")
In ARM/Thumb-2 state a const_vector or const_int which can be loaded with a
Neon vmov immediate instruction."
(and (match_code "const_vector,const_int")
(match_test "TARGET_32BIT
&& imm_for_neon_mov_operand (op, GET_MODE (op))")))
......
......@@ -156,9 +156,9 @@
(define_attr "vqh_mnem" "vadd,vmin,vmax" (const_string "vadd"))
(define_insn "*neon_mov<mode>"
[(set (match_operand:VD 0 "nonimmediate_operand"
[(set (match_operand:VDX 0 "nonimmediate_operand"
"=w,Uv,w, w, ?r,?w,?r,?r, ?Us")
(match_operand:VD 1 "general_operand"
(match_operand:VDX 1 "general_operand"
" w,w, Dn,Uvi, w, r, r, Usi,r"))]
"TARGET_NEON
&& (register_operand (operands[0], <MODE>mode)
......@@ -177,7 +177,7 @@
if (width == 0)
return "vmov.f32\t%P0, %1 @ <mode>";
else
sprintf (templ, "vmov.i%d\t%%P0, %%1 @ <mode>", width);
sprintf (templ, "vmov.i%d\t%%P0, %%x1 @ <mode>", width);
return templ;
}
......
......@@ -504,7 +504,7 @@
})
(define_predicate "imm_for_neon_mov_operand"
(match_code "const_vector")
(match_code "const_vector,const_int")
{
return neon_immediate_valid_for_move (op, mode, NULL, NULL);
})
......
......@@ -138,7 +138,9 @@
(match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))]
"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune != cortexa8
&& ( register_operand (operands[0], DImode)
|| register_operand (operands[1], DImode))"
|| register_operand (operands[1], DImode))
&& !(TARGET_NEON && CONST_INT_P (operands[1])
&& neon_immediate_valid_for_move (operands[1], DImode, NULL, NULL))"
"*
switch (which_alternative)
{
......@@ -187,7 +189,9 @@
(match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))]
"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune == cortexa8
&& ( register_operand (operands[0], DImode)
|| register_operand (operands[1], DImode))"
|| register_operand (operands[1], DImode))
&& !(TARGET_NEON && CONST_INT_P (operands[1])
&& neon_immediate_valid_for_move (operands[1], DImode, NULL, NULL))"
"*
switch (which_alternative)
{
......
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