(andsi3): Changed into define_expand.

(andsi3_internal): Rename from old andsi3, changed condition to !TARGET_5200.
(andsi2_5200): New insn.
(iorsi3): Change into define_expand.
(iorsi2_internal): Rename from old iorsi3, changed condition to !TARGET_5200.
(iorsi2_5200): New insn.
(xorsi3): Change into define_expand.
(xorsi2_internal): Rename from old xorsi3, changed condition to !TARGET_5200.
(xorsi2_5200): New insn.

From-SVN: r13240

gcc/config/m68k/m68k.md

@@ -3431,11 +3431,19 @@
 ;; Prevent AND from being made with sp.  This doesn't exist in the machine
 ;; and reload will cause inefficient code.  Since sp is a FIXED_REG, we
 ;; can't allocate pseudos into it.
-(define_insn "andsi3"
+
+(define_expand "andsi3"
   [(set (match_operand:SI 0 "not_sp_operand" "=m,d")
 	(and:SI (match_operand:SI 1 "general_operand" "%0,0")
 		(match_operand:SI 2 "general_operand" "dKs,dmMs")))]
   ""
+  "")
+
+(define_insn "andsi3_internal"
+  [(set (match_operand:SI 0 "not_sp_operand" "=m,d")
+	(and:SI (match_operand:SI 1 "general_operand" "%0,0")
+		(match_operand:SI 2 "general_operand" "dKs,dmMs")))]
+  "!TARGET_5200"
   "*
 {
   int logval;
@@ -3476,6 +3484,13 @@
   return \"and%.l %2,%0\";
 }")
 
+(define_insn "andsi3_5200"
+  [(set (match_operand:SI 0 "not_sp_operand" "=m,d")
+	(and:SI (match_operand:SI 1 "general_operand" "%0,0")
+		(match_operand:SI 2 "general_operand" "d,dmsK")))]
+  "TARGET_5200"
+  "and%.l %2,%0")
+
 (define_insn "andhi3"
   [(set (match_operand:HI 0 "general_operand" "=m,d")
 	(and:HI (match_operand:HI 1 "general_operand" "%0,0")
@@ -3520,11 +3535,18 @@
 
 ;; inclusive-or instructions
 
-(define_insn "iorsi3"
+(define_expand "iorsi3"
+  [(set (match_operand:SI 0 "general_operand" "")
+	(ior:SI (match_operand:SI 1 "general_operand" "")
+		(match_operand:SI 2 "general_operand" "")))]
+  ""
+  "")
+
+(define_insn "iorsi3_internal"
   [(set (match_operand:SI 0 "general_operand" "=m,d")
 	(ior:SI (match_operand:SI 1 "general_operand" "%0,0")
 		(match_operand:SI 2 "general_operand" "dKs,dmMs")))]
-  ""
+  "!TARGET_5200"
   "*
 {
   register int logval;
@@ -3560,6 +3582,13 @@
   return \"or%.l %2,%0\";
 }")
 
+(define_insn "iorsi3_5200"
+  [(set (match_operand:SI 0 "general_operand" "=m,d")
+	(ior:SI (match_operand:SI 1 "general_operand" "%0,0")
+		(match_operand:SI 2 "general_operand" "d,dmsK")))]
+  "TARGET_5200"
+  "or%.l %2,%0")
+
 (define_insn "iorhi3"
   [(set (match_operand:HI 0 "general_operand" "=m,d")
 	(ior:HI (match_operand:HI 1 "general_operand" "%0,0")
@@ -3623,11 +3652,18 @@
 
 ;; xor instructions
 
-(define_insn "xorsi3"
+(define_expand "xorsi3"
+  [(set (match_operand:SI 0 "general_operand" "")
+	(xor:SI (match_operand:SI 1 "general_operand" "")
+		(match_operand:SI 2 "general_operand" "")))]
+  ""
+  "")
+
+(define_insn "xorsi3_internal"
   [(set (match_operand:SI 0 "general_operand" "=do,m")
 	(xor:SI (match_operand:SI 1 "general_operand" "%0,0")
 		(match_operand:SI 2 "general_operand" "di,dKs")))]
-  ""
+  "!TARGET_5200"
   "*
 {
   if (GET_CODE (operands[2]) == CONST_INT
@@ -3644,6 +3680,13 @@
   return \"eor%.l %2,%0\";
 }")
 
+(define_insn "xorsi3_5200"
+  [(set (match_operand:SI 0 "general_operand" "=dm")
+	(xor:SI (match_operand:SI 1 "general_operand" "%0")
+		(match_operand:SI 2 "general_operand" "dn")))]
+  "TARGET_5200"
+  "eor%.l %2,%0")
+
 (define_insn "xorhi3"
   [(set (match_operand:HI 0 "general_operand" "=dm")
 	(xor:HI (match_operand:HI 1 "general_operand" "%0")