fwprop.c
47.4 KB
-
[26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications · 6b9c3dec
This patch adds is_a <scalar_int_mode> checks to various places that were optimising subregs or extractions in ways that only made sense for scalar integers. Often the subreg transformations were looking for extends, truncates or shifts and trying to remove the subreg, which wouldn't be correct if the SUBREG_REG was a vector rather than a scalar. The simplify_binary_operation_1 part also removes a redundant: GET_MODE (opleft) == GET_MODE (XEXP (opright, 0)) since this must be true for: (ior A (lshifrt B ...)) A == opleft, B == XEXP (opright, 0) 2017-08-30 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * combine.c (find_split_point): Add is_a <scalar_int_mode> checks. (make_compound_operation_int): Likewise. (change_zero_ext): Likewise. * expr.c (convert_move): Likewise. (convert_modes): Likewise. * fwprop.c (forward_propagate_subreg): Likewise. * loop-iv.c (get_biv_step_1): Likewise. * optabs.c (widen_operand): Likewise. * postreload.c (move2add_valid_value_p): Likewise. * recog.c (simplify_while_replacing): Likewise. * simplify-rtx.c (simplify_unary_operation_1): Likewise. (simplify_binary_operation_1): Likewise. Remove redundant mode equality check. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251478
Richard Sandiford committed