This is a follow-on to earlier commits for adding compatibility implementations of x86 intrinsics for PPC64LE.

This is a follow-on to earlier commits for adding compatibility
implementations of x86 intrinsics for PPC64LE.  This is the first of
two patches.  This patch adds 11 of the 13 x86 intrinsics from
<pmmintrin.h> ("SSE3").  (Patch 2/2 adds tests for these intrinsics,
and briefly describes the tests performed.)

Implementations are relatively straightforward, with occasional
extra effort for vector element ordering.

Not implemented are _mm_wait and _mm_monitor, as there are no
direct or trivial analogs in the POWER ISA.

./gcc/ChangeLog:
2018-10-05  Paul A. Clarke  <pc@us.ibm.com>

	* config.gcc (powerpc*-*-*): Add pmmintrin.h to extra_headers.
	* config/rs6000/pmmintrin.h: New file.

From-SVN: r264991