gcc/testsuite/gcc.target/powerpc/pr47862.c · b51dcb5909828c6085a2e9dd5a27d8c8b93b3ca2 · lvzhengyang / riscv-gcc-1

re PR rtl-optimization/47862 (Incorrect code for spilling a vector register) · 79eefb0d

        PR target/47862
        * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
        * config/rs6000/e500.h (HARD_REGNO_CALLER_SAVE_MODE): Undefine
        before definition.

        * testsuite/gcc.target/powerpc/pr47862.c: New.

From-SVN: r170748

committed Mar 07, 2011

79eefb0d

pr47862.c 671 Bytes