The RTXs used to express an overflow condition check in add/sub/mul are
too complex for if conversion.  However, there is code in
noce_emit_store_flag which generates a simple CC compare as the base
for using a conditional load.  All we have to do is to provide a
pattern to store the truth value of a CC compare into a GPR.

Done with the attached patch.

2019-11-07  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390.md ("*cstorecc<mode>_z13"): New insn_and_split
	pattern.

gcc/testsuite/ChangeLog:

2019-11-07  Andreas Krebbel  <krebbel@linux.ibm.com>

	* gcc.target/s390/addsub-signed-overflow-1.c: Expect lochi
	instructions to be used.
	* gcc.target/s390/addsub-signed-overflow-2.c: Likewise.
	* gcc.target/s390/mul-signed-overflow-1.c: Likewise.
	* gcc.target/s390/mul-signed-overflow-2.c: Likewise.
	* gcc.target/s390/vector/vec-scalar-cmp-1.c: Check for 32 and 64
	bit variant of lochi.  Swap the values for the lochi's.
	* gcc.target/s390/zvector/vec-cmp-1.c: Likewise.

From-SVN: r277922