This patch causes the expansion of adddi3 to split the operation
immediately for Arm and Thumb-2.  This is desirable as it frees up the
register allocator to pick what ever combination of registers suits
best and reduces the number of auxiliary patterns that we need in the
back-end.  Three of the testcases that we disabled earlier are already
fixed by this patch.  Finally, we add a new pattern to match the
canonicalization of add-with-carry when using an immediate of zero.

gcc:
	* config/arm/arm-protos.h (arm_decompose_di_binop): New prototype.
	* config/arm/arm.c (arm_decompose_di_binop): New function.
	* config/arm/arm.md (adddi3): Also accept any const_int for op2.
	If not generating Thumb-1 code, decompose the operation into 32-bit
	pieces.
	* add0si_carryin_<optab>: New pattern.

testsuite:
	* gcc.target/arm/pr53447-1.c: Remove XFAIL.
	* gcc.target/arm/pr53447-3.c: Remove XFAIL.
	* gcc.target/arm/pr53447-4.c: Remove XFAIL.

From-SVN: r277165