Merge pull request #14 from TILOS-AI-Institute/flow_scripts

Flow scripts

Flows/NanGate45/ariane133/README.md

@@ -4,8 +4,15 @@ We implement [Ariane design with 133 macros](../../../Testcases/ariane133) on th
 ## *Macro Placement Generated by Cadence Flow-1*
 The screenshot of the design using Cadence Flow-1 on Nangate45 enablement is shown below.   
 <img src="./screenshots/Ariane133_Innovus.png" alt="ariane133_cadence" width="400"/>  
-  
-## *Macro Placement Generated by ORFS*
+
+|Physical Design Stage|Core Area (um^2)|Standard Cell Area (um^2)|Macro Area (um^2)|Total Power (mW)|Wirelength(um)|WS(ns)|TNS(ns)|Congestion(H)|Congestion(V)|
+|---------------------|----------------|-------------------------|-----------------|----------------|--------------|------|-------|-------------|-------------|
+|preCTS               |2560080    |213764                |1018356       |285    |3488909 |0.009 |0.000  |0.00%        |0.00%        |
+|postCTS              |2560080    |214818                |1018356       |297    |3492066 |0.000 |0.000  |0.00%        |0.00%        |
+|postRoute            |2560080    |214818                |1018356       |297    |3598577 |0.189 |0.000  |             |             |
+
+
+## *Macro Placement Generated by ORFS (Flow-3)*
 The screenshot of the design using ORFS on Nangate45 enablement is shown below.  
 <img src="./screenshots/Ariane133_ORFS.png" alt="ariane136_orfs" width="400"/>
 
@@ -20,51 +27,10 @@ Note that this human-constructed macro placement can serve as a competitive base
 The metrics reported by the Innovus tool after different physical design stages are shown below. 
 Note that (1) we set the activity factor to 0.2 in our flow; (2) the standard cell area does not include physical cells; (3) In order to match [Nature paper](https://www.nature.com/articles/s41586-021-03544-w), we adjust the pin positions to occupy about 60% of the left boundary; and (4) the total macro area for ariane133 (NanGate45) is 1018356um^2, and the overall utilization is 48.228%.  
 
+|Physical Design Stage|Core Area (um^2)|Standard Cell Area (um^2)|Macro Area (um^2)|Total Power (mW)|Wirelength(um)|WS(ns)|TNS(ns)|Congestion(H)|Congestion(V)|
+|---------------------|----------------|-------------------------|-----------------|----------------|--------------|------|-------|-------------|-------------|
+|preCTS               |2560080    |215189               |1018356       |286    |4470832 |-0.002|-0.005 |0.00%        |0.00%        |
+|postCTS              |2560080    |216323               |1018356       |300    |4472866 |0.001 |0.000  |0.00%        |0.00%        |
+|postRoute            |2560080    |216323               |1018356       |299    |4587141 |0.284 |0.000  |             |             |
 
-<table class="tg">
-<thead>
-  <tr>
-    <th class="tg-0lax">Stage in Physical Design</th>
-    <th class="tg-0lax">Core Area (um^2)</th>
-    <th class="tg-0lax">Standard Cell Area (um^2)</th>
-    <th class="tg-0lax">Total Power (mW)</th>
-    <th class="tg-0lax">Wirelength (m)</th>
-    <th class="tg-0lax">WNS (ps)</th>
-    <th class="tg-0lax">TNS (ns)</th>
-  </tr>
-</thead>
-<tbody>
-  <tr>
-    <td class="tg-0lax">Post-placement</td>
-    <td class="tg-0lax">2560080</td>
-    <td class="tg-0lax">215189</td>
-    <td class="tg-0lax">0.29</td>
-    <td class="tg-0lax">4.47</td>
-    <td class="tg-0lax">-2</td>
-    <td class="tg-0lax">-0.05</td>   
-  </tr>
-</tbody>
-<tbody>
-  <tr>
-    <td class="tg-0lax">Post-CTS</td>
-    <td class="tg-0lax">2560080</td>
-    <td class="tg-0lax">216326</td>
-    <td class="tg-0lax">0.30</td>
-    <td class="tg-0lax">4.47</td>
-    <td class="tg-0lax">1</td>
-    <td class="tg-0lax">0</td>   
-  </tr>
-</tbody>
-<tbody>
-  <tr>
-    <td class="tg-0lax">Post-Routing</td>
-    <td class="tg-0lax">2560080</td>
-    <td class="tg-0lax">216326</td>
-    <td class="tg-0lax">0.30</td>
-    <td class="tg-0lax">4.59</td>
-    <td class="tg-0lax">62</td>
-    <td class="tg-0lax">0</td>   
-  </tr>
-</tbody>
-</table>