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macroplacement
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lvzhengyang
macroplacement
Commits
1e54dc1e
Commit
1e54dc1e
authored
Jun 06, 2022
by
sakundu
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Updated Ariane 133 scripts
parent
330dc612
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2 changed files
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14 additions
and
13 deletions
+14
-13
Flows/NanGate45/ariane136/scripts/cadence/rtl_list.tcl
+13
-12
Flows/NanGate45/ariane136/scripts/cadence/run_genus.tcl
+1
-1
No files found.
Flows/NanGate45/ariane136/scripts/cadence/rtl_list.tcl
View file @
1e54dc1e
set
rtl_all
{
../../rtl/dm_pkg.sv
../../rtl/riscv_pkg.sv
../../rtl/axi_pkg.sv
../../rtl/ariane_pkg.sv
../../rtl/alu.sv
../../rtl/amo_alu.sv
../../rtl/amo_buffer.sv
../../rtl/apb_to_reg.sv
../../rtl/ariane_axi_pkg.sv
../../rtl/ariane_pkg.sv
../../rtl/ariane_regfile_ff.sv
../../rtl/ariane.sv
../../rtl/axi2apb_64_32.sv
...
...
@@ -19,7 +21,6 @@ set rtl_all {
../../rtl/axi_lite_interface.sv
../../rtl/axi_master_connect_rev.sv
../../rtl/axi_master_connect.sv
../../rtl/axi_pkg.sv
../../rtl/axi_r_buffer.sv
../../rtl/axi_single_slice.sv
../../rtl/axi_slave_connect_rev.sv
...
...
@@ -31,7 +32,6 @@ set rtl_all {
../../rtl/bootrom.sv
../../rtl/branch_unit.sv
../../rtl/btb.sv
../../rtl/cache_ctrl.sv
../../rtl/cdc_2phase.sv
../../rtl/clint.sv
../../rtl/cluster_clock_inverter.sv
...
...
@@ -47,7 +47,6 @@ set rtl_all {
../../rtl/dmi_jtag.sv
../../rtl/dmi_jtag_tap.sv
../../rtl/dm_mem.sv
../../rtl/dm_pkg.sv
../../rtl/dm_sba.sv
../../rtl/dm_top.sv
../../rtl/ex_stage.sv
...
...
@@ -65,7 +64,6 @@ set rtl_all {
../../rtl/lfsr_8bit.sv
../../rtl/load_store_unit.sv
../../rtl/load_unit.sv
../../rtl/miss_handler.sv
../../rtl/mmu.sv
../../rtl/multiplier.sv
../../rtl/mult.sv
...
...
@@ -83,7 +81,6 @@ set rtl_all {
../../rtl/ras.sv
../../rtl/reg_intf.sv
../../rtl/re_name.sv
../../rtl/riscv_pkg.sv
../../rtl/rrarbiter.sv
../../rtl/rstgen_bypass.sv
../../rtl/scoreboard.sv
...
...
@@ -101,14 +98,18 @@ set rtl_all {
../../rtl/sram.sv
../../rtl/std_cache_pkg.sv
../../rtl/std_cache_subsystem.sv
../../rtl/std_icache.sv
../../rtl/std_nbdcache.sv
../../rtl/store_buffer.sv
../../rtl/store_unit.sv
../../rtl/SyncSpRamBeNx64.sv
../../rtl/sync_wedge.sv
../../rtl/tlb.sv
../../rtl/std_icache.sv
../../rtl/std_nbdcache.sv
../../rtl/stream_arbiter.sv
../../rtl/stream_demux.sv
../../rtl/stream_mux.sv
../../rtl/sync_wedge.sv
../../rtl/stream_demux.sv
../../rtl/cache_ctrl.sv
../../rtl/miss_handler.sv
../../rtl/amo_alu.sv
../../rtl/tag_cmp.sv
../../rtl/tlb.sv
}
Flows/NanGate45/ariane136/scripts/cadence/run_genus.tcl
View file @
1e54dc1e
...
...
@@ -52,7 +52,7 @@ elaborate $top_module
# Default SDC Constraints
read_sdc ./$
{
top_module
}
.sdc
read_sdc .
./../constraints
/$
{
top_module
}
.sdc
syn_generic
syn_map
...
...
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