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rtl_list.tcl 3.42 KB
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Updated MemPool Group Scripts, RTL and DEF for NG45
41bbeda6
 
sakundu committed
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set rtl_all {
./deps/axi/src/axi_pkg.sv
./deps/common_cells/src/cf_math_pkg.sv
./deps/snitch/src/snitch_icache/snitch_icache_pkg.sv
./deps/snitch/src/riscv_instr.sv
./deps/snitch/src/snitch_pkg.sv
./src/mempool_pkg.sv
./deps/axi/src/axi_id_remap.sv
./deps/axi/src/axi_xbar.sv
./deps/reqrsp_interface/src/reqrsp_pkg.sv
./deps/cluster_interconnect/rtl/variable_latency_interconnect/addr_decoder.sv
./deps/cluster_interconnect/rtl/variable_latency_interconnect/simplex_xbar.sv
./deps/cluster_interconnect/rtl/variable_latency_interconnect/full_duplex_xbar.sv
./deps/cluster_interconnect/rtl/tcdm_interconnect/tcdm_interconnect_pkg.sv
./deps/cluster_interconnect/rtl/variable_latency_interconnect/variable_latency_interconnect.sv
./deps/snitch/src/snitch_ipu.sv
./src/tcdm_wide_narrow_mux.sv
./deps/snitch/src/snitch_icache/snitch_icache.sv
./deps/snitch/src/snitch_icache/snitch_icache_handler.sv
./deps/snitch/src/snitch_icache/snitch_icache_l0.sv
./deps/snitch/src/snitch_icache/snitch_icache_lfsr.sv
./deps/snitch/src/snitch_icache/snitch_icache_refill.sv
../../../../../Testcases/mempool/rtl/tech_cells_generic/src/rtl/tc_sram.sv
./deps/axi/src/axi_id_prepend.sv
./deps/idma/src/axi_dma_data_path.sv
./deps/common_cells/src/stream_register.sv
./deps/common_cells/src/spill_register.sv
./deps/common_cells/src/cc_onehot.sv
./deps/snitch/src/snitch_icache/snitch_icache_lookup_serial.sv
./deps/common_cells/src/stream_fork.sv
./deps/common_cells/src/stream_fork_dynamic.sv
./deps/common_cells/src/stream_join.sv
./deps/common_cells/src/fall_through_register.sv
./deps/common_cells/src/stream_xbar.sv
./deps/snitch/src/snitch_demux.sv
./deps/axi/src/axi_demux.sv
./deps/axi/src/axi_err_slv.sv
./deps/reqrsp_interface/src/axi_to_reqrsp.sv
./deps/common_cells/src/delta_counter.sv
./deps/reqrsp_interface/src/reqrsp_demux.sv
./deps/snitch/src/snitch_axi_adapter.sv
./deps/snitch/src/snitch_read_only_cache/snitch_read_only_cache.sv
./deps/snitch/src/snitch_read_only_cache/snitch_axi_to_cache.sv
./deps/snitch/src/snitch_icache/snitch_icache_lookup_parallel.sv
./deps/idma/src/midends/idma_distributed_midend.sv
./deps/idma/src/axi_dma_backend.sv
./deps/idma/src/axi_dma_burst_reshaper.sv
./deps/idma/src/axi_dma_data_mover.sv
./deps/common_cells/src/addr_decode.sv
./deps/axi/src/axi_mux.sv
./deps/axi/src/axi_cut.sv
./deps/axi/src/axi_atop_filter.sv
./deps/common_cells/src/stream_fifo.sv
./deps/common_cells/src/id_queue.sv
./deps/common_cells/src/stream_mux.sv
./deps/common_cells/src/counter.sv
./deps/common_cells/src/spill_register_flushable.sv
./deps/common_cells/src/deprecated/fifo_v2.sv
./deps/common_cells/src/stream_demux.sv
./deps/common_cells/src/rr_arb_tree.sv
./deps/common_cells/src/lzc.sv
./deps/common_cells/src/fifo_v3.sv
./deps/common_cells/src/stream_arbiter.sv
./deps/common_cells/src/stream_arbiter_flushable.sv
./deps/common_cells/src/onehot_to_bin.sv
./deps/snitch/src/snitch_shared_muldiv.sv
./deps/common_cells/src/deprecated/find_first_one.sv
./deps/common_cells/src/isochronous_spill_register.sv
./deps/tech_cells_generic/src/rtl/tc_clk.sv
./deps/snitch/src/snitch_regfile_ff.sv
./deps/snitch/src/snitch_lsu.sv
./deps/snitch/src/snitch.sv
./src/address_scrambler.sv
./src/axi2mem.sv
./src/axi_hier_interco.sv
./src/axi_rab_wrap.sv
./src/bootrom.sv
./src/ctrl_registers.sv
./src/latch_scm.sv
./src/mempool_cc.sv
./src/mempool_cluster.sv
./src/mempool_group.sv
./src/mempool_system.sv
./src/mempool_tile.sv
./src/snitch_addr_demux.sv
./src/tcdm_adapter.sv
./src/tcdm_shim.sv
}