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- 17 Aug, 2014 5 commits
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- 16 Aug, 2014 1 commit
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- 12 Aug, 2014 3 commits
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- 08 Aug, 2014 1 commit
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- 05 Aug, 2014 1 commit
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- 04 Aug, 2014 2 commits
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- 03 Aug, 2014 3 commits
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Changes to the hopelessly limited Verilog parser to skip one-bit bit-ranges, such as [7:7], which seems to help in some cases.
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- 30 Jul, 2014 1 commit
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- 28 Jul, 2014 1 commit
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- 26 Jul, 2014 3 commits
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- 23 Jul, 2014 2 commits
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- 22 Jul, 2014 1 commit
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