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abc
Commit fb51057e by Alan Mishchenko
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Version abc70219

parent 50e0d1de
Showing with 498 additions and 270 deletions
abc.rc
...@@ -57,6 +57,7 @@ alias rv read_verilog ...@@ -57,6 +57,7 @@ alias rv read_verilog
alias rvl read_verlib alias rvl read_verlib
alias rsup read_super mcnc5_old.super alias rsup read_super mcnc5_old.super
alias rlib read_library alias rlib read_library
alias rlibc read_library cadence.genlib
alias rw rewrite alias rw rewrite
alias rwz rewrite -z alias rwz rewrite -z
alias rf refactor alias rf refactor
...@@ -118,10 +119,10 @@ alias fflitmin "compress2rs; ren; sop; ps -f" ...@@ -118,10 +119,10 @@ alias fflitmin "compress2rs; ren; sop; ps -f"
alias t0 "r res.blif; aig; mfs" alias t0 "r res.blif; aig; mfs"
alias t "r res2.blif; aig; mfs" alias t "r res2.blif; aig; mfs"
alias tt "rh a/quip_opt/nut_001_opt.blif" alias tt "r a/quip_opt/nut_001_opt.blif"
alias ttb "wh a/quip_opt/nut_001_opt.blif 1.blif" alias ttb "wh a/quip_opt/nut_001_opt.blif 1.blif"
alias ttv "wh a/quip_opt/nut_001_opt.blif 1.v" alias ttv "wh a/quip_opt/nut_001_opt.blif 1.v"
alias reach "st; ps; compress2; ps; qrel; ps; qreach -v; ps" alias reach "st; ps; compress2; ps; qrel; ps; compress2; ps; qreach -v; ps"
abctestlib.dsw 0 → 100644
Microsoft Developer Studio Workspace File, Format Version 6.00
# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE!
###############################################################################
Project: "abctestlib"=.\abctestlib.dsp - Package Owner=<4>
Package=<5>
{{{
}}}
Package=<4>
{{{
}}}
###############################################################################
Global:
Package=<5>
{{{
}}}
Package=<3>
{{{
}}}
###############################################################################
src/base/abc/abc.h
...@@ -222,6 +222,7 @@ struct Abc_Lib_t_ ...@@ -222,6 +222,7 @@ struct Abc_Lib_t_
Vec_Ptr_t * vModules; // the array of modules Vec_Ptr_t * vModules; // the array of modules
st_table * tModules; // the table hashing module names into their networks st_table * tModules; // the table hashing module names into their networks
Abc_Lib_t * pLibrary; // the library used to map this design Abc_Lib_t * pLibrary; // the library used to map this design
void * pGenlib; // the genlib library used to map this design
}; };
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
...@@ -468,11 +469,11 @@ static inline void Abc_ObjSetMvVar( Abc_Obj_t * pObj, void * pV) { Vec_At ...@@ -468,11 +469,11 @@ static inline void Abc_ObjSetMvVar( Abc_Obj_t * pObj, void * pV) { Vec_At
for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)) && (((pObj) = Abc_NtkBox(pNtk, i)), 1); i++ ) \ for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)) && (((pObj) = Abc_NtkBox(pNtk, i)), 1); i++ ) \
if ( !Abc_ObjIsLatch(pObj) ) {} else if ( !Abc_ObjIsLatch(pObj) ) {} else
#define Abc_NtkForEachLatchInput( pNtk, pObj, i ) \ #define Abc_NtkForEachLatchInput( pNtk, pObj, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)) && (((pObj) = Abc_ObjFanin0(Abc_NtkBox(pNtk, i))), 1); i++ ) \ for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)); i++ ) \
if ( !Abc_ObjIsLatch(Abc_NtkBox(pNtk, i)) ) {} else if ( !(Abc_ObjIsLatch(Abc_NtkBox(pNtk, i)) && (((pObj) = Abc_ObjFanin0(Abc_NtkBox(pNtk, i))), 1)) ) {} else
#define Abc_NtkForEachLatchOutput( pNtk, pObj, i ) \ #define Abc_NtkForEachLatchOutput( pNtk, pObj, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)) && (((pObj) = Abc_ObjFanout0(Abc_NtkBox(pNtk, i))), 1); i++ ) \ for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)); i++ ) \
if ( !Abc_ObjIsLatch(Abc_NtkBox(pNtk, i)) ) {} else if ( !(Abc_ObjIsLatch(Abc_NtkBox(pNtk, i)) && (((pObj) = Abc_ObjFanout0(Abc_NtkBox(pNtk, i))), 1)) ) {} else
#define Abc_NtkForEachWhitebox( pNtk, pObj, i ) \ #define Abc_NtkForEachWhitebox( pNtk, pObj, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)) && (((pObj) = Abc_NtkBox(pNtk, i)), 1); i++ ) \ for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)) && (((pObj) = Abc_NtkBox(pNtk, i)), 1); i++ ) \
if ( !Abc_ObjIsWhitebox(pObj) ) {} else if ( !Abc_ObjIsWhitebox(pObj) ) {} else
...@@ -596,9 +597,9 @@ extern void Abc_NtkLogicMakeDirectSops( Abc_Ntk_t * pNtk ); ...@@ -596,9 +597,9 @@ extern void Abc_NtkLogicMakeDirectSops( Abc_Ntk_t * pNtk );
extern int Abc_NtkSopToAig( Abc_Ntk_t * pNtk ); extern int Abc_NtkSopToAig( Abc_Ntk_t * pNtk );
extern int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk ); extern int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk );
extern int Abc_NtkMapToSop( Abc_Ntk_t * pNtk ); extern int Abc_NtkMapToSop( Abc_Ntk_t * pNtk );
extern int Abc_NtkLogicToSop( Abc_Ntk_t * pNtk, int fDirect ); extern int Abc_NtkToSop( Abc_Ntk_t * pNtk, int fDirect );
extern int Abc_NtkLogicToBdd( Abc_Ntk_t * pNtk ); extern int Abc_NtkToBdd( Abc_Ntk_t * pNtk );
extern int Abc_NtkLogicToAig( Abc_Ntk_t * pNtk ); extern int Abc_NtkToAig( Abc_Ntk_t * pNtk );
/*=== abcHie.c ==========================================================*/ /*=== abcHie.c ==========================================================*/
extern Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy( Abc_Ntk_t * pNtk ); extern Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk ); extern Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk );
...@@ -680,12 +681,9 @@ extern void Abc_NtkAddDummyAssertNames( Abc_Ntk_t * pNtk ); ...@@ -680,12 +681,9 @@ extern void Abc_NtkAddDummyAssertNames( Abc_Ntk_t * pNtk );
extern void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk ); extern void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk );
extern void Abc_NtkShortNames( Abc_Ntk_t * pNtk ); extern void Abc_NtkShortNames( Abc_Ntk_t * pNtk );
/*=== abcNetlist.c ==========================================================*/ /*=== abcNetlist.c ==========================================================*/
extern Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk ); extern Abc_Ntk_t * Abc_NtkToLogic( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkLogicToNetlist( Abc_Ntk_t * pNtk, int fDirect ); extern Abc_Ntk_t * Abc_NtkToNetlist( Abc_Ntk_t * pNtk, int fDirect );
extern Abc_Ntk_t * Abc_NtkLogicToNetlistBench( Abc_Ntk_t * pNtk ); extern Abc_Ntk_t * Abc_NtkToNetlistBench( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkAigToLogicSop( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkAigToLogicSopBench( Abc_Ntk_t * pNtk );
/*=== abcNtbdd.c ==========================================================*/ /*=== abcNtbdd.c ==========================================================*/
extern Abc_Ntk_t * Abc_NtkDeriveFromBdd( DdManager * dd, DdNode * bFunc, char * pNamePo, Vec_Ptr_t * vNamesPi ); extern Abc_Ntk_t * Abc_NtkDeriveFromBdd( DdManager * dd, DdNode * bFunc, char * pNamePo, Vec_Ptr_t * vNamesPi );
extern Abc_Ntk_t * Abc_NtkBddToMuxes( Abc_Ntk_t * pNtk ); extern Abc_Ntk_t * Abc_NtkBddToMuxes( Abc_Ntk_t * pNtk );
......
src/base/abc/abcFunc.c
...@@ -53,7 +53,7 @@ int Abc_NtkSopToBdd( Abc_Ntk_t * pNtk ) ...@@ -53,7 +53,7 @@ int Abc_NtkSopToBdd( Abc_Ntk_t * pNtk )
DdManager * dd; DdManager * dd;
int nFaninsMax, i; int nFaninsMax, i;
assert( Abc_NtkIsSopLogic(pNtk) ); assert( Abc_NtkHasSop(pNtk) );
// start the functionality manager // start the functionality manager
nFaninsMax = Abc_NtkGetFaninMax( pNtk ); nFaninsMax = Abc_NtkGetFaninMax( pNtk );
...@@ -159,7 +159,7 @@ void Abc_NtkLogicMakeDirectSops( Abc_Ntk_t * pNtk ) ...@@ -159,7 +159,7 @@ void Abc_NtkLogicMakeDirectSops( Abc_Ntk_t * pNtk )
Abc_Obj_t * pNode; Abc_Obj_t * pNode;
int nFaninsMax, fFound, i; int nFaninsMax, fFound, i;
assert( Abc_NtkIsSopLogic(pNtk) ); assert( Abc_NtkHasSop(pNtk) );
// check if there are nodes with complemented SOPs // check if there are nodes with complemented SOPs
fFound = 0; fFound = 0;
...@@ -221,7 +221,7 @@ int Abc_NtkBddToSop( Abc_Ntk_t * pNtk, int fDirect ) ...@@ -221,7 +221,7 @@ int Abc_NtkBddToSop( Abc_Ntk_t * pNtk, int fDirect )
else else
fMode = -1; fMode = -1;
assert( Abc_NtkIsBddLogic(pNtk) ); assert( Abc_NtkHasBdd(pNtk) );
if ( dd->size > 0 ) if ( dd->size > 0 )
Cudd_zddVarsFromBddVars( dd, 2 ); Cudd_zddVarsFromBddVars( dd, 2 );
// create the new manager // create the new manager
...@@ -481,7 +481,7 @@ int Abc_ConvertZddToSop( DdManager * dd, DdNode * zCover, char * pSop, int nFani ...@@ -481,7 +481,7 @@ int Abc_ConvertZddToSop( DdManager * dd, DdNode * zCover, char * pSop, int nFani
***********************************************************************/ ***********************************************************************/
void Abc_NodeBddToCnf( Abc_Obj_t * pNode, Extra_MmFlex_t * pMmMan, Vec_Str_t * vCube, int fAllPrimes, char ** ppSop0, char ** ppSop1 ) void Abc_NodeBddToCnf( Abc_Obj_t * pNode, Extra_MmFlex_t * pMmMan, Vec_Str_t * vCube, int fAllPrimes, char ** ppSop0, char ** ppSop1 )
{ {
assert( Abc_NtkIsBddLogic(pNode->pNtk) ); assert( Abc_NtkHasBdd(pNode->pNtk) );
*ppSop0 = Abc_ConvertBddToSop( pMmMan, pNode->pNtk->pManFunc, pNode->pData, pNode->pData, Abc_ObjFaninNum(pNode), fAllPrimes, vCube, 0 ); *ppSop0 = Abc_ConvertBddToSop( pMmMan, pNode->pNtk->pManFunc, pNode->pData, pNode->pData, Abc_ObjFaninNum(pNode), fAllPrimes, vCube, 0 );
*ppSop1 = Abc_ConvertBddToSop( pMmMan, pNode->pNtk->pManFunc, pNode->pData, pNode->pData, Abc_ObjFaninNum(pNode), fAllPrimes, vCube, 1 ); *ppSop1 = Abc_ConvertBddToSop( pMmMan, pNode->pNtk->pManFunc, pNode->pData, pNode->pData, Abc_ObjFaninNum(pNode), fAllPrimes, vCube, 1 );
} }
...@@ -554,7 +554,7 @@ int Abc_NtkSopToAig( Abc_Ntk_t * pNtk ) ...@@ -554,7 +554,7 @@ int Abc_NtkSopToAig( Abc_Ntk_t * pNtk )
Hop_Man_t * pMan; Hop_Man_t * pMan;
int i; int i;
assert( Abc_NtkIsSopLogic(pNtk) || Abc_NtkIsSopNetlist(pNtk) ); assert( Abc_NtkHasSop(pNtk) );
// start the functionality manager // start the functionality manager
pMan = Hop_ManStart(); pMan = Hop_ManStart();
...@@ -664,7 +664,7 @@ int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk ) ...@@ -664,7 +664,7 @@ int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk )
DdManager * dd; DdManager * dd;
int nFaninsMax, i; int nFaninsMax, i;
assert( Abc_NtkIsAigLogic(pNtk) ); assert( Abc_NtkHasAig(pNtk) );
// start the functionality manager // start the functionality manager
nFaninsMax = Abc_NtkGetFaninMax( pNtk ); nFaninsMax = Abc_NtkGetFaninMax( pNtk );
...@@ -863,7 +863,7 @@ int Abc_NtkMapToSop( Abc_Ntk_t * pNtk ) ...@@ -863,7 +863,7 @@ int Abc_NtkMapToSop( Abc_Ntk_t * pNtk )
char * pSop; char * pSop;
int i; int i;
assert( Abc_NtkIsMappedLogic(pNtk) ); assert( Abc_NtkHasMapping(pNtk) );
// update the functionality manager // update the functionality manager
assert( pNtk->pManFunc == Abc_FrameReadLibGen() ); assert( pNtk->pManFunc == Abc_FrameReadLibGen() );
pNtk->pManFunc = Extra_MmFlexStart(); pNtk->pManFunc = Extra_MmFlexStart();
...@@ -889,10 +889,10 @@ int Abc_NtkMapToSop( Abc_Ntk_t * pNtk ) ...@@ -889,10 +889,10 @@ int Abc_NtkMapToSop( Abc_Ntk_t * pNtk )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
int Abc_NtkLogicToSop( Abc_Ntk_t * pNtk, int fDirect ) int Abc_NtkToSop( Abc_Ntk_t * pNtk, int fDirect )
{ {
assert( Abc_NtkIsLogic(pNtk) ); assert( !Abc_NtkIsStrash(pNtk) );
if ( Abc_NtkIsSopLogic(pNtk) ) if ( Abc_NtkHasSop(pNtk) )
{ {
if ( !fDirect ) if ( !fDirect )
return 1; return 1;
...@@ -900,11 +900,11 @@ int Abc_NtkLogicToSop( Abc_Ntk_t * pNtk, int fDirect ) ...@@ -900,11 +900,11 @@ int Abc_NtkLogicToSop( Abc_Ntk_t * pNtk, int fDirect )
return 0; return 0;
return Abc_NtkBddToSop(pNtk, fDirect); return Abc_NtkBddToSop(pNtk, fDirect);
} }
if ( Abc_NtkIsMappedLogic(pNtk) ) if ( Abc_NtkHasMapping(pNtk) )
return Abc_NtkMapToSop(pNtk); return Abc_NtkMapToSop(pNtk);
if ( Abc_NtkIsBddLogic(pNtk) ) if ( Abc_NtkHasBdd(pNtk) )
return Abc_NtkBddToSop(pNtk, fDirect); return Abc_NtkBddToSop(pNtk, fDirect);
if ( Abc_NtkIsAigLogic(pNtk) ) if ( Abc_NtkHasAig(pNtk) )
{ {
if ( !Abc_NtkAigToBdd(pNtk) ) if ( !Abc_NtkAigToBdd(pNtk) )
return 0; return 0;
...@@ -925,19 +925,19 @@ int Abc_NtkLogicToSop( Abc_Ntk_t * pNtk, int fDirect ) ...@@ -925,19 +925,19 @@ int Abc_NtkLogicToSop( Abc_Ntk_t * pNtk, int fDirect )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
int Abc_NtkLogicToBdd( Abc_Ntk_t * pNtk ) int Abc_NtkToBdd( Abc_Ntk_t * pNtk )
{ {
assert( Abc_NtkIsLogic(pNtk) ); assert( !Abc_NtkIsStrash(pNtk) );
if ( Abc_NtkIsBddLogic(pNtk) ) if ( Abc_NtkHasBdd(pNtk) )
return 1; return 1;
if ( Abc_NtkIsMappedLogic(pNtk) ) if ( Abc_NtkHasMapping(pNtk) )
{ {
Abc_NtkMapToSop(pNtk); Abc_NtkMapToSop(pNtk);
return Abc_NtkSopToBdd(pNtk); return Abc_NtkSopToBdd(pNtk);
} }
if ( Abc_NtkIsSopLogic(pNtk) ) if ( Abc_NtkHasSop(pNtk) )
return Abc_NtkSopToBdd(pNtk); return Abc_NtkSopToBdd(pNtk);
if ( Abc_NtkIsAigLogic(pNtk) ) if ( Abc_NtkHasAig(pNtk) )
return Abc_NtkAigToBdd(pNtk); return Abc_NtkAigToBdd(pNtk);
assert( 0 ); assert( 0 );
return 0; return 0;
...@@ -954,23 +954,23 @@ int Abc_NtkLogicToBdd( Abc_Ntk_t * pNtk ) ...@@ -954,23 +954,23 @@ int Abc_NtkLogicToBdd( Abc_Ntk_t * pNtk )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
int Abc_NtkLogicToAig( Abc_Ntk_t * pNtk ) int Abc_NtkToAig( Abc_Ntk_t * pNtk )
{ {
assert( Abc_NtkIsLogic(pNtk) ); assert( !Abc_NtkIsStrash(pNtk) );
if ( Abc_NtkIsAigLogic(pNtk) ) if ( Abc_NtkHasAig(pNtk) )
return 1; return 1;
if ( Abc_NtkIsMappedLogic(pNtk) ) if ( Abc_NtkHasMapping(pNtk) )
{ {
Abc_NtkMapToSop(pNtk); Abc_NtkMapToSop(pNtk);
return Abc_NtkSopToAig(pNtk); return Abc_NtkSopToAig(pNtk);
} }
if ( Abc_NtkIsBddLogic(pNtk) ) if ( Abc_NtkHasBdd(pNtk) )
{ {
if ( !Abc_NtkBddToSop(pNtk,0) ) if ( !Abc_NtkBddToSop(pNtk,0) )
return 0; return 0;
return Abc_NtkSopToAig(pNtk); return Abc_NtkSopToAig(pNtk);
} }
if ( Abc_NtkIsSopLogic(pNtk) ) if ( Abc_NtkHasSop(pNtk) )
return Abc_NtkSopToAig(pNtk); return Abc_NtkSopToAig(pNtk);
assert( 0 ); assert( 0 );
return 0; return 0;
......
src/base/abc/abcHie.c
...@@ -195,7 +195,7 @@ Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy( Abc_Ntk_t * pNtk ) ...@@ -195,7 +195,7 @@ Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy( Abc_Ntk_t * pNtk )
// recursively flatten hierarchy, create internal logic, add new PI/PO names if there are black boxes // recursively flatten hierarchy, create internal logic, add new PI/PO names if there are black boxes
Counter = -1; Counter = -1;
Abc_NtkFlattenLogicHierarchy_rec( pNtkNew, pNtk, &Counter ); Abc_NtkFlattenLogicHierarchy_rec( pNtkNew, pNtk, &Counter );
printf( "Hierarchy reader flattened %d logic instances. Preserved %d black boxes.\n", printf( "Hierarchy reader flattened %d instances of logic boxes and left %d black boxes.\n",
Counter, Abc_NtkBlackboxNum(pNtkNew) ); Counter, Abc_NtkBlackboxNum(pNtkNew) );
// pass the design // pass the design
...@@ -249,44 +249,29 @@ Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk ) ...@@ -249,44 +249,29 @@ Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk )
// clean the node copy fields // clean the node copy fields
Abc_NtkCleanCopy( pNtk ); Abc_NtkCleanCopy( pNtk );
// create PIs/POs for the box inputs/outputs
// mark the nodes that should not be connected // mark the nodes that should not be connected
Abc_NtkIncrementTravId( pNtk ); Abc_NtkIncrementTravId( pNtk );
Abc_NtkForEachBlackbox( pNtk, pObj, i ) Abc_NtkForEachBlackbox( pNtk, pObj, i )
{
Abc_NodeSetTravIdCurrent( pObj ); Abc_NodeSetTravIdCurrent( pObj );
Abc_NtkForEachCi( pNtk, pTerm, i )
Abc_NodeSetTravIdCurrent( pTerm );
Abc_NtkForEachCo( pNtk, pTerm, i )
Abc_NodeSetTravIdCurrent( pTerm );
// unmark PIs and LIs/LOs
Abc_NtkForEachPi( pNtk, pTerm, i )
Abc_NodeSetTravIdPrevious( pTerm );
Abc_NtkForEachLatchInput( pNtk, pTerm, i )
Abc_NodeSetTravIdPrevious( pTerm );
Abc_NtkForEachLatchOutput( pNtk, pTerm, i )
Abc_NodeSetTravIdPrevious( pTerm );
// copy the box outputs
Abc_NtkForEachBlackbox( pNtk, pObj, i )
Abc_ObjForEachFanout( pObj, pTerm, k ) Abc_ObjForEachFanout( pObj, pTerm, k )
{
pNet = Abc_ObjFanout0(pTerm);
if ( pNet->pCopy )
{
printf( "Error in Abc_NtkConvertBlackboxes(): Output %s of a black box has a non-unique name.\n", Abc_ObjName(pNet->pCopy) );
Abc_NtkDelete( pNtkNew );
return NULL;
}
pNet->pCopy = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pNet) );
pTerm->pCopy = Abc_NtkCreatePi( pNtkNew ); pTerm->pCopy = Abc_NtkCreatePi( pNtkNew );
Abc_NodeSetTravIdCurrent( pTerm );
}
}
Abc_NtkForEachBlackbox( pNtk, pObj, i )
{
Abc_ObjForEachFanin( pObj, pTerm, k )
{
pNet = Abc_ObjFanin0(pTerm);
if ( pNet->pCopy && !Abc_ObjIsCi(Abc_ObjFanin0(pNet)) )
{
Abc_NodeSetTravIdCurrent( pTerm );
continue;
}
pNet->pCopy = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pNet) );
pTerm->pCopy = Abc_NtkCreatePo( pNtkNew );
}
}
// duplicate other objects // duplicate other objects
Abc_NtkForEachObj( pNtk, pObj, i ) Abc_NtkForEachObj( pNtk, pObj, i )
if ( !Abc_NodeIsTravIdCurrent(pObj) && pObj->pCopy == NULL ) if ( !Abc_NodeIsTravIdCurrent(pObj) )
Abc_NtkDupObj( pNtkNew, pObj, Abc_ObjIsNet(pObj) ); Abc_NtkDupObj( pNtkNew, pObj, Abc_ObjIsNet(pObj) );
// connect all objects // connect all objects
...@@ -295,6 +280,23 @@ Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk ) ...@@ -295,6 +280,23 @@ Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk )
Abc_ObjForEachFanin( pObj, pFanin, k ) Abc_ObjForEachFanin( pObj, pFanin, k )
Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy ); Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
// create unique PO for each net feeding into blackboxes or POs
Abc_NtkIncrementTravId( pNtk );
Abc_NtkForEachCo( pNtk, pTerm, i )
{
// skip latch inputs
assert( Abc_ObjFanoutNum(pTerm) <= 1 );
if ( Abc_ObjFanoutNum(pTerm) > 0 && Abc_ObjIsLatch(Abc_ObjFanout0(pTerm)) )
continue;
// check if the net is visited
pNet = Abc_ObjFanin0(pTerm);
if ( Abc_NodeIsTravIdCurrent(pNet) )
continue;
// create PO
Abc_NodeSetTravIdCurrent( pNet );
Abc_ObjAddFanin( Abc_NtkCreatePo(pNtkNew), pNet->pCopy );
}
// check integrity // check integrity
if ( !Abc_NtkCheck( pNtkNew ) ) if ( !Abc_NtkCheck( pNtkNew ) )
{ {
...@@ -337,18 +339,11 @@ Abc_Ntk_t * Abc_NtkInsertNewLogic( Abc_Ntk_t * pNtkH, Abc_Ntk_t * pNtkL ) ...@@ -337,18 +339,11 @@ Abc_Ntk_t * Abc_NtkInsertNewLogic( Abc_Ntk_t * pNtkH, Abc_Ntk_t * pNtkL )
assert( Abc_NtkWhiteboxNum(pNtkL) == 0 ); assert( Abc_NtkWhiteboxNum(pNtkL) == 0 );
assert( Abc_NtkBlackboxNum(pNtkL) == 0 ); assert( Abc_NtkBlackboxNum(pNtkL) == 0 );
if ( Abc_NtkIsSopNetlist(pNtkH) && Abc_NtkIsAigNetlist(pNtkL) )
Abc_NtkSopToAig( pNtkH );
if ( Abc_NtkIsAigNetlist(pNtkH) && Abc_NtkIsSopNetlist(pNtkL) )
Abc_NtkSopToAig( pNtkL );
assert( pNtkH->ntkFunc == pNtkL->ntkFunc );
// prepare the logic network for copying // prepare the logic network for copying
Abc_NtkCleanCopy( pNtkL ); Abc_NtkCleanCopy( pNtkL );
// start the network // start the network
pNtkNew = Abc_NtkAlloc( pNtkH->ntkType, pNtkH->ntkFunc, 1 ); pNtkNew = Abc_NtkAlloc( pNtkL->ntkType, pNtkL->ntkFunc, 1 );
// duplicate the name and the spec // duplicate the name and the spec
pNtkNew->pName = Extra_UtilStrsav( pNtkH->pName ); pNtkNew->pName = Extra_UtilStrsav( pNtkH->pName );
pNtkNew->pSpec = Extra_UtilStrsav( pNtkH->pSpec ); pNtkNew->pSpec = Extra_UtilStrsav( pNtkH->pSpec );
......
src/base/abc/abcLib.c
...@@ -82,6 +82,7 @@ void Abc_LibFree( Abc_Lib_t * pLib, Abc_Ntk_t * pNtkSave ) ...@@ -82,6 +82,7 @@ void Abc_LibFree( Abc_Lib_t * pLib, Abc_Ntk_t * pNtkSave )
if ( pNtk == pNtkSave ) if ( pNtk == pNtkSave )
continue; continue;
pNtk->pManFunc = NULL; pNtk->pManFunc = NULL;
pNtk->pDesign = NULL;
Abc_NtkDelete( pNtk ); Abc_NtkDelete( pNtk );
} }
Vec_PtrFree( pLib->vModules ); Vec_PtrFree( pLib->vModules );
...@@ -166,6 +167,7 @@ int Abc_LibAddModel( Abc_Lib_t * pLib, Abc_Ntk_t * pNtk ) ...@@ -166,6 +167,7 @@ int Abc_LibAddModel( Abc_Lib_t * pLib, Abc_Ntk_t * pNtk )
return 0; return 0;
st_insert( pLib->tModules, (char *)pNtk->pName, (char *)pNtk ); st_insert( pLib->tModules, (char *)pNtk->pName, (char *)pNtk );
Vec_PtrPush( pLib->vModules, pNtk ); Vec_PtrPush( pLib->vModules, pNtk );
pNtk->pDesign = pLib;
return 1; return 1;
} }
......
src/base/abc/abcNetlist.c
...@@ -26,6 +26,9 @@ ...@@ -26,6 +26,9 @@
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
static void Abc_NtkAddPoBuffers( Abc_Ntk_t * pNtk ); static void Abc_NtkAddPoBuffers( Abc_Ntk_t * pNtk );
static Abc_Ntk_t * Abc_NtkLogicToNetlist( Abc_Ntk_t * pNtk );
static Abc_Ntk_t * Abc_NtkAigToLogicSop( Abc_Ntk_t * pNtk );
static Abc_Ntk_t * Abc_NtkAigToLogicSopBench( Abc_Ntk_t * pNtk );
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS /// /// FUNCTION DEFINITIONS ///
...@@ -42,22 +45,21 @@ static void Abc_NtkAddPoBuffers( Abc_Ntk_t * pNtk ); ...@@ -42,22 +45,21 @@ static void Abc_NtkAddPoBuffers( Abc_Ntk_t * pNtk );
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk ) Abc_Ntk_t * Abc_NtkToLogic( Abc_Ntk_t * pNtk )
{ {
Abc_Ntk_t * pNtkNew; Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj, * pFanin; Abc_Obj_t * pObj, * pFanin;
int i, k; int i, k;
// consider the case of the AIG
if ( Abc_NtkIsStrash(pNtk) )
return Abc_NtkAigToLogicSop( pNtk );
assert( Abc_NtkIsNetlist(pNtk) ); assert( Abc_NtkIsNetlist(pNtk) );
// consider simple case when there is hierarchy // consider simple case when there is hierarchy
assert( pNtk->pDesign == NULL ); assert( pNtk->pDesign == NULL );
// assert( pNtk->tName2Model == NULL ); assert( Abc_NtkWhiteboxNum(pNtk) == 0 );
// if ( pNtk->tName2Model ) assert( Abc_NtkBlackboxNum(pNtk) == 0 );
// return Abc_NtkNetlistToLogicHie( pNtk );
// start the network // start the network
if ( Abc_NtkHasMapping(pNtk) ) pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, pNtk->ntkFunc );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_MAP );
else
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, pNtk->ntkFunc );
// duplicate the nodes // duplicate the nodes
Abc_NtkForEachNode( pNtk, pObj, i ) Abc_NtkForEachNode( pNtk, pObj, i )
Abc_NtkDupObj(pNtkNew, pObj, 0); Abc_NtkDupObj(pNtkNew, pObj, 0);
...@@ -71,9 +73,9 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk ) ...@@ -71,9 +73,9 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk )
Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 ); Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
// duplicate EXDC // duplicate EXDC
if ( pNtk->pExdc ) if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkNetlistToLogic( pNtk->pExdc ); pNtkNew->pExdc = Abc_NtkToLogic( pNtk->pExdc );
if ( !Abc_NtkCheck( pNtkNew ) ) if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkNetlistToLogic(): Network check has failed.\n" ); fprintf( stdout, "Abc_NtkToLogic(): Network check has failed.\n" );
return pNtkNew; return pNtkNew;
} }
...@@ -88,36 +90,18 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk ) ...@@ -88,36 +90,18 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Abc_Ntk_t * Abc_NtkLogicToNetlist( Abc_Ntk_t * pNtk, int fDirect ) Abc_Ntk_t * Abc_NtkToNetlist( Abc_Ntk_t * pNtk, int fDirect )
{ {
Abc_Ntk_t * pNtkNew, * pNtkTemp; Abc_Ntk_t * pNtkNew, * pNtkTemp;
assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsStrash(pNtk) ); assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsStrash(pNtk) );
if ( Abc_NtkIsStrash(pNtk) ) if ( Abc_NtkIsStrash(pNtk) )
{ {
pNtkTemp = Abc_NtkAigToLogicSop(pNtk); pNtkTemp = Abc_NtkAigToLogicSop(pNtk);
pNtkNew = Abc_NtkLogicSopToNetlist( pNtkTemp ); pNtkNew = Abc_NtkLogicToNetlist( pNtkTemp );
Abc_NtkDelete( pNtkTemp ); Abc_NtkDelete( pNtkTemp );
return pNtkNew;
} }
else if ( Abc_NtkIsBddLogic(pNtk) ) return Abc_NtkLogicToNetlist( pNtk );
{
if ( !Abc_NtkBddToSop(pNtk, fDirect) )
return NULL;
pNtkNew = Abc_NtkLogicSopToNetlist( pNtk );
Abc_NtkSopToBdd(pNtk);
}
else if ( Abc_NtkIsAigLogic(pNtk) )
{
if ( !Abc_NtkAigToBdd(pNtk) )
return NULL;
if ( !Abc_NtkBddToSop(pNtk, fDirect) )
return NULL;
pNtkNew = Abc_NtkLogicSopToNetlist( pNtk );
Abc_NtkSopToAig(pNtk);
}
else if ( Abc_NtkIsSopLogic(pNtk) || Abc_NtkIsMappedLogic(pNtk) )
pNtkNew = Abc_NtkLogicSopToNetlist( pNtk );
else assert( 0 );
return pNtkNew;
} }
/**Function************************************************************* /**Function*************************************************************
...@@ -131,12 +115,12 @@ Abc_Ntk_t * Abc_NtkLogicToNetlist( Abc_Ntk_t * pNtk, int fDirect ) ...@@ -131,12 +115,12 @@ Abc_Ntk_t * Abc_NtkLogicToNetlist( Abc_Ntk_t * pNtk, int fDirect )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Abc_Ntk_t * Abc_NtkLogicToNetlistBench( Abc_Ntk_t * pNtk ) Abc_Ntk_t * Abc_NtkToNetlistBench( Abc_Ntk_t * pNtk )
{ {
Abc_Ntk_t * pNtkNew, * pNtkTemp; Abc_Ntk_t * pNtkNew, * pNtkTemp;
assert( Abc_NtkIsStrash(pNtk) ); assert( Abc_NtkIsStrash(pNtk) );
pNtkTemp = Abc_NtkAigToLogicSopBench( pNtk ); pNtkTemp = Abc_NtkAigToLogicSopBench( pNtk );
pNtkNew = Abc_NtkLogicSopToNetlist( pNtkTemp ); pNtkNew = Abc_NtkLogicToNetlist( pNtkTemp );
Abc_NtkDelete( pNtkTemp ); Abc_NtkDelete( pNtkTemp );
return pNtkNew; return pNtkNew;
} }
...@@ -156,32 +140,24 @@ Abc_Ntk_t * Abc_NtkLogicToNetlistBench( Abc_Ntk_t * pNtk ) ...@@ -156,32 +140,24 @@ Abc_Ntk_t * Abc_NtkLogicToNetlistBench( Abc_Ntk_t * pNtk )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk ) Abc_Ntk_t * Abc_NtkLogicToNetlist( Abc_Ntk_t * pNtk )
{ {
Abc_Ntk_t * pNtkNew; Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj, * pNet, * pDriver, * pFanin; Abc_Obj_t * pObj, * pNet, * pDriver, * pFanin;
int i, k; int i, k;
assert( Abc_NtkIsLogic(pNtk) );
// remove dangling nodes // remove dangling nodes
Abc_NtkCleanup( pNtk, 0 ); Abc_NtkCleanup( pNtk, 0 );
assert( Abc_NtkIsLogic(pNtk) );
// assert( Abc_NtkLogicHasSimpleCos(pNtk) ); // assert( Abc_NtkLogicHasSimpleCos(pNtk) );
if ( !Abc_NtkLogicHasSimpleCos(pNtk) ) if ( !Abc_NtkLogicHasSimpleCos(pNtk) )
{ {
printf( "Abc_NtkLogicSopToNetlist() warning: The network is converted to have simple COs.\n" ); printf( "Abc_NtkLogicToNetlist() warning: The network is converted to have simple COs.\n" );
Abc_NtkLogicMakeSimpleCos( pNtk, 0 ); Abc_NtkLogicMakeSimpleCos( pNtk, 0 );
} }
if ( Abc_NtkIsBddLogic(pNtk) )
{
if ( !Abc_NtkBddToSop(pNtk,0) )
return NULL;
}
// Abc_NtkForEachCo(pNtk, pObj, i)
// Abc_ObjPrint( stdout, Abc_ObjFanin0(pObj) );
// start the netlist by creating PI/PO/Latch objects // start the netlist by creating PI/PO/Latch objects
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_NETLIST, pNtk->ntkFunc ); pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_NETLIST, pNtk->ntkFunc );
// create the CI nets and remember them in the new CI nodes // create the CI nets and remember them in the new CI nodes
...@@ -227,7 +203,7 @@ Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk ) ...@@ -227,7 +203,7 @@ Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk )
if ( pObj->pCopy->pCopy ) // the net of the new object is already created if ( pObj->pCopy->pCopy ) // the net of the new object is already created
continue; continue;
// create the new net // create the new net
pNet = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pObj) ); pNet = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pObj) ); // here we create ridiculous names net line "n48", where 48 is the ID of the node
Abc_ObjAddFanin( pNet, pObj->pCopy ); Abc_ObjAddFanin( pNet, pObj->pCopy );
pObj->pCopy->pCopy = pNet; pObj->pCopy->pCopy = pNet;
} }
...@@ -237,9 +213,9 @@ Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk ) ...@@ -237,9 +213,9 @@ Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk )
Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy->pCopy ); Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy->pCopy );
// duplicate EXDC // duplicate EXDC
if ( pNtk->pExdc ) if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkLogicToNetlist( pNtk->pExdc, 0 ); pNtkNew->pExdc = Abc_NtkToNetlist( pNtk->pExdc, 0 );
if ( !Abc_NtkCheck( pNtkNew ) ) if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkLogicSopToNetlist(): Network check has failed.\n" ); fprintf( stdout, "Abc_NtkLogicToNetlist(): Network check has failed.\n" );
return pNtkNew; return pNtkNew;
} }
......
src/base/abc/abcNtk.c
...@@ -242,9 +242,9 @@ Abc_Ntk_t * Abc_NtkStartRead( char * pName ) ...@@ -242,9 +242,9 @@ Abc_Ntk_t * Abc_NtkStartRead( char * pName )
***********************************************************************/ ***********************************************************************/
void Abc_NtkFinalizeRead( Abc_Ntk_t * pNtk ) void Abc_NtkFinalizeRead( Abc_Ntk_t * pNtk )
{ {
Abc_Obj_t * pBox, * pObj, * pTerm; Abc_Obj_t * pBox, * pObj, * pTerm, * pNet;
int i; int i;
if ( Abc_NtkHasBlackbox(pNtk) ) if ( Abc_NtkHasBlackbox(pNtk) && Abc_NtkBoxNum(pNtk) == 0 )
{ {
pBox = Abc_NtkCreateBlackbox(pNtk); pBox = Abc_NtkCreateBlackbox(pNtk);
Abc_NtkForEachPi( pNtk, pObj, i ) Abc_NtkForEachPi( pNtk, pObj, i )
...@@ -262,8 +262,23 @@ void Abc_NtkFinalizeRead( Abc_Ntk_t * pNtk ) ...@@ -262,8 +262,23 @@ void Abc_NtkFinalizeRead( Abc_Ntk_t * pNtk )
return; return;
} }
assert( Abc_NtkIsNetlist(pNtk) ); assert( Abc_NtkIsNetlist(pNtk) );
// check if constant 0 net is used
pNet = Abc_NtkFindOrCreateNet( pNtk, "1\'b0" );
if ( Abc_ObjFanoutNum(pNet) == 0 )
Abc_NtkDeleteObj(pNet);
else if ( Abc_ObjFaninNum(pNet) == 0 )
Abc_ObjAddFanin( pNet, Abc_NtkCreateNodeConst0(pNtk) );
// check if constant 1 net is used
pNet = Abc_NtkFindOrCreateNet( pNtk, "1\'b1" );
if ( Abc_ObjFanoutNum(pNet) == 0 )
Abc_NtkDeleteObj(pNet);
else if ( Abc_ObjFaninNum(pNet) == 0 )
Abc_ObjAddFanin( pNet, Abc_NtkCreateNodeConst1(pNtk) );
// fix the net drivers // fix the net drivers
Abc_NtkFixNonDrivenNets( pNtk ); Abc_NtkFixNonDrivenNets( pNtk );
// reorder the CI/COs to PI/POs first // reorder the CI/COs to PI/POs first
Abc_NtkOrderCisCos( pNtk ); Abc_NtkOrderCisCos( pNtk );
} }
......
src/base/abc/abcShow.c
...@@ -164,7 +164,7 @@ void Abc_NtkShow( Abc_Ntk_t * pNtk, int fGateNames, int fSeq, int fUseReverse ) ...@@ -164,7 +164,7 @@ void Abc_NtkShow( Abc_Ntk_t * pNtk, int fGateNames, int fSeq, int fUseReverse )
} }
// convert to logic SOP // convert to logic SOP
if ( Abc_NtkIsLogic(pNtk) ) if ( Abc_NtkIsLogic(pNtk) )
Abc_NtkLogicToSop( pNtk, 0 ); Abc_NtkToSop( pNtk, 0 );
// create the file name // create the file name
Abc_ShowGetFileName( pNtk->pName, FileNameDot ); Abc_ShowGetFileName( pNtk->pName, FileNameDot );
// check that the file can be opened // check that the file can be opened
......
src/base/abc/abcUtil.c
...@@ -1404,6 +1404,8 @@ void Abc_NtkReassignIds( Abc_Ntk_t * pNtk ) ...@@ -1404,6 +1404,8 @@ void Abc_NtkReassignIds( Abc_Ntk_t * pNtk )
// rehash the AIG // rehash the AIG
Abc_AigRehash( pNtk->pManFunc ); Abc_AigRehash( pNtk->pManFunc );
// update the name manager!!!
} }
/**Function************************************************************* /**Function*************************************************************
......
src/base/abci/abc.c
...@@ -3395,7 +3395,7 @@ int Abc_CommandLogic( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -3395,7 +3395,7 @@ int Abc_CommandLogic( Abc_Frame_t * pAbc, int argc, char ** argv )
} }
// get the new network // get the new network
pNtkRes = Abc_NtkAigToLogicSop( pNtk ); pNtkRes = Abc_NtkToLogic( pNtk );
if ( pNtkRes == NULL ) if ( pNtkRes == NULL )
{ {
fprintf( pErr, "Converting to a logic network has failed.\n" ); fprintf( pErr, "Converting to a logic network has failed.\n" );
...@@ -3984,7 +3984,7 @@ int Abc_CommandSop( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -3984,7 +3984,7 @@ int Abc_CommandSop( Abc_Frame_t * pAbc, int argc, char ** argv )
fprintf( pErr, "Converting to SOP is possible only for logic networks.\n" ); fprintf( pErr, "Converting to SOP is possible only for logic networks.\n" );
return 1; return 1;
} }
if ( !Abc_NtkLogicToSop(pNtk, fDirect) ) if ( !Abc_NtkToSop(pNtk, fDirect) )
{ {
fprintf( pErr, "Converting to SOP has failed.\n" ); fprintf( pErr, "Converting to SOP has failed.\n" );
return 1; return 1;
...@@ -4047,7 +4047,7 @@ int Abc_CommandBdd( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -4047,7 +4047,7 @@ int Abc_CommandBdd( Abc_Frame_t * pAbc, int argc, char ** argv )
fprintf( pOut, "The logic network is already in the BDD form.\n" ); fprintf( pOut, "The logic network is already in the BDD form.\n" );
return 0; return 0;
} }
if ( !Abc_NtkLogicToBdd(pNtk) ) if ( !Abc_NtkToBdd(pNtk) )
{ {
fprintf( pErr, "Converting to BDD has failed.\n" ); fprintf( pErr, "Converting to BDD has failed.\n" );
return 1; return 1;
...@@ -4109,7 +4109,7 @@ int Abc_CommandAig( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -4109,7 +4109,7 @@ int Abc_CommandAig( Abc_Frame_t * pAbc, int argc, char ** argv )
fprintf( pOut, "The logic network is already in the AIG form.\n" ); fprintf( pOut, "The logic network is already in the AIG form.\n" );
return 0; return 0;
} }
if ( !Abc_NtkLogicToAig(pNtk) ) if ( !Abc_NtkToAig(pNtk) )
{ {
fprintf( pErr, "Converting to AIG has failed.\n" ); fprintf( pErr, "Converting to AIG has failed.\n" );
return 1; return 1;
...@@ -7719,7 +7719,7 @@ int Abc_CommandSuperChoiceLut( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -7719,7 +7719,7 @@ int Abc_CommandSuperChoiceLut( Abc_Frame_t * pAbc, int argc, char ** argv )
} }
// convert the network into the SOP network // convert the network into the SOP network
pNtkRes = Abc_NtkAigToLogicSop( pNtk ); pNtkRes = Abc_NtkToLogic( pNtk );
// get the new network // get the new network
if ( !Abc_NtkSuperChoiceLut( pNtkRes, nLutSize, nCutSizeMax, fVerbose ) ) if ( !Abc_NtkSuperChoiceLut( pNtkRes, nLutSize, nCutSizeMax, fVerbose ) )
...@@ -8716,7 +8716,7 @@ int Abc_CommandRetime( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -8716,7 +8716,7 @@ int Abc_CommandRetime( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0; return 0;
} }
// convert the network into an SOP network // convert the network into an SOP network
pNtkRes = Abc_NtkAigToLogicSop( pNtk ); pNtkRes = Abc_NtkToLogic( pNtk );
// perform the retiming // perform the retiming
Abc_NtkRetime( pNtkRes, Mode, fForward, fBackward, fVerbose ); Abc_NtkRetime( pNtkRes, Mode, fForward, fBackward, fVerbose );
// replace the current network // replace the current network
...@@ -8725,7 +8725,7 @@ int Abc_CommandRetime( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -8725,7 +8725,7 @@ int Abc_CommandRetime( Abc_Frame_t * pAbc, int argc, char ** argv )
} }
// get the network in the SOP form // get the network in the SOP form
if ( !Abc_NtkLogicToSop(pNtk, 0) ) if ( !Abc_NtkToSop(pNtk, 0) )
{ {
printf( "Converting to SOPs has failed.\n" ); printf( "Converting to SOPs has failed.\n" );
return 0; return 0;
...@@ -9712,7 +9712,7 @@ int Abc_CommandSat( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -9712,7 +9712,7 @@ int Abc_CommandSat( Abc_Frame_t * pAbc, int argc, char ** argv )
else else
{ {
assert( Abc_NtkIsLogic(pNtk) ); assert( Abc_NtkIsLogic(pNtk) );
Abc_NtkLogicToBdd( pNtk ); Abc_NtkToBdd( pNtk );
RetValue = Abc_NtkMiterSat( pNtk, (sint64)nConfLimit, (sint64)nInsLimit, fVerbose, NULL, NULL ); RetValue = Abc_NtkMiterSat( pNtk, (sint64)nConfLimit, (sint64)nInsLimit, fVerbose, NULL, NULL );
} }
......
src/base/abci/abcDebug.c
...@@ -196,7 +196,7 @@ Abc_Ntk_t * Abc_NtkAutoDebugModify( Abc_Ntk_t * pNtkInit, int Step, int fConst1 ...@@ -196,7 +196,7 @@ Abc_Ntk_t * Abc_NtkAutoDebugModify( Abc_Ntk_t * pNtkInit, int Step, int fConst1
Abc_NtkSweep( pNtk, 0 ); Abc_NtkSweep( pNtk, 0 );
Abc_NtkCleanupSeq( pNtk, 0, 0, 0 ); Abc_NtkCleanupSeq( pNtk, 0, 0, 0 );
Abc_NtkLogicToSop( pNtk, 0 ); Abc_NtkToSop( pNtk, 0 );
Abc_NtkCycleInitStateSop( pNtk, 50, 0 ); Abc_NtkCycleInitStateSop( pNtk, 50, 0 );
return pNtk; return pNtk;
} }
......
src/base/abci/abcDress.c
...@@ -63,7 +63,7 @@ void Abc_NtkDress( Abc_Ntk_t * pNtkLogic, char * pFileName, int fVerbose ) ...@@ -63,7 +63,7 @@ void Abc_NtkDress( Abc_Ntk_t * pNtkLogic, char * pFileName, int fVerbose )
Abc_NtkCleanCopy(pNtkOrig); Abc_NtkCleanCopy(pNtkOrig);
// convert it into the logic network // convert it into the logic network
pNtkLogicOrig = Abc_NtkNetlistToLogic( pNtkOrig ); pNtkLogicOrig = Abc_NtkToLogic( pNtkOrig );
// check that the networks have the same PIs/POs/latches // check that the networks have the same PIs/POs/latches
if ( !Abc_NtkCompareSignals( pNtkLogic, pNtkLogicOrig, 1, 1 ) ) if ( !Abc_NtkCompareSignals( pNtkLogic, pNtkLogicOrig, 1, 1 ) )
{ {
......
src/base/abci/abcFxu.c
...@@ -61,7 +61,7 @@ bool Abc_NtkFastExtract( Abc_Ntk_t * pNtk, Fxu_Data_t * p ) ...@@ -61,7 +61,7 @@ bool Abc_NtkFastExtract( Abc_Ntk_t * pNtk, Fxu_Data_t * p )
// Abc_NtkBddToSop(pNtk); // Abc_NtkBddToSop(pNtk);
} }
// get the network in the SOP form // get the network in the SOP form
if ( !Abc_NtkLogicToSop(pNtk, 0) ) if ( !Abc_NtkToSop(pNtk, 0) )
{ {
printf( "Abc_NtkFastExtract(): Converting to SOPs has failed.\n" ); printf( "Abc_NtkFastExtract(): Converting to SOPs has failed.\n" );
return 0; return 0;
......
src/base/abci/abcIvy.c
...@@ -27,9 +27,9 @@ ...@@ -27,9 +27,9 @@
/// DECLARATIONS /// /// DECLARATIONS ///
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
static Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan ); static Abc_Ntk_t * Abc_NtkFromIvy( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan );
static Abc_Ntk_t * Abc_NtkFromAigSeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig ); static Abc_Ntk_t * Abc_NtkFromIvySeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig );
static Ivy_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtkOld ); static Ivy_Man_t * Abc_NtkToIvy( Abc_Ntk_t * pNtkOld );
static void Abc_NtkStrashPerformAig( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan ); static void Abc_NtkStrashPerformAig( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan );
static Ivy_Obj_t * Abc_NodeStrashAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode ); static Ivy_Obj_t * Abc_NodeStrashAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode );
...@@ -93,7 +93,7 @@ Ivy_Man_t * Abc_NtkIvyBefore( Abc_Ntk_t * pNtk, int fSeq, int fUseDc ) ...@@ -93,7 +93,7 @@ Ivy_Man_t * Abc_NtkIvyBefore( Abc_Ntk_t * pNtk, int fSeq, int fUseDc )
if ( Abc_NtkGetChoiceNum( pNtk ) ) if ( Abc_NtkGetChoiceNum( pNtk ) )
printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" ); printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" );
// convert to the AIG manager // convert to the AIG manager
pMan = Abc_NtkToAig( pNtk ); pMan = Abc_NtkToIvy( pNtk );
if ( !Ivy_ManCheck( pMan ) ) if ( !Ivy_ManCheck( pMan ) )
{ {
printf( "AIG check has failed.\n" ); printf( "AIG check has failed.\n" );
...@@ -130,9 +130,9 @@ Abc_Ntk_t * Abc_NtkIvyAfter( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan, int fSeq, int f ...@@ -130,9 +130,9 @@ Abc_Ntk_t * Abc_NtkIvyAfter( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan, int fSeq, int f
int nNodes, fCleanup = 1; int nNodes, fCleanup = 1;
// convert from the AIG manager // convert from the AIG manager
if ( fSeq ) if ( fSeq )
pNtkAig = Abc_NtkFromAigSeq( pNtk, pMan, fHaig ); pNtkAig = Abc_NtkFromIvySeq( pNtk, pMan, fHaig );
else else
pNtkAig = Abc_NtkFromAig( pNtk, pMan ); pNtkAig = Abc_NtkFromIvy( pNtk, pMan );
// report the cleanup results // report the cleanup results
if ( !fHaig && fCleanup && (nNodes = Abc_AigCleanup(pNtkAig->pManFunc)) ) if ( !fHaig && fCleanup && (nNodes = Abc_AigCleanup(pNtkAig->pManFunc)) )
printf( "Warning: AIG cleanup removed %d nodes (this is not a bug).\n", nNodes ); printf( "Warning: AIG cleanup removed %d nodes (this is not a bug).\n", nNodes );
...@@ -608,7 +608,7 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk ) ...@@ -608,7 +608,7 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk )
printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" ); printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" );
// convert to the AIG manager // convert to the AIG manager
pMan = Abc_NtkToAig( pNtk ); pMan = Abc_NtkToIvy( pNtk );
if ( !Ivy_ManCheck( pMan ) ) if ( !Ivy_ManCheck( pMan ) )
{ {
Vec_IntFree( vInit ); Vec_IntFree( vInit );
...@@ -654,8 +654,8 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk ) ...@@ -654,8 +654,8 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk )
/* /*
// convert from the AIG manager // convert from the AIG manager
pNtkAig = Abc_NtkFromAig( pNtk, pMan ); pNtkAig = Abc_NtkFromIvy( pNtk, pMan );
// pNtkAig = Abc_NtkFromAigSeq( pNtk, pMan ); // pNtkAig = Abc_NtkFromIvySeq( pNtk, pMan );
Ivy_ManStop( pMan ); Ivy_ManStop( pMan );
// report the cleanup results // report the cleanup results
...@@ -691,7 +691,7 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk ) ...@@ -691,7 +691,7 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan ) Abc_Ntk_t * Abc_NtkFromIvy( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan )
{ {
Vec_Int_t * vNodes; Vec_Int_t * vNodes;
Abc_Ntk_t * pNtk; Abc_Ntk_t * pNtk;
...@@ -732,7 +732,7 @@ Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan ) ...@@ -732,7 +732,7 @@ Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan )
} }
Vec_IntFree( vNodes ); Vec_IntFree( vNodes );
if ( !Abc_NtkCheck( pNtk ) ) if ( !Abc_NtkCheck( pNtk ) )
fprintf( stdout, "Abc_NtkFromAig(): Network check has failed.\n" ); fprintf( stdout, "Abc_NtkFromIvy(): Network check has failed.\n" );
return pNtk; return pNtk;
} }
...@@ -747,7 +747,7 @@ Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan ) ...@@ -747,7 +747,7 @@ Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Abc_Ntk_t * Abc_NtkFromAigSeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig ) Abc_Ntk_t * Abc_NtkFromIvySeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig )
{ {
Vec_Int_t * vNodes, * vLatches; Vec_Int_t * vNodes, * vLatches;
Abc_Ntk_t * pNtk; Abc_Ntk_t * pNtk;
...@@ -830,7 +830,7 @@ Abc_Ntk_t * Abc_NtkFromAigSeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig ...@@ -830,7 +830,7 @@ Abc_Ntk_t * Abc_NtkFromAigSeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig
Vec_IntFree( vLatches ); Vec_IntFree( vLatches );
Vec_IntFree( vNodes ); Vec_IntFree( vNodes );
if ( !Abc_NtkCheck( pNtk ) ) if ( !Abc_NtkCheck( pNtk ) )
fprintf( stdout, "Abc_NtkFromAigSeq(): Network check has failed.\n" ); fprintf( stdout, "Abc_NtkFromIvySeq(): Network check has failed.\n" );
return pNtk; return pNtk;
} }
...@@ -845,7 +845,7 @@ Abc_Ntk_t * Abc_NtkFromAigSeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig ...@@ -845,7 +845,7 @@ Abc_Ntk_t * Abc_NtkFromAigSeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Ivy_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtkOld ) Ivy_Man_t * Abc_NtkToIvy( Abc_Ntk_t * pNtkOld )
{ {
Ivy_Man_t * pMan; Ivy_Man_t * pMan;
Abc_Obj_t * pObj; Abc_Obj_t * pObj;
......
src/base/abci/abcMini.c
...@@ -24,8 +24,8 @@ ...@@ -24,8 +24,8 @@
/// DECLARATIONS /// /// DECLARATIONS ///
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
static Hop_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk ); static Hop_Man_t * Abc_NtkToMini( Abc_Ntk_t * pNtk );
static Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Hop_Man_t * pMan ); static Abc_Ntk_t * Abc_NtkFromMini( Abc_Ntk_t * pNtkOld, Hop_Man_t * pMan );
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS /// /// FUNCTION DEFINITIONS ///
...@@ -48,7 +48,7 @@ Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk ) ...@@ -48,7 +48,7 @@ Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk )
Hop_Man_t * pMan, * pTemp; Hop_Man_t * pMan, * pTemp;
assert( Abc_NtkIsStrash(pNtk) ); assert( Abc_NtkIsStrash(pNtk) );
// convert to the AIG manager // convert to the AIG manager
pMan = Abc_NtkToAig( pNtk ); pMan = Abc_NtkToMini( pNtk );
if ( pMan == NULL ) if ( pMan == NULL )
return NULL; return NULL;
if ( !Hop_ManCheck( pMan ) ) if ( !Hop_ManCheck( pMan ) )
...@@ -64,7 +64,7 @@ Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk ) ...@@ -64,7 +64,7 @@ Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk )
Hop_ManStop( pTemp ); Hop_ManStop( pTemp );
Hop_ManPrintStats( pMan ); Hop_ManPrintStats( pMan );
// convert from the AIG manager // convert from the AIG manager
pNtkAig = Abc_NtkFromAig( pNtk, pMan ); pNtkAig = Abc_NtkFromMini( pNtk, pMan );
if ( pNtkAig == NULL ) if ( pNtkAig == NULL )
return NULL; return NULL;
Hop_ManStop( pMan ); Hop_ManStop( pMan );
...@@ -89,7 +89,7 @@ Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk ) ...@@ -89,7 +89,7 @@ Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Hop_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk ) Hop_Man_t * Abc_NtkToMini( Abc_Ntk_t * pNtk )
{ {
Hop_Man_t * pMan; Hop_Man_t * pMan;
Abc_Obj_t * pObj; Abc_Obj_t * pObj;
...@@ -121,7 +121,7 @@ Hop_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk ) ...@@ -121,7 +121,7 @@ Hop_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtk, Hop_Man_t * pMan ) Abc_Ntk_t * Abc_NtkFromMini( Abc_Ntk_t * pNtk, Hop_Man_t * pMan )
{ {
Vec_Ptr_t * vNodes; Vec_Ptr_t * vNodes;
Abc_Ntk_t * pNtkNew; Abc_Ntk_t * pNtkNew;
...@@ -142,7 +142,7 @@ Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtk, Hop_Man_t * pMan ) ...@@ -142,7 +142,7 @@ Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtk, Hop_Man_t * pMan )
Hop_ManForEachPo( pMan, pObj, i ) Hop_ManForEachPo( pMan, pObj, i )
Abc_ObjAddFanin( Abc_NtkCo(pNtkNew, i), (Abc_Obj_t *)Hop_ObjChild0Copy(pObj) ); Abc_ObjAddFanin( Abc_NtkCo(pNtkNew, i), (Abc_Obj_t *)Hop_ObjChild0Copy(pObj) );
if ( !Abc_NtkCheck( pNtkNew ) ) if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkFromAig(): Network check has failed.\n" ); fprintf( stdout, "Abc_NtkFromMini(): Network check has failed.\n" );
return pNtkNew; return pNtkNew;
} }
......
src/base/abci/abcQuant.c
...@@ -30,6 +30,39 @@ ...@@ -30,6 +30,39 @@
/**Function************************************************************* /**Function*************************************************************
Synopsis [Performs fast synthesis.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkSynthesize( Abc_Ntk_t ** ppNtk, int fMoreEffort )
{
Abc_Ntk_t * pNtk, * pNtkTemp;
pNtk = *ppNtk;
Abc_NtkRewrite( pNtk, 0, 0, 0, 0, 0 );
Abc_NtkRefactor( pNtk, 10, 16, 0, 0, 0, 0 );
pNtk = Abc_NtkBalance( pNtkTemp = pNtk, 0, 0, 0 );
Abc_NtkDelete( pNtkTemp );
if ( fMoreEffort )
{
Abc_NtkRewrite( pNtk, 0, 0, 0, 0, 0 );
Abc_NtkRefactor( pNtk, 10, 16, 0, 0, 0, 0 );
pNtk = Abc_NtkBalance( pNtkTemp = pNtk, 0, 0, 0 );
Abc_NtkDelete( pNtkTemp );
}
*ppNtk = pNtk;
}
/**Function*************************************************************
Synopsis [Existentially quantifies one variable.] Synopsis [Existentially quantifies one variable.]
Description [] Description []
...@@ -113,6 +146,7 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose ) ...@@ -113,6 +146,7 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose )
Abc_Ntk_t * pNtkNew; Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj, * pMiter; Abc_Obj_t * pObj, * pMiter;
int i, nLatches; int i, nLatches;
int fSynthesis = 1;
assert( Abc_NtkIsStrash(pNtk) ); assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkLatchNum(pNtk) ); assert( Abc_NtkLatchNum(pNtk) );
...@@ -136,7 +170,10 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose ) ...@@ -136,7 +170,10 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose )
// create PI variables // create PI variables
Abc_NtkForEachPi( pNtk, pObj, i ) Abc_NtkForEachPi( pNtk, pObj, i )
Abc_NtkDupObj( pNtkNew, pObj, 1 ); Abc_NtkDupObj( pNtkNew, pObj, 1 );
// create the PO
Abc_NtkCreatePo( pNtkNew );
// restrash the nodes (assuming a topological order of the old network) // restrash the nodes (assuming a topological order of the old network)
Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
Abc_NtkForEachNode( pNtk, pObj, i ) Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = Abc_AigAnd( pNtkNew->pManFunc, Abc_ObjChild0Copy(pObj), Abc_ObjChild1Copy(pObj) ); pObj->pCopy = Abc_AigAnd( pNtkNew->pManFunc, Abc_ObjChild0Copy(pObj), Abc_ObjChild1Copy(pObj) );
// create the function of the primary output // create the function of the primary output
...@@ -150,7 +187,7 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose ) ...@@ -150,7 +187,7 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose )
pMiter = Abc_AigMiter( pNtkNew->pManFunc, vPairs ); pMiter = Abc_AigMiter( pNtkNew->pManFunc, vPairs );
Vec_PtrFree( vPairs ); Vec_PtrFree( vPairs );
// add the primary output // add the primary output
Abc_ObjAddFanin( Abc_NtkCreatePo(pNtkNew), Abc_ObjNot(pMiter) ); Abc_ObjAddFanin( Abc_NtkPo(pNtkNew,0), Abc_ObjNot(pMiter) );
Abc_ObjAssignName( Abc_NtkPo(pNtkNew,0), "rel", NULL ); Abc_ObjAssignName( Abc_NtkPo(pNtkNew,0), "rel", NULL );
// quantify inputs // quantify inputs
...@@ -158,7 +195,20 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose ) ...@@ -158,7 +195,20 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose )
{ {
assert( Abc_NtkPiNum(pNtkNew) == Abc_NtkPiNum(pNtk) + 2*nLatches ); assert( Abc_NtkPiNum(pNtkNew) == Abc_NtkPiNum(pNtk) + 2*nLatches );
for ( i = Abc_NtkPiNum(pNtkNew) - 1; i >= 2*nLatches; i-- ) for ( i = Abc_NtkPiNum(pNtkNew) - 1; i >= 2*nLatches; i-- )
// for ( i = 2*nLatches; i < Abc_NtkPiNum(pNtkNew); i++ )
{
Abc_NtkQuantify( pNtkNew, i, fVerbose ); Abc_NtkQuantify( pNtkNew, i, fVerbose );
// if ( fSynthesis && (i % 3 == 2) )
if ( fSynthesis )
{
Abc_NtkCleanData( pNtkNew );
Abc_AigCleanup( pNtkNew->pManFunc );
Abc_NtkSynthesize( &pNtkNew, 1 );
}
// printf( "Var = %3d. Nodes = %6d. ", Abc_NtkPiNum(pNtkNew) - 1 - i, Abc_NtkNodeNum(pNtkNew) );
// printf( "Var = %3d. Nodes = %6d. ", i - 2*nLatches, Abc_NtkNodeNum(pNtkNew) );
}
// printf( "\n" );
Abc_NtkCleanData( pNtkNew ); Abc_NtkCleanData( pNtkNew );
Abc_AigCleanup( pNtkNew->pManFunc ); Abc_AigCleanup( pNtkNew->pManFunc );
for ( i = Abc_NtkPiNum(pNtkNew) - 1; i >= 2*nLatches; i-- ) for ( i = Abc_NtkPiNum(pNtkNew) - 1; i >= 2*nLatches; i-- )
...@@ -169,7 +219,7 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose ) ...@@ -169,7 +219,7 @@ Abc_Ntk_t * Abc_NtkTransRel( Abc_Ntk_t * pNtk, int fInputs, int fVerbose )
} }
} }
// make sure that everything is okay // check consistency of the network
if ( !Abc_NtkCheck( pNtkNew ) ) if ( !Abc_NtkCheck( pNtkNew ) )
{ {
printf( "Abc_NtkTransRel: The network check has failed.\n" ); printf( "Abc_NtkTransRel: The network check has failed.\n" );
...@@ -263,6 +313,7 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose ) ...@@ -263,6 +313,7 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose )
int clk, i, v, nVars, nNodesOld, nNodesNew, nNodesPrev; int clk, i, v, nVars, nNodesOld, nNodesNew, nNodesPrev;
int fFixedPoint = 0; int fFixedPoint = 0;
int fSynthesis = 1; int fSynthesis = 1;
int fMoreEffort = 1;
assert( Abc_NtkIsStrash(pNtkRel) ); assert( Abc_NtkIsStrash(pNtkRel) );
assert( Abc_NtkLatchNum(pNtkRel) == 0 ); assert( Abc_NtkLatchNum(pNtkRel) == 0 );
...@@ -273,8 +324,8 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose ) ...@@ -273,8 +324,8 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose )
pNtkReached = Abc_NtkDup( pNtkFront ); pNtkReached = Abc_NtkDup( pNtkFront );
//Abc_NtkShow( pNtkReached, 0, 0, 0 ); //Abc_NtkShow( pNtkReached, 0, 0, 0 );
if ( fVerbose ) // if ( fVerbose )
printf( "Transition relation = %6d.\n", Abc_NtkNodeNum(pNtkRel) ); // printf( "Transition relation = %6d.\n", Abc_NtkNodeNum(pNtkRel) );
// perform iterations of reachability analysis // perform iterations of reachability analysis
nNodesPrev = Abc_NtkNodeNum(pNtkFront); nNodesPrev = Abc_NtkNodeNum(pNtkFront);
...@@ -293,25 +344,13 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose ) ...@@ -293,25 +344,13 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose )
{ {
Abc_NtkCleanData( pNtkNext ); Abc_NtkCleanData( pNtkNext );
Abc_AigCleanup( pNtkNext->pManFunc ); Abc_AigCleanup( pNtkNext->pManFunc );
Abc_NtkSynthesize( &pNtkNext, fMoreEffort );
Abc_NtkRewrite( pNtkNext, 0, 0, 0, 0, 0 );
pNtkNext = Abc_NtkBalance( pNtkTemp = pNtkNext, 0, 0, 0 );
Abc_NtkDelete( pNtkTemp );
} }
} }
Abc_NtkCleanData( pNtkNext ); Abc_NtkCleanData( pNtkNext );
Abc_AigCleanup( pNtkNext->pManFunc ); Abc_AigCleanup( pNtkNext->pManFunc );
if ( fSynthesis ) if ( fSynthesis )
{ Abc_NtkSynthesize( &pNtkNext, 1 );
Abc_NtkRewrite( pNtkNext, 0, 0, 0, 0, 0 );
pNtkNext = Abc_NtkBalance( pNtkTemp = pNtkNext, 0, 0, 0 );
Abc_NtkDelete( pNtkTemp );
Abc_NtkRewrite( pNtkNext, 0, 0, 0, 0, 0 );
Abc_NtkRefactor( pNtkReached, 10, 16, 0, 0, 0, 0 );
pNtkNext = Abc_NtkBalance( pNtkTemp = pNtkNext, 0, 0, 0 );
Abc_NtkDelete( pNtkTemp );
}
// map the next states into the current states // map the next states into the current states
pNtkNext = Abc_NtkSwapVariables( pNtkTemp = pNtkNext ); pNtkNext = Abc_NtkSwapVariables( pNtkTemp = pNtkNext );
Abc_NtkDelete( pNtkTemp ); Abc_NtkDelete( pNtkTemp );
...@@ -333,20 +372,15 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose ) ...@@ -333,20 +372,15 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose )
nNodesOld = Abc_NtkNodeNum(pNtkFront); nNodesOld = Abc_NtkNodeNum(pNtkFront);
if ( fSynthesis ) if ( fSynthesis )
{ {
Abc_NtkRewrite( pNtkFront, 0, 0, 0, 0, 0 ); Abc_NtkSynthesize( &pNtkFront, fMoreEffort );
pNtkFront = Abc_NtkBalance( pNtkTemp = pNtkFront, 0, 0, 0 ); Abc_NtkSynthesize( &pNtkReached, fMoreEffort );
Abc_NtkDelete( pNtkTemp );
Abc_NtkRewrite( pNtkReached, 0, 0, 0, 0, 0 );
pNtkReached = Abc_NtkBalance( pNtkTemp = pNtkReached, 0, 0, 0 );
Abc_NtkDelete( pNtkTemp );
} }
nNodesNew = Abc_NtkNodeNum(pNtkFront); nNodesNew = Abc_NtkNodeNum(pNtkFront);
// print statistics // print statistics
if ( fVerbose ) if ( fVerbose )
{ {
printf( "I = %3d : Reached = %6d Front = %6d FrontM = %6d %6.2f %% ", printf( "I = %3d : Reach = %6d Fr = %6d FrM = %6d %7.2f %% ",
i + 1, Abc_NtkNodeNum(pNtkReached), nNodesOld, nNodesNew, 100.0*(nNodesNew-nNodesPrev)/nNodesNew ); i + 1, Abc_NtkNodeNum(pNtkReached), nNodesOld, nNodesNew, 100.0*(nNodesNew-nNodesPrev)/nNodesPrev );
PRT( "T", clock() - clk ); PRT( "T", clock() - clk );
} }
nNodesPrev = Abc_NtkNodeNum(pNtkFront); nNodesPrev = Abc_NtkNodeNum(pNtkFront);
...@@ -354,13 +388,6 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose ) ...@@ -354,13 +388,6 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose )
if ( !fFixedPoint ) if ( !fFixedPoint )
fprintf( stdout, "Reachability analysis stopped after %d iterations.\n", nIters ); fprintf( stdout, "Reachability analysis stopped after %d iterations.\n", nIters );
// report the stats
if ( fVerbose )
{
// nMints = 1;
// fprintf( stdout, "The estimated number of minterms in the reachable state set = %d. (%6.2f %%)\n", nMints, 100.0*nMints/(1<<Abc_NtkLatchNum(pNtk)) );
}
// complement the output to represent the set of unreachable states // complement the output to represent the set of unreachable states
Abc_ObjXorFaninC( Abc_NtkPo(pNtkReached,0), 0 ); Abc_ObjXorFaninC( Abc_NtkPo(pNtkReached,0), 0 );
...@@ -372,7 +399,7 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose ) ...@@ -372,7 +399,7 @@ Abc_Ntk_t * Abc_NtkReachability( Abc_Ntk_t * pNtkRel, int nIters, int fVerbose )
Abc_NtkDeleteObj( pObj ); Abc_NtkDeleteObj( pObj );
} }
// make sure that everything is okay // check consistency of the network
if ( !Abc_NtkCheck( pNtkReached ) ) if ( !Abc_NtkCheck( pNtkReached ) )
{ {
printf( "Abc_NtkReachability: The network check has failed.\n" ); printf( "Abc_NtkReachability: The network check has failed.\n" );
......
src/base/abci/abcStrash.c
...@@ -105,7 +105,7 @@ Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool fCleanup ) ...@@ -105,7 +105,7 @@ Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool fCleanup )
if ( Abc_NtkIsStrash(pNtk) ) if ( Abc_NtkIsStrash(pNtk) )
return Abc_NtkRestrash( pNtk, fCleanup ); return Abc_NtkRestrash( pNtk, fCleanup );
// convert the node representation in the logic network to the AIG form // convert the node representation in the logic network to the AIG form
if ( !Abc_NtkLogicToAig(pNtk) ) if ( !Abc_NtkToAig(pNtk) )
{ {
printf( "Converting to AIGs has failed.\n" ); printf( "Converting to AIGs has failed.\n" );
return NULL; return NULL;
...@@ -156,7 +156,7 @@ int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fAddPos ) ...@@ -156,7 +156,7 @@ int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fAddPos )
// the first network should be an AIG // the first network should be an AIG
assert( Abc_NtkIsStrash(pNtk1) ); assert( Abc_NtkIsStrash(pNtk1) );
assert( Abc_NtkIsLogic(pNtk2) || Abc_NtkIsStrash(pNtk2) ); assert( Abc_NtkIsLogic(pNtk2) || Abc_NtkIsStrash(pNtk2) );
if ( Abc_NtkIsLogic(pNtk2) && !Abc_NtkLogicToAig(pNtk2) ) if ( Abc_NtkIsLogic(pNtk2) && !Abc_NtkToAig(pNtk2) )
{ {
printf( "Converting to AIGs has failed.\n" ); printf( "Converting to AIGs has failed.\n" );
return 0; return 0;
......
src/base/abci/abcSweep.c
...@@ -536,7 +536,7 @@ int Abc_NtkSweep( Abc_Ntk_t * pNtk, int fVerbose ) ...@@ -536,7 +536,7 @@ int Abc_NtkSweep( Abc_Ntk_t * pNtk, int fVerbose )
int i, nNodesOld; int i, nNodesOld;
assert( Abc_NtkIsLogic(pNtk) ); assert( Abc_NtkIsLogic(pNtk) );
// convert network to BDD representation // convert network to BDD representation
if ( !Abc_NtkLogicToBdd(pNtk) ) if ( !Abc_NtkToBdd(pNtk) )
{ {
fprintf( stdout, "Converting to BDD has failed.\n" ); fprintf( stdout, "Converting to BDD has failed.\n" );
return 1; return 1;
......
src/base/cmd/cmd.c
...@@ -1265,7 +1265,7 @@ int CmdCommandSis( Abc_Frame_t * pAbc, int argc, char **argv ) ...@@ -1265,7 +1265,7 @@ int CmdCommandSis( Abc_Frame_t * pAbc, int argc, char **argv )
} }
// write out the current network // write out the current network
pNetlist = Abc_NtkLogicToNetlist(pNtk,0); pNetlist = Abc_NtkToNetlist(pNtk,0);
if ( pNetlist == NULL ) if ( pNetlist == NULL )
{ {
fprintf( pErr, "Cannot produce the intermediate network.\n" ); fprintf( pErr, "Cannot produce the intermediate network.\n" );
...@@ -1406,7 +1406,7 @@ int CmdCommandMvsis( Abc_Frame_t * pAbc, int argc, char **argv ) ...@@ -1406,7 +1406,7 @@ int CmdCommandMvsis( Abc_Frame_t * pAbc, int argc, char **argv )
} }
// write out the current network // write out the current network
pNetlist = Abc_NtkLogicToNetlist(pNtk,0); pNetlist = Abc_NtkToNetlist(pNtk,0);
if ( pNetlist == NULL ) if ( pNetlist == NULL )
{ {
fprintf( pErr, "Cannot produce the intermediate network.\n" ); fprintf( pErr, "Cannot produce the intermediate network.\n" );
...@@ -1552,7 +1552,7 @@ int CmdCommandCapo( Abc_Frame_t * pAbc, int argc, char **argv ) ...@@ -1552,7 +1552,7 @@ int CmdCommandCapo( Abc_Frame_t * pAbc, int argc, char **argv )
} }
// write out the current network // write out the current network
pNetlist = Abc_NtkLogicToNetlist(pNtk,0); pNetlist = Abc_NtkToNetlist(pNtk,0);
if ( pNetlist == NULL ) if ( pNetlist == NULL )
{ {
fprintf( pErr, "Cannot produce the intermediate network.\n" ); fprintf( pErr, "Cannot produce the intermediate network.\n" );
......
src/base/io/io.c
...@@ -55,7 +55,7 @@ static int IoCommandWritePla ( Abc_Frame_t * pAbc, int argc, char **argv ); ...@@ -55,7 +55,7 @@ static int IoCommandWritePla ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandWriteVerilog( Abc_Frame_t * pAbc, int argc, char **argv ); static int IoCommandWriteVerilog( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandWriteVerLib ( Abc_Frame_t * pAbc, int argc, char **argv ); static int IoCommandWriteVerLib ( Abc_Frame_t * pAbc, int argc, char **argv );
extern Abc_Lib_t * Ver_ParseFile( char * pFileName, Abc_Lib_t * pGateLib, int fCheck, int fUseMemMan ); extern int glo_fMapped;
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS /// /// FUNCTION DEFINITIONS ///
...@@ -139,11 +139,15 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -139,11 +139,15 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
int c; int c;
fCheck = 1; fCheck = 1;
glo_fMapped = 0;
Extra_UtilGetoptReset(); Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "ch" ) ) != EOF ) while ( ( c = Extra_UtilGetopt( argc, argv, "mch" ) ) != EOF )
{ {
switch ( c ) switch ( c )
{ {
case 'm':
glo_fMapped ^= 1;
break;
case 'c': case 'c':
fCheck ^= 1; fCheck ^= 1;
break; break;
...@@ -166,10 +170,11 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -166,10 +170,11 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0; return 0;
usage: usage:
fprintf( pAbc->Err, "usage: read [-ch] <file>\n" ); fprintf( pAbc->Err, "usage: read [-mch] <file>\n" );
fprintf( pAbc->Err, "\t replaces the current network by the network read from <file>\n" ); fprintf( pAbc->Err, "\t replaces the current network by the network read from <file>\n" );
fprintf( pAbc->Err, "\t by calling the parser that matches the extension of <file>\n" ); fprintf( pAbc->Err, "\t by calling the parser that matches the extension of <file>\n" );
fprintf( pAbc->Err, "\t (to read a hierarchical design, use \"read_hie\")\n" ); fprintf( pAbc->Err, "\t (to read a hierarchical design, use \"read_hie\")\n" );
fprintf( pAbc->Err, "\t-m : toggle reading mapped Verilog [default = %s]\n", glo_fMapped? "yes":"no" );
fprintf( pAbc->Err, "\t-c : toggle network check after reading [default = %s]\n", fCheck? "yes":"no" ); fprintf( pAbc->Err, "\t-c : toggle network check after reading [default = %s]\n", fCheck? "yes":"no" );
fprintf( pAbc->Err, "\t-h : prints the command summary\n" ); fprintf( pAbc->Err, "\t-h : prints the command summary\n" );
fprintf( pAbc->Err, "\tfile : the name of a file to read\n" ); fprintf( pAbc->Err, "\tfile : the name of a file to read\n" );
...@@ -332,7 +337,13 @@ int IoCommandReadBlif( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -332,7 +337,13 @@ int IoCommandReadBlif( Abc_Frame_t * pAbc, int argc, char ** argv )
pNtk = Io_ReadBlifAsAig( pFileName, fCheck ); pNtk = Io_ReadBlifAsAig( pFileName, fCheck );
else else
// pNtk = Io_Read( pFileName, IO_FILE_BLIF, fCheck ); // pNtk = Io_Read( pFileName, IO_FILE_BLIF, fCheck );
{
Abc_Ntk_t * pTemp;
pNtk = Io_ReadBlif( pFileName, fCheck ); pNtk = Io_ReadBlif( pFileName, fCheck );
pNtk = Abc_NtkToLogic( pTemp = pNtk );
Abc_NtkDelete( pTemp );
}
if ( pNtk == NULL ) if ( pNtk == NULL )
return 1; return 1;
// replace the current network // replace the current network
...@@ -657,11 +668,15 @@ int IoCommandReadVerilog( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -657,11 +668,15 @@ int IoCommandReadVerilog( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0; return 0;
fCheck = 1; fCheck = 1;
glo_fMapped = 0;
Extra_UtilGetoptReset(); Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "ch" ) ) != EOF ) while ( ( c = Extra_UtilGetopt( argc, argv, "mch" ) ) != EOF )
{ {
switch ( c ) switch ( c )
{ {
case 'm':
glo_fMapped ^= 1;
break;
case 'c': case 'c':
fCheck ^= 1; fCheck ^= 1;
break; break;
...@@ -684,8 +699,9 @@ int IoCommandReadVerilog( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -684,8 +699,9 @@ int IoCommandReadVerilog( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0; return 0;
usage: usage:
fprintf( pAbc->Err, "usage: read_verilog [-ch] <file>\n" ); fprintf( pAbc->Err, "usage: read_verilog [-mch] <file>\n" );
fprintf( pAbc->Err, "\t read the network in Verilog (IWLS 2005 subset)\n" ); fprintf( pAbc->Err, "\t read the network in Verilog (IWLS 2002/2005 subset)\n" );
fprintf( pAbc->Err, "\t-m : toggle reading mapped Verilog [default = %s]\n", glo_fMapped? "yes":"no" );
fprintf( pAbc->Err, "\t-c : toggle network check after reading [default = %s]\n", fCheck? "yes":"no" ); fprintf( pAbc->Err, "\t-c : toggle network check after reading [default = %s]\n", fCheck? "yes":"no" );
fprintf( pAbc->Err, "\t-h : prints the command summary\n" ); fprintf( pAbc->Err, "\t-h : prints the command summary\n" );
fprintf( pAbc->Err, "\tfile : the name of a file to read\n" ); fprintf( pAbc->Err, "\tfile : the name of a file to read\n" );
...@@ -712,6 +728,7 @@ int IoCommandReadVer( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -712,6 +728,7 @@ int IoCommandReadVer( Abc_Frame_t * pAbc, int argc, char ** argv )
int fCheck; int fCheck;
int c; int c;
extern Abc_Ntk_t * Abc_LibDeriveAig( Abc_Ntk_t * pNtk, Abc_Lib_t * pLib ); extern Abc_Ntk_t * Abc_LibDeriveAig( Abc_Ntk_t * pNtk, Abc_Lib_t * pLib );
extern Abc_Lib_t * Ver_ParseFile( char * pFileName, Abc_Lib_t * pGateLib, int fCheck, int fUseMemMan );
fCheck = 1; fCheck = 1;
Extra_UtilGetoptReset(); Extra_UtilGetoptReset();
...@@ -921,11 +938,15 @@ int IoCommandWriteHie( Abc_Frame_t * pAbc, int argc, char **argv ) ...@@ -921,11 +938,15 @@ int IoCommandWriteHie( Abc_Frame_t * pAbc, int argc, char **argv )
char * pBaseName, * pFileName; char * pBaseName, * pFileName;
int c; int c;
glo_fMapped = 0;
Extra_UtilGetoptReset(); Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF ) while ( ( c = Extra_UtilGetopt( argc, argv, "mh" ) ) != EOF )
{ {
switch ( c ) switch ( c )
{ {
case 'm':
glo_fMapped ^= 1;
break;
case 'h': case 'h':
goto usage; goto usage;
default: default:
...@@ -946,6 +967,7 @@ usage: ...@@ -946,6 +967,7 @@ usage:
fprintf( pAbc->Err, "usage: write_hie [-h] <orig> <file>\n" ); fprintf( pAbc->Err, "usage: write_hie [-h] <orig> <file>\n" );
fprintf( pAbc->Err, "\t writes the current network into <file> by calling\n" ); fprintf( pAbc->Err, "\t writes the current network into <file> by calling\n" );
fprintf( pAbc->Err, "\t the hierarchical writer that matches the extension of <file>\n" ); fprintf( pAbc->Err, "\t the hierarchical writer that matches the extension of <file>\n" );
fprintf( pAbc->Err, "\t-m : toggle reading mapped Verilog for <orig> [default = %s]\n", glo_fMapped? "yes":"no" );
fprintf( pAbc->Err, "\t-h : print the help massage\n" ); fprintf( pAbc->Err, "\t-h : print the help massage\n" );
fprintf( pAbc->Err, "\torig : the name of the original file with the hierarchical design\n" ); fprintf( pAbc->Err, "\torig : the name of the original file with the hierarchical design\n" );
fprintf( pAbc->Err, "\tfile : the name of the file to write\n" ); fprintf( pAbc->Err, "\tfile : the name of the file to write\n" );
......
src/base/io/ioReadBench.c
...@@ -150,7 +150,7 @@ Abc_Ntk_t * Io_ReadBenchNetwork( Extra_FileReader_t * p ) ...@@ -150,7 +150,7 @@ Abc_Ntk_t * Io_ReadBenchNetwork( Extra_FileReader_t * p )
Abc_ObjSetData( pNode, Abc_SopRegister( pNtk->pManFunc, " 0\n" ) ); Abc_ObjSetData( pNode, Abc_SopRegister( pNtk->pManFunc, " 0\n" ) );
else else
{ {
printf( "Cannot determine gate type \"%s\" in line %d.\n", pType, Extra_FileReaderGetLineNumber(p, 0) ); printf( "Io_ReadBenchNetwork(): Cannot determine gate type \"%s\" in line %d.\n", pType, Extra_FileReaderGetLineNumber(p, 0) );
Vec_StrFree( vString ); Vec_StrFree( vString );
Abc_NtkDelete( pNtk ); Abc_NtkDelete( pNtk );
return NULL; return NULL;
......
src/base/io/ioReadBlifMv.c
...@@ -98,6 +98,7 @@ static int Io_MvParseLineSubckt( Io_MvMod_t * p, char * pLine ); ...@@ -98,6 +98,7 @@ static int Io_MvParseLineSubckt( Io_MvMod_t * p, char * pLine );
static int Io_MvParseLineMv( Io_MvMod_t * p, char * pLine ); static int Io_MvParseLineMv( Io_MvMod_t * p, char * pLine );
static int Io_MvParseLineNamesMv( Io_MvMod_t * p, char * pLine, int fReset ); static int Io_MvParseLineNamesMv( Io_MvMod_t * p, char * pLine, int fReset );
static int Io_MvParseLineNamesBlif( Io_MvMod_t * p, char * pLine ); static int Io_MvParseLineNamesBlif( Io_MvMod_t * p, char * pLine );
static int Io_MvParseLineGateBlif( Io_MvMod_t * p, Vec_Ptr_t * vTokens );
static int Io_MvCharIsSpace( char s ) { return s == ' ' || s == '\t' || s == '\r' || s == '\n'; } static int Io_MvCharIsSpace( char s ) { return s == ' ' || s == '\t' || s == '\r' || s == '\n'; }
static int Io_MvCharIsMvSymb( char s ) { return s == '(' || s == ')' || s == '{' || s == '}' || s == '-' || s == ',' || s == '!'; } static int Io_MvCharIsMvSymb( char s ) { return s == '(' || s == ')' || s == '{' || s == '}' || s == '-' || s == ',' || s == '!'; }
...@@ -568,7 +569,7 @@ static void Io_MvReadPreparse( Io_MvMan_t * p ) ...@@ -568,7 +569,7 @@ static void Io_MvReadPreparse( Io_MvMan_t * p )
// parse directives // parse directives
if ( *(pCur-1) != '.' ) if ( *(pCur-1) != '.' )
continue; continue;
if ( !strncmp(pCur, "names", 5) || !strncmp(pCur, "table", 5) ) if ( !strncmp(pCur, "names", 5) || !strncmp(pCur, "table", 5) || !strncmp(pCur, "gate", 4) )
Vec_PtrPush( p->pLatest->vNames, pCur ); Vec_PtrPush( p->pLatest->vNames, pCur );
else if ( p->fBlifMv && (!strncmp(pCur, "def ", 4) || !strncmp(pCur, "default ", 8)) ) else if ( p->fBlifMv && (!strncmp(pCur, "def ", 4) || !strncmp(pCur, "default ", 8)) )
continue; continue;
...@@ -1464,6 +1465,10 @@ static int Io_MvParseLineNamesBlif( Io_MvMod_t * p, char * pLine ) ...@@ -1464,6 +1465,10 @@ static int Io_MvParseLineNamesBlif( Io_MvMod_t * p, char * pLine )
char * pName; char * pName;
assert( !p->pMan->fBlifMv ); assert( !p->pMan->fBlifMv );
Io_MvSplitIntoTokens( vTokens, pLine, '\0' ); Io_MvSplitIntoTokens( vTokens, pLine, '\0' );
// parse the mapped node
if ( !strcmp(Vec_PtrEntry(vTokens,0), "gate") )
return Io_MvParseLineGateBlif( p, vTokens );
// parse the regular name line
assert( !strcmp(Vec_PtrEntry(vTokens,0), "names") ); assert( !strcmp(Vec_PtrEntry(vTokens,0), "names") );
pName = Vec_PtrEntryLast( vTokens ); pName = Vec_PtrEntryLast( vTokens );
pNet = Abc_NtkFindOrCreateNet( p->pNtk, pName ); pNet = Abc_NtkFindOrCreateNet( p->pNtk, pName );
...@@ -1483,6 +1488,104 @@ static int Io_MvParseLineNamesBlif( Io_MvMod_t * p, char * pLine ) ...@@ -1483,6 +1488,104 @@ static int Io_MvParseLineNamesBlif( Io_MvMod_t * p, char * pLine )
} }
#include "mio.h"
#include "main.h"
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static char * Io_ReadBlifCleanName( char * pName )
{
int i, Length;
Length = strlen(pName);
for ( i = 0; i < Length; i++ )
if ( pName[i] == '=' )
return pName + i + 1;
return NULL;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static int Io_MvParseLineGateBlif( Io_MvMod_t * p, Vec_Ptr_t * vTokens )
{
Mio_Library_t * pGenlib;
Mio_Gate_t * pGate;
Abc_Obj_t * pNode;
char ** ppNames, * pName;
int i, nNames;
pName = vTokens->pArray[0];
// check that the library is available
pGenlib = Abc_FrameReadLibGen();
if ( pGenlib == NULL )
{
sprintf( p->pMan->sError, "Line %d: The current library is not available.", Io_MvGetLine(p->pMan, pName) );
return 0;
}
// create a new node and add it to the network
if ( vTokens->nSize < 2 )
{
sprintf( p->pMan->sError, "Line %d: The .gate line has less than two tokens.", Io_MvGetLine(p->pMan, pName) );
return 0;
}
// get the gate
pGate = Mio_LibraryReadGateByName( pGenlib, vTokens->pArray[1] );
if ( pGate == NULL )
{
sprintf( p->pMan->sError, "Line %d: Cannot find gate \"%s\" in the library.", Io_MvGetLine(p->pMan, pName), vTokens->pArray[1] );
return 0;
}
// if this is the first line with gate, update the network type
if ( Abc_NtkNodeNum(p->pNtk) == 0 )
{
assert( p->pNtk->ntkFunc == ABC_FUNC_SOP );
p->pNtk->ntkFunc = ABC_FUNC_MAP;
Extra_MmFlexStop( p->pNtk->pManFunc );
p->pNtk->pManFunc = pGenlib;
}
// remove the formal parameter names
for ( i = 2; i < vTokens->nSize; i++ )
{
vTokens->pArray[i] = Io_ReadBlifCleanName( vTokens->pArray[i] );
if ( vTokens->pArray[i] == NULL )
{
sprintf( p->pMan->sError, "Line %d: Invalid gate input assignment.", Io_MvGetLine(p->pMan, pName) );
return 0;
}
}
// create the node
ppNames = (char **)vTokens->pArray + 2;
nNames = vTokens->nSize - 3;
pNode = Io_ReadCreateNode( p->pNtk, ppNames[nNames], ppNames, nNames );
// set the pointer to the functionality of the node
Abc_ObjSetData( pNode, pGate );
return 1;
}
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
/// END OF FILE /// /// END OF FILE ///
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
......
src/base/io/ioReadVerilog.c
...@@ -45,13 +45,12 @@ Abc_Ntk_t * Io_ReadVerilog( char * pFileName, int fCheck ) ...@@ -45,13 +45,12 @@ Abc_Ntk_t * Io_ReadVerilog( char * pFileName, int fCheck )
{ {
Abc_Ntk_t * pNtk; Abc_Ntk_t * pNtk;
Abc_Lib_t * pDesign; Abc_Lib_t * pDesign;
int i;
// parse the verilog file // parse the verilog file
pDesign = Ver_ParseFile( pFileName, NULL, 1, fCheck ); pDesign = Ver_ParseFile( pFileName, NULL, fCheck, 1 );
if ( pDesign == NULL ) if ( pDesign == NULL )
return NULL; return NULL;
/*
// extract the master network // extract the master network
pNtk = Vec_PtrEntryLast( pDesign->vModules ); pNtk = Vec_PtrEntryLast( pDesign->vModules );
pNtk->pDesign = pDesign; pNtk->pDesign = pDesign;
...@@ -75,6 +74,28 @@ Abc_Ntk_t * Io_ReadVerilog( char * pFileName, int fCheck ) ...@@ -75,6 +74,28 @@ Abc_Ntk_t * Io_ReadVerilog( char * pFileName, int fCheck )
// check that there is no cyclic dependency // check that there is no cyclic dependency
Abc_NtkIsAcyclicHierarchy( pNtk ); Abc_NtkIsAcyclicHierarchy( pNtk );
} }
*/
// extract the master network
pNtk = Vec_PtrEntry( pDesign->vModules, 0 );
pNtk->pDesign = pDesign;
pDesign->pManFunc = NULL;
//Io_WriteVerilog( pNtk, "_temp.v" );
// verify the design for cyclic dependence
assert( Vec_PtrSize(pDesign->vModules) > 0 );
if ( Vec_PtrSize(pDesign->vModules) == 1 )
{
// printf( "Warning: The design is not hierarchical.\n" );
Abc_LibFree( pDesign, pNtk );
pNtk->pDesign = NULL;
pNtk->pSpec = Extra_UtilStrsav( pFileName );
}
else
{
// check that there is no cyclic dependency
Abc_NtkIsAcyclicHierarchy( pNtk );
}
return pNtk; return pNtk;
} }
......
src/base/io/ioUtil.c
...@@ -209,7 +209,7 @@ Abc_NtkPrintStats( stdout, pNtk, 0 ); ...@@ -209,7 +209,7 @@ Abc_NtkPrintStats( stdout, pNtk, 0 );
// convert blackboxes // convert blackboxes
if ( Abc_NtkBlackboxNum(pNtk) > 0 ) if ( Abc_NtkBlackboxNum(pNtk) > 0 )
{ {
printf( "Hierarchy reader converted %d blackboxes.\n", Abc_NtkBlackboxNum(pNtk) ); printf( "Hierarchy reader converted %d instances of blackboxes.\n", Abc_NtkBlackboxNum(pNtk) );
pNtk = Abc_NtkConvertBlackboxes( pTemp = pNtk ); pNtk = Abc_NtkConvertBlackboxes( pTemp = pNtk );
Abc_NtkDelete( pTemp ); Abc_NtkDelete( pTemp );
if ( pNtk == NULL ) if ( pNtk == NULL )
...@@ -219,7 +219,7 @@ Abc_NtkPrintStats( stdout, pNtk, 0 ); ...@@ -219,7 +219,7 @@ Abc_NtkPrintStats( stdout, pNtk, 0 );
} }
} }
// convert the netlist into the logic network // convert the netlist into the logic network
pNtk = Abc_NtkNetlistToLogic( pTemp = pNtk ); pNtk = Abc_NtkToLogic( pTemp = pNtk );
Abc_NtkDelete( pTemp ); Abc_NtkDelete( pTemp );
if ( pNtk == NULL ) if ( pNtk == NULL )
{ {
...@@ -244,7 +244,6 @@ Abc_Ntk_t * Io_ReadHie( char * pFileName, Io_FileType_t FileType, int fCheck ) ...@@ -244,7 +244,6 @@ Abc_Ntk_t * Io_ReadHie( char * pFileName, Io_FileType_t FileType, int fCheck )
{ {
Abc_Ntk_t * pNtk, * pTemp; Abc_Ntk_t * pNtk, * pTemp;
// detect the file type // detect the file type
if ( Io_ReadFileType(pFileName) == IO_FILE_BLIF ) if ( Io_ReadFileType(pFileName) == IO_FILE_BLIF )
pNtk = Io_ReadBlifMv( pFileName, 0, fCheck ); pNtk = Io_ReadBlifMv( pFileName, 0, fCheck );
// else if ( Io_ReadFileType(pFileName) == IO_FILE_BLIFMV ) // else if ( Io_ReadFileType(pFileName) == IO_FILE_BLIFMV )
...@@ -274,7 +273,7 @@ Abc_Ntk_t * Io_ReadHie( char * pFileName, Io_FileType_t FileType, int fCheck ) ...@@ -274,7 +273,7 @@ Abc_Ntk_t * Io_ReadHie( char * pFileName, Io_FileType_t FileType, int fCheck )
// convert blackboxes // convert blackboxes
if ( Abc_NtkBlackboxNum(pNtk) > 0 ) if ( Abc_NtkBlackboxNum(pNtk) > 0 )
{ {
printf( "Hierarchy reader converted %d blackboxes.\n", Abc_NtkBlackboxNum(pNtk) ); printf( "Hierarchy reader converted %d instances of blackboxes.\n", Abc_NtkBlackboxNum(pNtk) );
pNtk = Abc_NtkConvertBlackboxes( pTemp = pNtk ); pNtk = Abc_NtkConvertBlackboxes( pTemp = pNtk );
Abc_NtkDelete( pTemp ); Abc_NtkDelete( pTemp );
if ( pNtk == NULL ) if ( pNtk == NULL )
...@@ -284,7 +283,7 @@ Abc_Ntk_t * Io_ReadHie( char * pFileName, Io_FileType_t FileType, int fCheck ) ...@@ -284,7 +283,7 @@ Abc_Ntk_t * Io_ReadHie( char * pFileName, Io_FileType_t FileType, int fCheck )
} }
} }
// convert the netlist into the logic network // convert the netlist into the logic network
pNtk = Abc_NtkNetlistToLogic( pTemp = pNtk ); pNtk = Abc_NtkToLogic( pTemp = pNtk );
Abc_NtkDelete( pTemp ); Abc_NtkDelete( pTemp );
if ( pNtk == NULL ) if ( pNtk == NULL )
{ {
...@@ -350,6 +349,7 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType ) ...@@ -350,6 +349,7 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType )
Io_WriteGml( pNtk, pFileName ); Io_WriteGml( pNtk, pFileName );
return; return;
} }
// convert logic network into netlist // convert logic network into netlist
if ( FileType == IO_FILE_PLA ) if ( FileType == IO_FILE_PLA )
{ {
...@@ -359,13 +359,13 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType ) ...@@ -359,13 +359,13 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType )
return; return;
} }
if ( Abc_NtkIsComb(pNtk) ) if ( Abc_NtkIsComb(pNtk) )
pNtkTemp = Abc_NtkLogicToNetlist( pNtk, 1 ); pNtkTemp = Abc_NtkToNetlist( pNtk, 1 );
else else
{ {
fprintf( stdout, "Latches are writen into the PLA file at PI/PO pairs.\n" ); fprintf( stdout, "Latches are writen into the PLA file at PI/PO pairs.\n" );
pNtkCopy = Abc_NtkDup( pNtk ); pNtkCopy = Abc_NtkDup( pNtk );
Abc_NtkMakeComb( pNtkCopy ); Abc_NtkMakeComb( pNtkCopy );
pNtkTemp = Abc_NtkLogicToNetlist( pNtk, 1 ); pNtkTemp = Abc_NtkToNetlist( pNtk, 1 );
Abc_NtkDelete( pNtkCopy ); Abc_NtkDelete( pNtkCopy );
} }
} }
...@@ -376,31 +376,37 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType ) ...@@ -376,31 +376,37 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType )
fprintf( stdout, "Writing BENCH is available for AIGs.\n" ); fprintf( stdout, "Writing BENCH is available for AIGs.\n" );
return; return;
} }
pNtkTemp = Abc_NtkLogicToNetlistBench( pNtk ); pNtkTemp = Abc_NtkToNetlistBench( pNtk );
} }
else else
pNtkTemp = Abc_NtkLogicToNetlist( pNtk, 0 ); pNtkTemp = Abc_NtkToNetlist( pNtk, 0 );
if ( pNtkTemp == NULL ) if ( pNtkTemp == NULL )
{ {
fprintf( stdout, "Converting to netlist has failed.\n" ); fprintf( stdout, "Converting to netlist has failed.\n" );
return; return;
} }
if ( FileType == IO_FILE_BLIF ) if ( FileType == IO_FILE_BLIF )
{
if ( !Abc_NtkHasSop(pNtkTemp) && !Abc_NtkHasMapping(pNtkTemp) )
Abc_NtkToSop( pNtkTemp, 0 );
Io_WriteBlif( pNtkTemp, pFileName, 1 ); Io_WriteBlif( pNtkTemp, pFileName, 1 );
}
else if ( FileType == IO_FILE_BENCH ) else if ( FileType == IO_FILE_BENCH )
Io_WriteBench( pNtkTemp, pFileName ); Io_WriteBench( pNtkTemp, pFileName );
else if ( FileType == IO_FILE_PLA ) else if ( FileType == IO_FILE_PLA )
Io_WritePla( pNtkTemp, pFileName ); Io_WritePla( pNtkTemp, pFileName );
else if ( FileType == IO_FILE_EQN ) else if ( FileType == IO_FILE_EQN )
{ {
if ( Abc_NtkIsSopNetlist(pNtkTemp) ) if ( !Abc_NtkHasAig(pNtkTemp) )
Abc_NtkSopToAig( pNtkTemp ); Abc_NtkToAig( pNtkTemp );
Io_WriteEqn( pNtkTemp, pFileName ); Io_WriteEqn( pNtkTemp, pFileName );
} }
else if ( FileType == IO_FILE_VERILOG ) else if ( FileType == IO_FILE_VERILOG )
{ {
if ( Abc_NtkIsSopNetlist(pNtkTemp) ) if ( !Abc_NtkHasAig(pNtkTemp) && !Abc_NtkHasMapping(pNtkTemp) )
Abc_NtkSopToAig( pNtkTemp ); Abc_NtkToAig( pNtkTemp );
Io_WriteVerilog( pNtkTemp, pFileName ); Io_WriteVerilog( pNtkTemp, pFileName );
} }
else else
...@@ -451,25 +457,17 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName ) ...@@ -451,25 +457,17 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName )
// reintroduce the boxes into the netlist // reintroduce the boxes into the netlist
if ( Abc_NtkBlackboxNum(pNtkBase) > 0 ) if ( Abc_NtkBlackboxNum(pNtkBase) > 0 )
{ {
// bring the current network to the same representation
if ( Abc_NtkIsLogic(pNtk) )
{
if ( Abc_NtkIsSopNetlist(pNtkBase) )
Abc_NtkLogicToSop( pNtk, 0 );
else if ( Abc_NtkIsAigNetlist(pNtkBase) )
Abc_NtkLogicToAig( pNtk );
}
// derive the netlist // derive the netlist
pNtkResult = Abc_NtkLogicToNetlist( pNtk, 0 ); pNtkResult = Abc_NtkToNetlist( pNtk, 0 );
pNtkResult = Abc_NtkInsertNewLogic( pNtkBase, pNtkTemp = pNtkResult ); pNtkResult = Abc_NtkInsertNewLogic( pNtkBase, pNtkTemp = pNtkResult );
Abc_NtkDelete( pNtkTemp ); Abc_NtkDelete( pNtkTemp );
if ( pNtkResult ) if ( pNtkResult )
printf( "Hierarchy writer reintroduced %d blackboxes.\n", Abc_NtkBlackboxNum(pNtkBase) ); printf( "Hierarchy writer reintroduced %d instances of blackboxes.\n", Abc_NtkBlackboxNum(pNtkBase) );
} }
else else
{ {
printf( "Warning: The output network does not contain blackboxes.\n" ); printf( "Warning: The output network does not contain blackboxes.\n" );
pNtkResult = Abc_NtkLogicToNetlist( pNtk, 0 ); pNtkResult = Abc_NtkToNetlist( pNtk, 0 );
} }
Abc_NtkDelete( pNtkBase ); Abc_NtkDelete( pNtkBase );
if ( pNtkResult == NULL ) if ( pNtkResult == NULL )
...@@ -477,11 +475,15 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName ) ...@@ -477,11 +475,15 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName )
// write the resulting network // write the resulting network
if ( Io_ReadFileType(pFileName) == IO_FILE_BLIF ) if ( Io_ReadFileType(pFileName) == IO_FILE_BLIF )
{
if ( !Abc_NtkHasSop(pNtkResult) && !Abc_NtkHasMapping(pNtkResult) )
Abc_NtkToSop( pNtkResult, 0 );
Io_WriteBlif( pNtkResult, pFileName, 1 ); Io_WriteBlif( pNtkResult, pFileName, 1 );
}
else if ( Io_ReadFileType(pFileName) == IO_FILE_VERILOG ) else if ( Io_ReadFileType(pFileName) == IO_FILE_VERILOG )
{ {
if ( Abc_NtkIsSopNetlist(pNtkResult) ) if ( !Abc_NtkHasAig(pNtkResult) && !Abc_NtkHasMapping(pNtkResult) )
Abc_NtkSopToAig( pNtkResult ); Abc_NtkToAig( pNtkResult );
Io_WriteVerilog( pNtkResult, pFileName ); Io_WriteVerilog( pNtkResult, pFileName );
} }
else else
......
src/base/io/ioWriteBlif.c
...@@ -32,9 +32,9 @@ static void Io_NtkWritePis( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches ); ...@@ -32,9 +32,9 @@ static void Io_NtkWritePis( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
static void Io_NtkWritePos( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches ); static void Io_NtkWritePos( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
static void Io_NtkWriteSubckt( FILE * pFile, Abc_Obj_t * pNode ); static void Io_NtkWriteSubckt( FILE * pFile, Abc_Obj_t * pNode );
static void Io_NtkWriteAsserts( FILE * pFile, Abc_Ntk_t * pNtk ); static void Io_NtkWriteAsserts( FILE * pFile, Abc_Ntk_t * pNtk );
static void Io_NtkWriteNodeGate( FILE * pFile, Abc_Obj_t * pNode ); static void Io_NtkWriteNodeGate( FILE * pFile, Abc_Obj_t * pNode, int Length );
static void Io_NtkWriteNodeFanins( FILE * pFile, Abc_Obj_t * pNode ); static void Io_NtkWriteNodeFanins( FILE * pFile, Abc_Obj_t * pNode );
static void Io_NtkWriteNode( FILE * pFile, Abc_Obj_t * pNode ); static void Io_NtkWriteNode( FILE * pFile, Abc_Obj_t * pNode, int Length );
static void Io_NtkWriteLatch( FILE * pFile, Abc_Obj_t * pLatch ); static void Io_NtkWriteLatch( FILE * pFile, Abc_Obj_t * pLatch );
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
...@@ -56,7 +56,7 @@ void Io_WriteBlifLogic( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches ) ...@@ -56,7 +56,7 @@ void Io_WriteBlifLogic( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches )
{ {
Abc_Ntk_t * pNtkTemp; Abc_Ntk_t * pNtkTemp;
// derive the netlist // derive the netlist
pNtkTemp = Abc_NtkLogicToNetlist(pNtk,0); pNtkTemp = Abc_NtkToNetlist(pNtk,0);
if ( pNtkTemp == NULL ) if ( pNtkTemp == NULL )
{ {
fprintf( stdout, "Writing BLIF has failed.\n" ); fprintf( stdout, "Writing BLIF has failed.\n" );
...@@ -97,13 +97,22 @@ void Io_WriteBlif( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches ) ...@@ -97,13 +97,22 @@ void Io_WriteBlif( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches )
if ( Abc_NtkBlackboxNum(pNtk) > 0 ) if ( Abc_NtkBlackboxNum(pNtk) > 0 )
{ {
Abc_Ntk_t * pNtkTemp; Abc_Ntk_t * pNtkTemp;
Abc_Obj_t * pObj;
int i; int i;
/*
Abc_Obj_t * pObj;
Abc_NtkForEachBlackbox( pNtk, pObj, i ) Abc_NtkForEachBlackbox( pNtk, pObj, i )
{ {
pNtkTemp = pObj->pData; pNtkTemp = pObj->pData;
assert( pNtkTemp != NULL && Abc_NtkHasBlackbox(pNtkTemp) ); assert( pNtkTemp != NULL && Abc_NtkHasBlackbox(pNtkTemp) );
fprintf( pFile, "\n\n", Abc_NtkName(pNtk) ); fprintf( pFile, "\n\n" );
Io_NtkWrite( pFile, pNtkTemp, fWriteLatches );
}
*/
Vec_PtrForEachEntry( pNtk->pDesign->vModules, pNtkTemp, i )
{
if ( pNtkTemp == pNtk )
continue;
fprintf( pFile, "\n\n" );
Io_NtkWrite( pFile, pNtkTemp, fWriteLatches ); Io_NtkWrite( pFile, pNtkTemp, fWriteLatches );
} }
} }
...@@ -156,7 +165,7 @@ void Io_NtkWriteOne( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches ) ...@@ -156,7 +165,7 @@ void Io_NtkWriteOne( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches )
{ {
ProgressBar * pProgress; ProgressBar * pProgress;
Abc_Obj_t * pNode, * pLatch; Abc_Obj_t * pNode, * pLatch;
int i; int i, Length;
// write the PIs // write the PIs
fprintf( pFile, ".inputs" ); fprintf( pFile, ".inputs" );
...@@ -206,11 +215,12 @@ void Io_NtkWriteOne( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches ) ...@@ -206,11 +215,12 @@ void Io_NtkWriteOne( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches )
} }
// write each internal node // write each internal node
Length = Abc_NtkHasMapping(pNtk)? Mio_LibraryReadGateNameMax(pNtk->pManFunc) : 0;
pProgress = Extra_ProgressBarStart( stdout, Abc_NtkObjNumMax(pNtk) ); pProgress = Extra_ProgressBarStart( stdout, Abc_NtkObjNumMax(pNtk) );
Abc_NtkForEachNode( pNtk, pNode, i ) Abc_NtkForEachNode( pNtk, pNode, i )
{ {
Extra_ProgressBarUpdate( pProgress, i, NULL ); Extra_ProgressBarUpdate( pProgress, i, NULL );
Io_NtkWriteNode( pFile, pNode ); Io_NtkWriteNode( pFile, pNode, Length );
} }
Extra_ProgressBarStop( pProgress ); Extra_ProgressBarStop( pProgress );
} }
...@@ -454,13 +464,13 @@ void Io_NtkWriteLatch( FILE * pFile, Abc_Obj_t * pLatch ) ...@@ -454,13 +464,13 @@ void Io_NtkWriteLatch( FILE * pFile, Abc_Obj_t * pLatch )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
void Io_NtkWriteNode( FILE * pFile, Abc_Obj_t * pNode ) void Io_NtkWriteNode( FILE * pFile, Abc_Obj_t * pNode, int Length )
{ {
if ( Abc_NtkHasMapping(pNode->pNtk) ) if ( Abc_NtkHasMapping(pNode->pNtk) )
{ {
// write the .gate line // write the .gate line
fprintf( pFile, ".gate" ); fprintf( pFile, ".gate" );
Io_NtkWriteNodeGate( pFile, pNode ); Io_NtkWriteNodeGate( pFile, pNode, Length );
fprintf( pFile, "\n" ); fprintf( pFile, "\n" );
} }
else else
...@@ -485,17 +495,17 @@ void Io_NtkWriteNode( FILE * pFile, Abc_Obj_t * pNode ) ...@@ -485,17 +495,17 @@ void Io_NtkWriteNode( FILE * pFile, Abc_Obj_t * pNode )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
void Io_NtkWriteNodeGate( FILE * pFile, Abc_Obj_t * pNode ) void Io_NtkWriteNodeGate( FILE * pFile, Abc_Obj_t * pNode, int Length )
{ {
Mio_Gate_t * pGate = pNode->pData; Mio_Gate_t * pGate = pNode->pData;
Mio_Pin_t * pGatePin; Mio_Pin_t * pGatePin;
int i; int i;
// write the node // write the node
fprintf( pFile, " %s ", Mio_GateReadName(pGate) ); fprintf( pFile, " %-*s ", Length, Mio_GateReadName(pGate) );
for ( pGatePin = Mio_GateReadPins(pGate), i = 0; pGatePin; pGatePin = Mio_PinReadNext(pGatePin), i++ ) for ( pGatePin = Mio_GateReadPins(pGate), i = 0; pGatePin; pGatePin = Mio_PinReadNext(pGatePin), i++ )
fprintf( pFile, "%s=%s ", Mio_PinReadName(pGatePin), Abc_ObjName( Abc_ObjFanin(pNode,i) ) ); fprintf( pFile, "%s=%s ", Mio_PinReadName(pGatePin), Abc_ObjName( Abc_ObjFanin(pNode,i) ) );
assert ( i == Abc_ObjFaninNum(pNode) ); assert ( i == Abc_ObjFaninNum(pNode) );
fprintf( pFile, "%s=%s", Mio_GateReadOutName(pGate), Abc_ObjName(pNode) ); fprintf( pFile, "%s=%s", Mio_GateReadOutName(pGate), Abc_ObjName( Abc_ObjFanout0(pNode) ) );
} }
/**Function************************************************************* /**Function*************************************************************
......
src/base/io/ioWriteCnf.c
...@@ -66,7 +66,7 @@ int Io_WriteCnf( Abc_Ntk_t * pNtk, char * pFileName, int fAllPrimes ) ...@@ -66,7 +66,7 @@ int Io_WriteCnf( Abc_Ntk_t * pNtk, char * pFileName, int fAllPrimes )
} }
// convert to logic BDD network // convert to logic BDD network
if ( Abc_NtkIsLogic(pNtk) ) if ( Abc_NtkIsLogic(pNtk) )
Abc_NtkLogicToBdd( pNtk ); Abc_NtkToBdd( pNtk );
// create solver with clauses // create solver with clauses
pSat = Abc_NtkMiterSatCreate( pNtk, fAllPrimes ); pSat = Abc_NtkMiterSatCreate( pNtk, fAllPrimes );
if ( pSat == NULL ) if ( pSat == NULL )
......
src/base/ver/ver.h
...@@ -45,18 +45,18 @@ typedef struct Ver_Stream_t_ Ver_Stream_t; ...@@ -45,18 +45,18 @@ typedef struct Ver_Stream_t_ Ver_Stream_t;
struct Ver_Man_t_ struct Ver_Man_t_
{ {
// internal parameters
int fMapped; // mapped verilog
int fUseMemMan; // allocate memory manager in the networks
int fCheck; // checks network for currectness
// input file stream // input file stream
char * pFileName; char * pFileName;
Ver_Stream_t * pReader; Ver_Stream_t * pReader;
int fNameLast; int fNameLast;
ProgressBar * pProgress; ProgressBar * pProgress;
// current network and library // current design
Abc_Ntk_t * pNtkCur; // the network under construction Abc_Lib_t * pDesign;
Abc_Lib_t * pDesign; // the current design // error handling
// parameters
int fUseMemMan; // allocate memory manager in the networks
int fCheck; // checks network for currectness
// error recovery
FILE * Output; FILE * Output;
int fTopLevel; int fTopLevel;
int fError; int fError;
......
src/base/ver/verFormula.c
...@@ -72,8 +72,8 @@ static int Ver_FormulaParserFindVar( char * pString, Vec_Ptr_t * vNames ...@@ -72,8 +72,8 @@ static int Ver_FormulaParserFindVar( char * pString, Vec_Ptr_t * vNames
***********************************************************************/ ***********************************************************************/
void * Ver_FormulaParser( char * pFormula, void * pMan, Vec_Ptr_t * vNames, Vec_Ptr_t * vStackFn, Vec_Int_t * vStackOp, char * pErrorMessage ) void * Ver_FormulaParser( char * pFormula, void * pMan, Vec_Ptr_t * vNames, Vec_Ptr_t * vStackFn, Vec_Int_t * vStackOp, char * pErrorMessage )
{ {
Hop_Obj_t * bFunc, * bTemp;
char * pTemp; char * pTemp;
Hop_Obj_t * bFunc, * bTemp;
int nParans, Flag; int nParans, Flag;
int Oper, Oper1, Oper2; int Oper, Oper1, Oper2;
int v; int v;
......
src/base/ver/verParse.c
...@@ -100,7 +100,7 @@ char * Ver_ParseGetName( Ver_Man_t * pMan ) ...@@ -100,7 +100,7 @@ char * Ver_ParseGetName( Ver_Man_t * pMan )
{ {
pMan->fNameLast = 1; pMan->fNameLast = 1;
Ver_StreamPopChar( p ); Ver_StreamPopChar( p );
pWord = Ver_StreamGetWord( p, " " ); pWord = Ver_StreamGetWord( p, " \r\n" );
} }
else else
pWord = Ver_StreamGetWord( p, " \t\n\r(),;" ); pWord = Ver_StreamGetWord( p, " \t\n\r(),;" );
......
src/map/mio/mio.h
...@@ -98,6 +98,7 @@ extern float Mio_LibraryReadDelayAnd2Max( Mio_Library_t * pLib ); ...@@ -98,6 +98,7 @@ extern float Mio_LibraryReadDelayAnd2Max( Mio_Library_t * pLib );
extern float Mio_LibraryReadAreaInv ( Mio_Library_t * pLib ); extern float Mio_LibraryReadAreaInv ( Mio_Library_t * pLib );
extern float Mio_LibraryReadAreaBuf ( Mio_Library_t * pLib ); extern float Mio_LibraryReadAreaBuf ( Mio_Library_t * pLib );
extern float Mio_LibraryReadAreaNand2 ( Mio_Library_t * pLib ); extern float Mio_LibraryReadAreaNand2 ( Mio_Library_t * pLib );
extern int Mio_LibraryReadGateNameMax( Mio_Library_t * pLib );
extern char * Mio_GateReadName ( Mio_Gate_t * pGate ); extern char * Mio_GateReadName ( Mio_Gate_t * pGate );
extern char * Mio_GateReadOutName ( Mio_Gate_t * pGate ); extern char * Mio_GateReadOutName ( Mio_Gate_t * pGate );
extern double Mio_GateReadArea ( Mio_Gate_t * pGate ); extern double Mio_GateReadArea ( Mio_Gate_t * pGate );
...@@ -120,8 +121,8 @@ extern double Mio_PinReadDelayFanoutFall( Mio_Pin_t * pPin ); ...@@ -120,8 +121,8 @@ extern double Mio_PinReadDelayFanoutFall( Mio_Pin_t * pPin );
extern double Mio_PinReadDelayBlockMax ( Mio_Pin_t * pPin ); extern double Mio_PinReadDelayBlockMax ( Mio_Pin_t * pPin );
extern Mio_Pin_t * Mio_PinReadNext ( Mio_Pin_t * pPin ); extern Mio_Pin_t * Mio_PinReadNext ( Mio_Pin_t * pPin );
/*=== mioRead.c =============================================================*/ /*=== mioRead.c =============================================================*/
extern Mio_Library_t * Mio_LibraryRead( Abc_Frame_t * pAbc, char * FileName, char * ExcludeFile, int fVerbose ); extern Mio_Library_t * Mio_LibraryRead( void * pAbc, char * FileName, char * ExcludeFile, int fVerbose );
extern int Mio_LibraryReadExclude( Abc_Frame_t * pAbc, char * ExcludeFile, st_table * tExcludeGate ); extern int Mio_LibraryReadExclude( void * pAbc, char * ExcludeFile, st_table * tExcludeGate );
/*=== mioFunc.c =============================================================*/ /*=== mioFunc.c =============================================================*/
extern int Mio_LibraryParseFormulas( Mio_Library_t * pLib ); extern int Mio_LibraryParseFormulas( Mio_Library_t * pLib );
/*=== mioUtils.c =============================================================*/ /*=== mioUtils.c =============================================================*/
......
src/map/mio/mioApi.c
...@@ -60,6 +60,30 @@ float Mio_LibraryReadAreaNand2 ( Mio_Library_t * pLib ) { retur ...@@ -60,6 +60,30 @@ float Mio_LibraryReadAreaNand2 ( Mio_Library_t * pLib ) { retur
/**Function************************************************************* /**Function*************************************************************
Synopsis [Returns the longest gate name.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Mio_LibraryReadGateNameMax( Mio_Library_t * pLib )
{
Mio_Gate_t * pGate;
int LenMax = 0, LenCur;
Mio_LibraryForEachGate( pLib, pGate )
{
LenCur = strlen( Mio_GateReadName(pGate) );
if ( LenMax < LenCur )
LenMax = LenCur;
}
return LenMax;
}
/**Function*************************************************************
Synopsis [Read Mvc of the gate by name.] Synopsis [Read Mvc of the gate by name.]
Description [] Description []
......
src/opt/res/resCore.c
...@@ -197,7 +197,7 @@ int Abc_NtkResynthesize( Abc_Ntk_t * pNtk, Res_Par_t * pPars ) ...@@ -197,7 +197,7 @@ int Abc_NtkResynthesize( Abc_Ntk_t * pNtk, Res_Par_t * pPars )
Abc_NtkSweep( pNtk, 0 ); Abc_NtkSweep( pNtk, 0 );
// convert into the AIG // convert into the AIG
if ( !Abc_NtkLogicToAig(pNtk) ) if ( !Abc_NtkToAig(pNtk) )
{ {
fprintf( stdout, "Converting to BDD has failed.\n" ); fprintf( stdout, "Converting to BDD has failed.\n" );
Res_ManFree( p ); Res_ManFree( p );
......
src/opt/ret/retCore.c
...@@ -116,7 +116,7 @@ int Abc_NtkRetimeDebug( Abc_Ntk_t * pNtk ) ...@@ -116,7 +116,7 @@ int Abc_NtkRetimeDebug( Abc_Ntk_t * pNtk )
extern int Abc_NtkSecFraig( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int nSeconds, int nFrames, int fVerbose ); extern int Abc_NtkSecFraig( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int nSeconds, int nFrames, int fVerbose );
Abc_Ntk_t * pNtkRet; Abc_Ntk_t * pNtkRet;
assert( Abc_NtkIsLogic(pNtk) ); assert( Abc_NtkIsLogic(pNtk) );
Abc_NtkLogicToSop( pNtk, 0 ); Abc_NtkToSop( pNtk, 0 );
// if ( !Abc_NtkCheck( pNtk ) ) // if ( !Abc_NtkCheck( pNtk ) )
// fprintf( stdout, "Abc_NtkRetimeDebug(): Network check has failed.\n" ); // fprintf( stdout, "Abc_NtkRetimeDebug(): Network check has failed.\n" );
// Io_WriteBlifLogic( pNtk, "debug_temp.blif", 1 ); // Io_WriteBlifLogic( pNtk, "debug_temp.blif", 1 );
......
src/opt/ret/retInit.c
...@@ -50,7 +50,7 @@ Vec_Int_t * Abc_NtkRetimeInitialValues( Abc_Ntk_t * pNtkCone, Vec_Int_t * vValue ...@@ -50,7 +50,7 @@ Vec_Int_t * Abc_NtkRetimeInitialValues( Abc_Ntk_t * pNtkCone, Vec_Int_t * vValue
return Vec_IntDup( vValues ); return Vec_IntDup( vValues );
// convert the target network to AIG // convert the target network to AIG
pNtkLogic = Abc_NtkDup( pNtkCone ); pNtkLogic = Abc_NtkDup( pNtkCone );
Abc_NtkLogicToAig( pNtkLogic ); Abc_NtkToAig( pNtkLogic );
// get the miter // get the miter
pNtkMiter = Abc_NtkCreateTarget( pNtkLogic, pNtkLogic->vCos, vValues ); pNtkMiter = Abc_NtkCreateTarget( pNtkLogic, pNtkLogic->vCos, vValues );
if ( fVerbose ) if ( fVerbose )
......
src/sat/csat/csat_apis.c
...@@ -677,7 +677,7 @@ void ABC_Dump_Bench_File( ABC_Manager mng ) ...@@ -677,7 +677,7 @@ void ABC_Dump_Bench_File( ABC_Manager mng )
// derive the netlist // derive the netlist
pNtkAig = Abc_NtkStrash( mng->pNtk, 0, 0 ); pNtkAig = Abc_NtkStrash( mng->pNtk, 0, 0 );
pNtkTemp = Abc_NtkLogicToNetlistBench( pNtkAig ); pNtkTemp = Abc_NtkToNetlistBench( pNtkAig );
Abc_NtkDelete( pNtkAig ); Abc_NtkDelete( pNtkAig );
if ( pNtkTemp == NULL ) if ( pNtkTemp == NULL )
{ printf( "ABC_Dump_Bench_File: Dumping BENCH has failed.\n" ); return; } { printf( "ABC_Dump_Bench_File: Dumping BENCH has failed.\n" ); return; }
......
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