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abc
Commit d401cfa6 by Alan Mishchenko
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Version abc51005

parent 91ca630b
Showing with 918 additions and 74 deletions
Makefile
......@@ -21,7 +21,7 @@ OPTFLAGS := -DNDEBUG -O3
CFLAGS += -Wall -Wno-unused-function $(OPTFLAGS) $(patsubst %, -I%, $(MODULES))
CXXFLAGS += $(CFLAGS)
LIBS :=
LIBS := -ldl -rdynamic
SRC :=
GARBAGE := core core.* *.stackdump ./tags $(PROG)
......
abc.dsp
......@@ -262,6 +262,10 @@ SOURCE=.\src\base\abci\abcUnreach.c
# End Source File
# Begin Source File
SOURCE=.\src\base\abci\abcVanEijk.c
# End Source File
# Begin Source File
SOURCE=.\src\base\abci\abcVerify.c
# End Source File
# End Group
......@@ -1474,6 +1478,10 @@ SOURCE=.\src\misc\extra\extra.h
# End Source File
# Begin Source File
SOURCE=.\src\misc\extra\extraBddKmap.c
# End Source File
# Begin Source File
SOURCE=.\src\misc\extra\extraBddMisc.c
# End Source File
# Begin Source File
......
abc.opt
No preview for this file type
abc.plg
......@@ -6,13 +6,15 @@
--------------------Configuration: abc - Win32 Release--------------------
</h3>
<h3>Command Lines</h3>
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC8D.tmp" with contents
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1362.tmp" with contents
[
/nologo /ML /W3 /GX /O2 /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\pga" /I "src\map\mapper" /I "src\map\mapp" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D "HAVE_ASSERT_H" /FR"Release/" /Fp"Release/abc.pch" /YX /Fo"Release/" /Fd"Release/" /FD /c
"C:\_projects\abc\src\opt\cut\cutCut.c"
"C:\_projects\abc\src\base\abci\abcFraig.c"
"C:\_projects\abc\src\base\abci\abcVanEijk.c"
"C:\_projects\abc\src\sat\fraig\fraigApi.c"
]
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC8D.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC8E.tmp" with contents
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1362.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1363.tmp" with contents
[
kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /incremental:no /pdb:"Release/abc.pdb" /machine:I386 /out:"_TEST/abc.exe"
.\Release\abcAig.obj
......@@ -54,7 +56,10 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32
.\Release\abcSymm.obj
.\Release\abcTiming.obj
.\Release\abcUnreach.obj
.\Release\abcVanEijk.obj
.\Release\abcVerify.obj
.\Release\abcFpgaDelay.obj
.\Release\abcFpgaSeq.obj
.\Release\abcRetCore.obj
.\Release\abcRetDelay.obj
.\Release\abcRetImpl.obj
......@@ -221,6 +226,7 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32
.\Release\cutMan.obj
.\Release\cutMerge.obj
.\Release\cutNode.obj
.\Release\cutOracle.obj
.\Release\cutSeq.obj
.\Release\cutTruth.obj
.\Release\decAbc.obj
......@@ -281,6 +287,7 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32
.\Release\pgaMan.obj
.\Release\pgaMatch.obj
.\Release\pgaUtil.obj
.\Release\extraBddKmap.obj
.\Release\extraBddMisc.obj
.\Release\extraBddSymm.obj
.\Release\extraUtilBitMatrix.obj
......@@ -320,16 +327,15 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32
.\Release\npnGenStr.obj
.\Release\npnTruth.obj
.\Release\npnUtil.obj
.\Release\abcFpgaSeq.obj
.\Release\abcFpgaDelay.obj
.\Release\cutOracle.obj
]
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC8E.tmp"
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1363.tmp"
<h3>Output Window</h3>
Compiling...
cutCut.c
abcFraig.c
abcVanEijk.c
fraigApi.c
Linking...
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC90.tmp" with contents
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1365.tmp" with contents
[
/nologo /o"Release/abc.bsc"
.\Release\abcAig.sbr
......@@ -371,7 +377,10 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC90.tmp" with conte
.\Release\abcSymm.sbr
.\Release\abcTiming.sbr
.\Release\abcUnreach.sbr
.\Release\abcVanEijk.sbr
.\Release\abcVerify.sbr
.\Release\abcFpgaDelay.sbr
.\Release\abcFpgaSeq.sbr
.\Release\abcRetCore.sbr
.\Release\abcRetDelay.sbr
.\Release\abcRetImpl.sbr
......@@ -538,6 +547,7 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC90.tmp" with conte
.\Release\cutMan.sbr
.\Release\cutMerge.sbr
.\Release\cutNode.sbr
.\Release\cutOracle.sbr
.\Release\cutSeq.sbr
.\Release\cutTruth.sbr
.\Release\decAbc.sbr
......@@ -598,6 +608,7 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC90.tmp" with conte
.\Release\pgaMan.sbr
.\Release\pgaMatch.sbr
.\Release\pgaUtil.sbr
.\Release\extraBddKmap.sbr
.\Release\extraBddMisc.sbr
.\Release\extraBddSymm.sbr
.\Release\extraUtilBitMatrix.sbr
......@@ -636,11 +647,8 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC90.tmp" with conte
.\Release\npn.sbr
.\Release\npnGenStr.sbr
.\Release\npnTruth.sbr
.\Release\npnUtil.sbr
.\Release\abcFpgaSeq.sbr
.\Release\abcFpgaDelay.sbr
.\Release\cutOracle.sbr]
Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPC90.tmp"
.\Release\npnUtil.sbr]
Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1365.tmp"
Creating browse info file...
<h3>Output Window</h3>
......
abc.rc
......@@ -28,6 +28,7 @@ alias pf print_factor
alias pfan print_fanio
alias pl print_level
alias pio print_io
alias pk print_kmap
alias ps print_stats
alias psu print_supp
alias psy print_symm
......@@ -49,6 +50,7 @@ alias sa set autoexec ps
alias so source -x
alias st strash
alias sw sweep
alias ssw seq_sweep
alias u undo
alias wb write_blif
alias wl write_blif
......
src/base/abc/abc.h
......@@ -419,12 +419,13 @@ extern Abc_Obj_t * Abc_AigXor( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_
extern Abc_Obj_t * Abc_AigMiter( Abc_Aig_t * pMan, Vec_Ptr_t * vPairs );
extern void Abc_AigReplace( Abc_Aig_t * pMan, Abc_Obj_t * pOld, Abc_Obj_t * pNew, bool fUpdateLevel );
extern void Abc_AigDeleteNode( Abc_Aig_t * pMan, Abc_Obj_t * pOld );
extern void Abc_AigRehash( Abc_Aig_t * pMan );
extern bool Abc_AigNodeHasComplFanoutEdge( Abc_Obj_t * pNode );
extern bool Abc_AigNodeHasComplFanoutEdgeTrav( Abc_Obj_t * pNode );
extern void Abc_AigPrintNode( Abc_Obj_t * pNode );
extern bool Abc_AigNodeIsAcyclic( Abc_Obj_t * pNode, Abc_Obj_t * pRoot );
extern void Abc_AigCheckFaninOrder( Abc_Aig_t * pMan );
extern void Abc_AigRehash( Abc_Aig_t * pMan );
extern void Abc_AigSetNodePhases( Abc_Ntk_t * pNtk );
/*=== abcAttach.c ==========================================================*/
extern int Abc_NtkAttach( Abc_Ntk_t * pNtk );
/*=== abcBalance.c ==========================================================*/
......@@ -462,8 +463,8 @@ extern void Abc_ObjPatchFanin( Abc_Obj_t * pObj, Abc_Obj_t * pFani
extern void Abc_ObjTransferFanout( Abc_Obj_t * pObjOld, Abc_Obj_t * pObjNew );
extern void Abc_ObjReplace( Abc_Obj_t * pObjOld, Abc_Obj_t * pObjNew );
/*=== abcFraig.c ==========================================================*/
extern Abc_Ntk_t * Abc_NtkFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes );
extern void * Abc_NtkToFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes );
extern Abc_Ntk_t * Abc_NtkFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes, int fExdc );
extern void * Abc_NtkToFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes, int fExdc );
extern Abc_Ntk_t * Abc_NtkFraigTrust( Abc_Ntk_t * pNtk );
extern int Abc_NtkFraigStore( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkFraigRestore();
......@@ -557,9 +558,10 @@ extern void Abc_NtkFinalizeLatches( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkStartRead( char * pName );
extern void Abc_NtkFinalizeRead( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkDup( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkSplitOutput( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, int fUseAllCis );
extern Abc_Ntk_t * Abc_NtkCreateOutput( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, int fUseAllCis );
extern Abc_Ntk_t * Abc_NtkCreateCone( Abc_Ntk_t * pNtk, Vec_Ptr_t * vRoots, Vec_Int_t * vValues );
extern Abc_Ntk_t * Abc_NtkSplitNode( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode );
extern Abc_Ntk_t * Abc_NtkCreateFromNode( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode );
extern Abc_Ntk_t * Abc_NtkCreateWithNode( char * pSop );
extern void Abc_NtkDelete( Abc_Ntk_t * pNtk );
extern void Abc_NtkFixNonDrivenNets( Abc_Ntk_t * pNtk );
/*=== abcPrint.c ==========================================================*/
......@@ -625,12 +627,13 @@ extern bool Abc_SopIsOrType( char * pSop );
extern bool Abc_SopCheck( char * pSop, int nFanins );
extern void Abc_SopWriteCnf( FILE * pFile, char * pClauses, Vec_Int_t * vVars );
extern void Abc_SopAddCnfToSolver( solver * pSat, char * pClauses, Vec_Int_t * vVars, Vec_Int_t * vTemp );
extern char * Abc_SopFromTruthBin( char * pTruth );
extern char * Abc_SopFromTruthHex( char * pTruth );
/*=== abcStrash.c ==========================================================*/
extern Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool fCleanup );
extern Abc_Obj_t * Abc_NodeStrash( Abc_Aig_t * pMan, Abc_Obj_t * pNode );
extern int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2 );
/*=== abcSweep.c ==========================================================*/
extern bool Abc_NtkFraigSweep( Abc_Ntk_t * pNtk, int fUseInv, int fVerbose );
extern int Abc_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose );
extern int Abc_NtkSweep( Abc_Ntk_t * pNtk, int fVerbose );
/*=== abcTiming.c ==========================================================*/
......@@ -666,6 +669,7 @@ extern int Abc_NtkGetExorNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetChoiceNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetFaninMax( Abc_Ntk_t * pNtk );
extern void Abc_NtkCleanCopy( Abc_Ntk_t * pNtk );
extern void Abc_NtkCleanNext( Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_NodeHasUniqueCoFanout( Abc_Obj_t * pNode );
extern bool Abc_NtkLogicHasSimpleCos( Abc_Ntk_t * pNtk );
extern int Abc_NtkLogicMakeSimpleCos( Abc_Ntk_t * pNtk, bool fDuplicate );
......
src/base/abc/abcAig.c
......@@ -1236,6 +1236,35 @@ void Abc_AigCheckFaninOrder( Abc_Aig_t * pMan )
}
}
/**Function*************************************************************
Synopsis [Sets the correct phase of the nodes.]
Description [The AIG nodes should be in the DFS order.]
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_AigSetNodePhases( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
int i;
assert( Abc_NtkIsDfsOrdered(pNtk) );
Abc_AigConst1(pNtk->pManFunc)->fPhase = 1;
// Abc_NtkForEachCi( pNtk, pObj, i )
// pObj->fPhase = 0;
Abc_NtkForEachPi( pNtk, pObj, i )
pObj->fPhase = 0;
Abc_NtkForEachLatch( pNtk, pObj, i )
pObj->fPhase = Abc_LatchIsInit1(pObj);
Abc_AigForEachAnd( pNtk, pObj, i )
pObj->fPhase = (Abc_ObjFanin0(pObj)->fPhase ^ Abc_ObjFaninC0(pObj)) & (Abc_ObjFanin1(pObj)->fPhase ^ Abc_ObjFaninC1(pObj));
Abc_NtkForEachPo( pNtk, pObj, i )
pObj->fPhase = (Abc_ObjFanin0(pObj)->fPhase ^ Abc_ObjFaninC0(pObj));
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/base/abc/abcDfs.c
......@@ -229,6 +229,8 @@ bool Abc_NtkIsDfsOrdered( Abc_Ntk_t * pNtk )
// go through the nodes
Abc_NtkForEachNode( pNtk, pNode, i )
{
if ( Abc_ObjFaninNum(pNode) == 0 )
continue;
if ( !Abc_NodeIsTravIdCurrent(Abc_ObjFanin0(pNode)) )
return 0;
if ( !Abc_NodeIsTravIdCurrent(Abc_ObjFanin1(pNode)) )
......
src/base/abc/abcNetlist.c
......@@ -162,13 +162,16 @@ Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk )
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_NETLIST, ABC_FUNC_SOP );
else
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_NETLIST, ABC_FUNC_BDD );
// create the CI nets and remember them in the new CI nodes
Abc_NtkForEachCi( pNtk, pObj, i )
{
pNet = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pObj) );
Abc_ObjAddFanin( pNet, pObj->pCopy );
pObj->pCopy->pCopy = pNet;
//printf( "%s ", Abc_ObjName(pObj) );
}
//printf( "\n" );
// duplicate all nodes
Abc_NtkForEachNode( pNtk, pObj, i )
Abc_NtkDupObj(pNtkNew, pObj);
......
src/base/abc/abcNtk.c
......@@ -318,7 +318,7 @@ Abc_Ntk_t * Abc_NtkDup( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkSplitOutput( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, int fUseAllCis )
Abc_Ntk_t * Abc_NtkCreateOutput( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, int fUseAllCis )
{
Vec_Ptr_t * vNodes;
Abc_Ntk_t * pNtkNew;
......@@ -373,13 +373,13 @@ Abc_Ntk_t * Abc_NtkSplitOutput( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, int fUseAll
Abc_NtkLogicStoreName( pNode->pCopy, Abc_ObjName(pNode) );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkSplitOutput(): Network check has failed.\n" );
fprintf( stdout, "Abc_NtkCreateOutput(): Network check has failed.\n" );
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Creates the network composed of one output.]
Synopsis [Creates the miter composed of one multi-output cone.]
Description []
......@@ -439,7 +439,7 @@ Abc_Ntk_t * Abc_NtkCreateCone( Abc_Ntk_t * pNtk, Vec_Ptr_t * vRoots, Vec_Int_t *
/**Function*************************************************************
Synopsis [Deletes the Ntk.]
Synopsis [Creates the network composed of one node.]
Description []
......@@ -448,7 +448,7 @@ Abc_Ntk_t * Abc_NtkCreateCone( Abc_Ntk_t * pNtk, Vec_Ptr_t * vRoots, Vec_Int_t *
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkSplitNode( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode )
Abc_Ntk_t * Abc_NtkCreateFromNode( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pFanin, * pNodePo;
......@@ -471,7 +471,48 @@ Abc_Ntk_t * Abc_NtkSplitNode( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode )
Abc_ObjAddFanin( pNodePo, pNode->pCopy );
Abc_NtkLogicStoreName( pNodePo, Abc_ObjName(pNode) );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkSplitNode(): Network check has failed.\n" );
fprintf( stdout, "Abc_NtkCreateFromNode(): Network check has failed.\n" );
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Creates the network composed of one node with the given SOP.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkCreateWithNode( char * pSop )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pFanin, * pNode, * pNodePo;
Vec_Ptr_t * vNames;
int i, nVars;
// start the network
pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP );
pNtkNew->pName = util_strsav("ex");
// create PIs
Vec_PtrPush( pNtkNew->vObjs, NULL );
nVars = Abc_SopGetVarNum( pSop );
vNames = Abc_NodeGetFakeNames( nVars );
for ( i = 0; i < nVars; i++ )
Abc_NtkLogicStoreName( Abc_NtkCreatePi(pNtkNew), Vec_PtrEntry(vNames, i) );
Abc_NodeFreeNames( vNames );
// create the node, add PIs as fanins, set the function
pNode = Abc_NtkCreateNode( pNtkNew );
Abc_NtkForEachPi( pNtkNew, pFanin, i )
Abc_ObjAddFanin( pNode, pFanin );
pNode->pData = Abc_SopRegister( pNtkNew->pManFunc, pSop );
// create the only PO
pNodePo = Abc_NtkCreatePo(pNtkNew);
Abc_ObjAddFanin( pNodePo, pNode );
Abc_NtkLogicStoreName( pNodePo, "F" );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkCreateWithNode(): Network check has failed.\n" );
return pNtkNew;
}
......
src/base/abc/abcShow.c
......@@ -105,6 +105,7 @@ void Abc_NtkShowAig( Abc_Ntk_t * pNtk )
fprintf( stdout, "Cannot open the intermediate file \"%s\".\n", FileNameDot );
return;
}
fclose( pFile );
// collect all nodes in the network
vNodes = Vec_PtrAlloc( 100 );
......@@ -149,6 +150,7 @@ void Abc_NtkShowMulti( Abc_Ntk_t * pNtk )
fprintf( stdout, "Cannot open the intermediate file \"%s\".\n", FileNameDot );
return;
}
fclose( pFile );
// get the implication supergates
Abc_NtkBalanceAttach( pNtk );
......
src/base/abc/abcSop.c
......@@ -731,6 +731,132 @@ void Abc_SopAddCnfToSolver( solver * pSat, char * pClauses, Vec_Int_t * vVars, V
}
/**Function*************************************************************
Synopsis [Derives SOP from the truth table representation.]
Description [Truth table is expected to be in the hexadecimal notation.]
SideEffects []
SeeAlso []
***********************************************************************/
char * Abc_SopFromTruthBin( char * pTruth )
{
char * pSopCover, * pCube;
int nTruthSize, nVars, Digit, Length, Mint, i, b;
Vec_Int_t * vMints;
// get the number of variables
nTruthSize = strlen(pTruth);
nVars = Extra_Base2Log( nTruthSize );
if ( nTruthSize != (1 << (nVars)) )
{
printf( "String %s does not look like a truth table of a %d-variable function.\n", pTruth, nVars );
return NULL;
}
// collect the on-set minterms
vMints = Vec_IntAlloc( 100 );
for ( i = 0; i < nTruthSize; i++ )
{
if ( pTruth[i] >= '0' && pTruth[i] <= '1' )
Digit = pTruth[i] - '0';
else
{
printf( "String %s does not look like a binary representation of the truth table.\n", pTruth );
return NULL;
}
if ( Digit == 1 )
Vec_IntPush( vMints, nTruthSize - 1 - i );
}
// create the SOP representation of the minterms
Length = Vec_IntSize(vMints) * (nVars + 3);
pSopCover = ALLOC( char, Length + 1 );
pSopCover[Length] = 0;
Vec_IntForEachEntry( vMints, Mint, i )
{
pCube = pSopCover + i * (nVars + 3);
for ( b = 0; b < nVars; b++ )
if ( Mint & (1 << b) )
pCube[b] = '1';
else
pCube[b] = '0';
pCube[nVars + 0] = ' ';
pCube[nVars + 1] = '1';
pCube[nVars + 2] = '\n';
}
Vec_IntFree( vMints );
return pSopCover;
}
/**Function*************************************************************
Synopsis [Derives SOP from the truth table representation.]
Description [Truth table is expected to be in the hexadecimal notation.]
SideEffects []
SeeAlso []
***********************************************************************/
char * Abc_SopFromTruthHex( char * pTruth )
{
char * pSopCover, * pCube;
int nTruthSize, nVars, Digit, Length, Mint, i, b;
Vec_Int_t * vMints;
// get the number of variables
nTruthSize = strlen(pTruth);
nVars = Extra_Base2Log( nTruthSize ) + 2;
if ( nTruthSize != (1 << (nVars-2)) )
{
printf( "String %s does not look like a truth table of a %d-variable function.\n", pTruth, nVars );
return NULL;
}
// collect the on-set minterms
vMints = Vec_IntAlloc( 100 );
for ( i = 0; i < nTruthSize; i++ )
{
if ( pTruth[i] >= '0' && pTruth[i] <= '9' )
Digit = pTruth[i] - '0';
else if ( pTruth[i] >= 'a' && pTruth[i] <= 'f' )
Digit = 10 + pTruth[i] - 'a';
else if ( pTruth[i] >= 'A' && pTruth[i] <= 'F' )
Digit = 10 + pTruth[i] - 'A';
else
{
printf( "String %s does not look like a hexadecimal representation of the truth table.\n", pTruth );
return NULL;
}
for ( b = 0; b < 4; b++ )
if ( Digit & (1 << b) )
Vec_IntPush( vMints, 4*(nTruthSize-1-i)+b );
}
// create the SOP representation of the minterms
Length = Vec_IntSize(vMints) * (nVars + 3);
pSopCover = ALLOC( char, Length + 1 );
pSopCover[Length] = 0;
Vec_IntForEachEntry( vMints, Mint, i )
{
pCube = pSopCover + i * (nVars + 3);
for ( b = 0; b < nVars; b++ )
if ( Mint & (1 << b) )
pCube[b] = '1';
else
pCube[b] = '0';
pCube[nVars + 0] = ' ';
pCube[nVars + 1] = '1';
pCube[nVars + 2] = '\n';
}
Vec_IntFree( vMints );
return pSopCover;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
......
src/base/abc/abcUtil.c
......@@ -305,15 +305,32 @@ int Abc_NtkGetFaninMax( Abc_Ntk_t * pNtk )
void Abc_NtkCleanCopy( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
int i;
i = 0;
// set the data filed to NULL
int i = 0;
Abc_NtkForEachObj( pNtk, pObj, i )
pObj->pCopy = NULL;
}
/**Function*************************************************************
Synopsis [Cleans the copy field of all objects.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkCleanNext( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
int i = 0;
Abc_NtkForEachObj( pNtk, pObj, i )
pObj->pNext = NULL;
}
/**Function*************************************************************
Synopsis [Checks if the internal node has a unique CO.]
Description [Checks if the internal node can borrow a name from a CO
......
src/base/abci/abcBalance.c
......@@ -52,6 +52,8 @@ Abc_Ntk_t * Abc_NtkBalance( Abc_Ntk_t * pNtk, bool fDuplicate )
pNtkAig = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
Abc_NtkBalancePerform( pNtk, pNtkAig, fDuplicate );
Abc_NtkFinalize( pNtk, pNtkAig );
if ( pNtk->pExdc )
pNtkAig->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure everything is okay
if ( !Abc_NtkCheck( pNtkAig ) )
{
......
src/base/abci/abcCollapse.c
......@@ -69,6 +69,9 @@ Abc_Ntk_t * Abc_NtkCollapse( Abc_Ntk_t * pNtk, int fVerbose )
// make the network minimum base
Abc_NtkMinimumBase( pNtkNew );
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
......
src/base/abci/abcDsd.c
......@@ -76,6 +76,9 @@ Abc_Ntk_t * Abc_NtkDsdGlobal( Abc_Ntk_t * pNtk, bool fVerbose, bool fPrint, bool
Extra_StopManager( pNtk->pManGlob );
pNtk->pManGlob = NULL;
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
......
src/base/abci/abcFpga.c
......@@ -88,6 +88,9 @@ Abc_Ntk_t * Abc_NtkFpga( Abc_Ntk_t * pNtk, int fRecovery, int fSwitching, int fV
// make the network minimum base
Abc_NtkMinimumBase( pNtkNew );
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
......
src/base/abci/abcMap.c
......@@ -113,6 +113,9 @@ clk = clock();
return NULL;
Map_ManFree( pMan );
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
......
src/base/abci/abcMiter.c
......@@ -31,6 +31,10 @@ static void Abc_NtkMiterAddCone( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkMiter,
static void Abc_NtkMiterFinalize( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, Abc_Ntk_t * pNtkMiter, int fComb );
static void Abc_NtkAddFrame( Abc_Ntk_t * pNetNew, Abc_Ntk_t * pNet, int iFrame, Vec_Ptr_t * vNodes );
// to be exported
typedef void (*AddFrameMapping)( Abc_Obj_t*, Abc_Obj_t*, int, void*);
extern Abc_Ntk_t * Abc_NtkFrames2( Abc_Ntk_t * pNtk, int nFrames, int fInitial, AddFrameMapping addFrameMapping, void* arg );
static void Abc_NtkAddFrame2( Abc_Ntk_t * pNtkFrames, Abc_Ntk_t * pNtk, int iFrame, Vec_Ptr_t * vNodes, AddFrameMapping addFrameMapping, void* arg );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFITIONS ///
......@@ -598,6 +602,178 @@ void Abc_NtkAddFrame( Abc_Ntk_t * pNtkFrames, Abc_Ntk_t * pNtk, int iFrame, Vec_
}
/**Function*************************************************************
Synopsis [Derives the timeframes of the network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkFrames2( Abc_Ntk_t * pNtk, int nFrames, int fInitial, AddFrameMapping addFrameMapping, void* arg )
{
char Buffer[100];
ProgressBar * pProgress;
Abc_Ntk_t * pNtkFrames;
Vec_Ptr_t * vNodes;
Abc_Obj_t * pLatch, * pLatchNew;
int i, Counter;
assert( nFrames > 0 );
assert( Abc_NtkIsStrash(pNtk) );
// start the new network
pNtkFrames = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG );
sprintf( Buffer, "%s_%d_frames", pNtk->pName, nFrames );
pNtkFrames->pName = util_strsav(Buffer);
// create new latches (or their initial values) and remember them in the new latches
if ( !fInitial )
{
Abc_NtkForEachLatch( pNtk, pLatch, i ) {
Abc_NtkDupObj( pNtkFrames, pLatch );
if (addFrameMapping) addFrameMapping(pLatch->pCopy, pLatch, 0, arg);
}
}
else
{
Counter = 0;
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
if ( Abc_LatchIsInitDc(pLatch) ) // don't-care initial value - create a new PI
{
pLatch->pCopy = Abc_NtkCreatePi(pNtkFrames);
Abc_NtkLogicStoreName( pLatch->pCopy, Abc_ObjName(pLatch) );
Counter++;
}
else {
pLatch->pCopy = Abc_ObjNotCond( Abc_AigConst1(pNtkFrames->pManFunc), Abc_LatchIsInit0(pLatch) );
}
if (addFrameMapping) addFrameMapping(pLatch->pCopy, pLatch, 0, arg);
}
if ( Counter )
printf( "Warning: %d uninitialized latches are replaced by free PI variables.\n", Counter );
}
// create the timeframes
vNodes = Abc_NtkDfs( pNtk, 0 );
pProgress = Extra_ProgressBarStart( stdout, nFrames );
for ( i = 0; i < nFrames; i++ )
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
Abc_NtkAddFrame2( pNtkFrames, pNtk, i, vNodes, addFrameMapping, arg );
}
Extra_ProgressBarStop( pProgress );
Vec_PtrFree( vNodes );
// connect the new latches to the outputs of the last frame
if ( !fInitial )
{
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
pLatchNew = Abc_NtkLatch(pNtkFrames, i);
Abc_ObjAddFanin( pLatchNew, pLatch->pCopy );
Vec_PtrPush( pNtkFrames->vCis, pLatchNew );
Vec_PtrPush( pNtkFrames->vCos, pLatchNew );
Abc_NtkLogicStoreName( pLatchNew, Abc_ObjName(pLatch) );
}
}
Abc_NtkForEachLatch( pNtk, pLatch, i )
pLatch->pNext = NULL;
// remove dangling nodes
Abc_AigCleanup( pNtkFrames->pManFunc );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtkFrames ) )
{
printf( "Abc_NtkFrames: The network check has failed.\n" );
Abc_NtkDelete( pNtkFrames );
return NULL;
}
return pNtkFrames;
}
/**Function*************************************************************
Synopsis [Adds one time frame to the new network.]
Description [Assumes that the latches of the old network point
to the outputs of the previous frame of the new network (pLatch->pCopy).
In the end, updates the latches of the old network to point to the
outputs of the current frame of the new network.]
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkAddFrame2( Abc_Ntk_t * pNtkFrames, Abc_Ntk_t * pNtk, int iFrame, Vec_Ptr_t * vNodes, AddFrameMapping addFrameMapping, void* arg )
{
char Buffer[10];
Abc_Obj_t * pNode, * pNodeNew, * pLatch;
Abc_Obj_t * pConst1, * pConst1New;
int i;
// get the constant nodes
pConst1 = Abc_AigConst1( pNtk->pManFunc );
pConst1New = Abc_AigConst1( pNtkFrames->pManFunc );
// create the prefix to be added to the node names
sprintf( Buffer, "_%02d", iFrame );
// add the new PI nodes
Abc_NtkForEachPi( pNtk, pNode, i )
{
pNodeNew = Abc_NtkDupObj( pNtkFrames, pNode );
Abc_NtkLogicStoreNamePlus( pNodeNew, Abc_ObjName(pNode), Buffer );
if (addFrameMapping) addFrameMapping(pNodeNew, pNode, iFrame, arg);
}
// add the internal nodes
Vec_PtrForEachEntry( vNodes, pNode, i )
{
if ( pNode == pConst1 )
pNodeNew = pConst1New;
else
pNodeNew = Abc_AigAnd( pNtkFrames->pManFunc, Abc_ObjChild0Copy(pNode), Abc_ObjChild1Copy(pNode) );
pNode->pCopy = pNodeNew;
if (addFrameMapping) addFrameMapping(pNodeNew, pNode, iFrame, arg);
}
// add the new POs
Abc_NtkForEachPo( pNtk, pNode, i )
{
pNodeNew = Abc_NtkDupObj( pNtkFrames, pNode );
Abc_ObjAddFanin( pNodeNew, Abc_ObjChild0Copy(pNode) );
Abc_NtkLogicStoreNamePlus( pNodeNew, Abc_ObjName(pNode), Buffer );
if (addFrameMapping) addFrameMapping(pNodeNew, pNode, iFrame, arg);
}
// transfer the implementation of the latch drivers to the latches
// it is important that these two steps are performed it two loops
// and not in the same loop
Abc_NtkForEachLatch( pNtk, pLatch, i )
pLatch->pNext = Abc_ObjChild0Copy(pLatch);
Abc_NtkForEachLatch( pNtk, pLatch, i )
pLatch->pCopy = pLatch->pNext;
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
if (addFrameMapping) {
// don't give Mike complemented pointers because he doesn't like it
if (Abc_ObjIsComplement(pLatch->pCopy)) {
pNodeNew = Abc_NtkCreateNode( pNtkFrames );
Abc_ObjAddFanin( pNodeNew, pLatch->pCopy );
assert(Abc_ObjFaninNum(pNodeNew) == 1);
pNodeNew->Level = 1 + Abc_ObjRegular(pLatch->pCopy)->Level;
pLatch->pNext = pNodeNew;
pLatch->pCopy = pNodeNew;
}
addFrameMapping(pLatch->pCopy, pLatch, iFrame+1, arg);
}
}
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/base/abci/abcNtbdd.c
......@@ -394,6 +394,159 @@ void Abc_NtkFreeGlobalBdds( Abc_Ntk_t * pNtk )
pNtk->vFuncsGlob = NULL;
}
/**Function*************************************************************
Synopsis [Computes the BDD of the logic cone of the node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
double Abc_NtkSpacePercentage( Abc_Obj_t * pNode )
{
Vec_Ptr_t * vNodes;
Abc_Obj_t * pObj, * pNodeR;
DdManager * dd;
DdNode * bFunc;
double Result;
int i;
pNodeR = Abc_ObjRegular(pNode);
assert( Abc_NtkIsStrash(pNodeR->pNtk) );
Abc_NtkCleanCopy( pNodeR->pNtk );
// get the CIs in the support of the node
vNodes = Abc_NtkNodeSupport( pNodeR->pNtk, &pNodeR, 1 );
// start the manager
dd = Cudd_Init( Vec_PtrSize(vNodes), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
Cudd_AutodynEnable( dd, CUDD_REORDER_SYMM_SIFT );
// assign elementary BDDs for the CIs
Vec_PtrForEachEntry( vNodes, pObj, i )
pObj->pCopy = (Abc_Obj_t *)dd->vars[i];
// build the BDD of the cone
bFunc = Abc_NodeGlobalBdds_rec( dd, pNodeR ); Cudd_Ref( bFunc );
bFunc = Cudd_NotCond( bFunc, pNode != pNodeR );
// count minterms
Result = Cudd_CountMinterm( dd, bFunc, dd->size );
// get the percentagle
Result *= 100.0;
for ( i = 0; i < dd->size; i++ )
Result /= 2;
// clean up
Cudd_Quit( dd );
Vec_PtrFree( vNodes );
return Result;
}
#include "reo.h"
/**Function*************************************************************
Synopsis [Reorders BDD of the local function of the node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NodeBddReorder( reo_man * p, Abc_Obj_t * pNode )
{
Abc_Obj_t * pFanin;
DdNode * bFunc;
int * pOrder, i;
// create the temporary array for the variable order
pOrder = ALLOC( int, Abc_ObjFaninNum(pNode) );
for ( i = 0; i < Abc_ObjFaninNum(pNode); i++ )
pOrder[i] = -1;
// reorder the BDD
bFunc = Extra_Reorder( p, pNode->pNtk->pManFunc, pNode->pData, pOrder ); Cudd_Ref( bFunc );
Cudd_RecursiveDeref( pNode->pNtk->pManFunc, pNode->pData );
pNode->pData = bFunc;
// update the fanin order
Abc_ObjForEachFanin( pNode, pFanin, i )
pOrder[i] = pNode->vFanins.pArray[ pOrder[i] ].iFan;
Abc_ObjForEachFanin( pNode, pFanin, i )
pNode->vFanins.pArray[i].iFan = pOrder[i];
free( pOrder );
}
/**Function*************************************************************
Synopsis [Reorders BDDs of the local functions.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkBddReorder( Abc_Ntk_t * pNtk, int fVerbose )
{
reo_man * p;
Abc_Obj_t * pNode;
int i;
p = Extra_ReorderInit( Abc_NtkGetFaninMax(pNtk), 100 );
Abc_NtkForEachNode( pNtk, pNode, i )
{
if ( Abc_ObjFaninNum(pNode) < 3 )
continue;
if ( fVerbose )
fprintf( stdout, "%10s: ", Abc_ObjName(pNode) );
if ( fVerbose )
fprintf( stdout, "Before = %5d BDD nodes. ", Cudd_DagSize(pNode->pData) );
Abc_NodeBddReorder( p, pNode );
if ( fVerbose )
fprintf( stdout, "After = %5d BDD nodes.\n", Cudd_DagSize(pNode->pData) );
}
Extra_ReorderQuit( p );
}
/**Function*************************************************************
Synopsis [Experiment with BDD-based representation of implications.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkBddImplicationTest()
{
DdManager * dd;
DdNode * bImp, * bSum, * bTemp;
int nVars = 200;
int nImps = 200;
int i, clk;
clk = clock();
dd = Cudd_Init( nVars, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
Cudd_AutodynEnable( dd, CUDD_REORDER_SIFT );
bSum = b0; Cudd_Ref( bSum );
for ( i = 0; i < nImps; i++ )
{
printf( "." );
bImp = Cudd_bddAnd( dd, dd->vars[rand()%nVars], dd->vars[rand()%nVars] ); Cudd_Ref( bImp );
bSum = Cudd_bddOr( dd, bTemp = bSum, bImp ); Cudd_Ref( bSum );
Cudd_RecursiveDeref( dd, bTemp );
Cudd_RecursiveDeref( dd, bImp );
}
printf( "The BDD before = %d.\n", Cudd_DagSize(bSum) );
Cudd_ReduceHeap( dd, CUDD_REORDER_SIFT, 1 );
printf( "The BDD after = %d.\n", Cudd_DagSize(bSum) );
PRT( "Time", clock() - clk );
Cudd_RecursiveDeref( dd, bSum );
Cudd_Quit( dd );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/base/abci/abcPga.c
......@@ -75,6 +75,9 @@ Abc_Ntk_t * Abc_NtkPga( Pga_Params_t * pParams )
// make the network minimum base
Abc_NtkMinimumBase( pNtkNew );
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
......
src/base/abci/abcPrint.c
......@@ -499,6 +499,33 @@ void Abc_NodePrintLevel( FILE * pFile, Abc_Obj_t * pNode )
fprintf( pFile, "\n" );
}
/**Function*************************************************************
Synopsis [Prints the factored form of one node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NodePrintKMap( Abc_Obj_t * pNode, int fUseRealNames )
{
Vec_Ptr_t * vNamesIn;
if ( fUseRealNames )
{
vNamesIn = Abc_NodeGetFaninNames(pNode);
Extra_PrintKMap( stdout, pNode->pNtk->pManFunc, pNode->pData, Cudd_Not(pNode->pData),
Abc_ObjFaninNum(pNode), NULL, 0, (char **)vNamesIn->pArray );
Abc_NodeFreeNames( vNamesIn );
}
else
Extra_PrintKMap( stdout, pNode->pNtk->pManFunc, pNode->pData, Cudd_Not(pNode->pData),
Abc_ObjFaninNum(pNode), NULL, 0, NULL );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/base/abci/abcRenode.c
......@@ -91,6 +91,8 @@ Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nThresh, int nFaninMax, int fCn
}
//printf( "Maximum fanin = %d.\n", Abc_NtkGetFaninMax(pNtkNew) );
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
......
src/base/abci/abcStrash.c
......@@ -71,7 +71,7 @@ Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool fCleanup )
printf( "Cleanup has removed %d nodes.\n", nNodes );
// duplicate EXDC
if ( pNtk->pExdc )
pNtkAig->pExdc = Abc_NtkStrash( pNtk->pExdc, 0, 1 );
pNtkAig->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure everything is okay
if ( !Abc_NtkCheck( pNtkAig ) )
{
......
src/base/abci/abcSweep.c
......@@ -25,10 +25,11 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static stmm_table * Abc_NtkFraigEquiv( Fraig_Man_t * p, Abc_Ntk_t * pNtk, int fUseInv, bool fVerbose );
static void Abc_NtkFraigSweepUsingExdc( Fraig_Man_t * pMan, Abc_Ntk_t * pNtk );
static stmm_table * Abc_NtkFraigEquiv( Abc_Ntk_t * pNtk, int fUseInv, bool fVerbose );
static void Abc_NtkFraigTransform( Abc_Ntk_t * pNtk, stmm_table * tEquiv, int fUseInv, bool fVerbose );
static void Abc_NtkFraigMergeClassMapped( Abc_Ntk_t * pNtk, Abc_Obj_t * pChain, int fVerbose, int fUseInv );
static void Abc_NtkFraigMergeClass( Abc_Ntk_t * pNtk, Abc_Obj_t * pChain, int fVerbose, int fUseInv );
static void Abc_NtkFraigMergeClassMapped( Abc_Ntk_t * pNtk, Abc_Obj_t * pChain, int fUseInv, int fVerbose );
static void Abc_NtkFraigMergeClass( Abc_Ntk_t * pNtk, Abc_Obj_t * pChain, int fUseInv, int fVerbose );
static int Abc_NodeDroppingCost( Abc_Obj_t * pNode );
static void Abc_NodeSweep( Abc_Obj_t * pNode, int fVerbose );
......@@ -52,7 +53,7 @@ static void Abc_NodeComplementInput( Abc_Obj_t * pNode, Abc_Obj_t * pF
SeeAlso []
***********************************************************************/
bool Abc_NtkFraigSweep( Abc_Ntk_t * pNtk, int fUseInv, int fVerbose )
bool Abc_NtkFraigSweep( Abc_Ntk_t * pNtk, int fUseInv, int fExdc, int fVerbose )
{
Fraig_Params_t Params;
Abc_Ntk_t * pNtkAig;
......@@ -63,11 +64,24 @@ bool Abc_NtkFraigSweep( Abc_Ntk_t * pNtk, int fUseInv, int fVerbose )
// derive the AIG
pNtkAig = Abc_NtkStrash( pNtk, 0, 1 );
// perform fraiging of the AIG
Fraig_ParamsSetDefault( &Params );
pMan = Abc_NtkToFraig( pNtkAig, &Params, 0 );
pMan = Abc_NtkToFraig( pNtkAig, &Params, 0, 0 );
// cannot use EXDC with FRAIG because it can create classes of equivalent FRAIG nodes
// with representative nodes that do not correspond to the nodes with the current network
// update FRAIG using EXDC
if ( fExdc )
{
if ( pNtk->pExdc == NULL )
printf( "Warning: Networks has no EXDC.\n" );
else
Abc_NtkFraigSweepUsingExdc( pMan, pNtk );
}
// collect the classes of equivalent nets
tEquiv = Abc_NtkFraigEquiv( pMan, pNtk, fUseInv, fVerbose );
tEquiv = Abc_NtkFraigEquiv( pNtk, fUseInv, fVerbose );
// transform the network into the equivalent one
Abc_NtkFraigTransform( pNtk, tEquiv, fUseInv, fVerbose );
......@@ -90,6 +104,47 @@ bool Abc_NtkFraigSweep( Abc_Ntk_t * pNtk, int fUseInv, int fVerbose )
/**Function*************************************************************
Synopsis [Sweep the network using EXDC.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkFraigSweepUsingExdc( Fraig_Man_t * pMan, Abc_Ntk_t * pNtk )
{
Fraig_Node_t * gNodeExdc, * gNode, * gNodeRes;
Abc_Obj_t * pNode, * pNodeAig;
int i;
extern Fraig_Node_t * Abc_NtkToFraigExdc( Fraig_Man_t * pMan, Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkExdc );
assert( pNtk->pExdc );
// derive FRAIG node representing don't-cares in the EXDC network
gNodeExdc = Abc_NtkToFraigExdc( pMan, pNtk, pNtk->pExdc );
// update the node pointers
Abc_NtkForEachNode( pNtk, pNode, i )
{
// skip the constant input nodes
if ( Abc_ObjFaninNum(pNode) == 0 )
continue;
// get the strashed node
pNodeAig = pNode->pCopy;
// skip the dangling nodes
if ( pNodeAig == NULL )
continue;
// get the FRAIG node
gNode = Fraig_NotCond( Abc_ObjRegular(pNodeAig)->pCopy, Abc_ObjIsComplement(pNodeAig) );
// perform ANDing with EXDC
gNodeRes = Fraig_NodeAnd( pMan, gNode, Fraig_Not(gNodeExdc) );
// write the node back
Abc_ObjRegular(pNodeAig)->pCopy = (Abc_Obj_t *)Fraig_NotCond( gNodeRes, Abc_ObjIsComplement(pNodeAig) );
}
}
/**Function*************************************************************
Synopsis [Collects equivalence classses of node in the network.]
Description []
......@@ -99,7 +154,7 @@ bool Abc_NtkFraigSweep( Abc_Ntk_t * pNtk, int fUseInv, int fVerbose )
SeeAlso []
***********************************************************************/
stmm_table * Abc_NtkFraigEquiv( Fraig_Man_t * p, Abc_Ntk_t * pNtk, int fUseInv, bool fVerbose )
stmm_table * Abc_NtkFraigEquiv( Abc_Ntk_t * pNtk, int fUseInv, bool fVerbose )
{
Abc_Obj_t * pList, * pNode, * pNodeAig;
Fraig_Node_t * gNode;
......@@ -113,14 +168,14 @@ stmm_table * Abc_NtkFraigEquiv( Fraig_Man_t * p, Abc_Ntk_t * pNtk, int fUseInv,
tStrash2Net = stmm_init_table(stmm_ptrcmp,stmm_ptrhash);
Abc_NtkForEachNode( pNtk, pNode, c )
{
// skip the constant input nodes
if ( Abc_ObjFaninNum(pNode) == 0 )
continue;
// get the strashed node
pNodeAig = pNode->pCopy;
// skip the dangling nodes
if ( pNodeAig == NULL )
continue;
// skip the constant input nodes
if ( Abc_ObjFaninNum(pNode) == 0 )
continue;
// skip the nodes that fanout into POs
if ( Abc_NodeHasUniqueCoFanout(pNode) )
continue;
......
src/base/abci/abcUnreach.c
......@@ -87,6 +87,8 @@ int Abc_NtkExtractSequentialDcs( Abc_Ntk_t * pNtk, bool fVerbose )
// allocate ZDD variables
Cudd_zddVarsFromBddVars( dd, 2 );
// create the EXDC network representing the unreachable states
if ( pNtk->pExdc )
Abc_NtkDelete( pNtk->pExdc );
pNtk->pExdc = Abc_NtkConstructExdc( dd, pNtk, bUnreach );
Cudd_RecursiveDeref( dd, bUnreach );
Extra_StopManager( dd );
......@@ -283,9 +285,13 @@ Abc_Ntk_t * Abc_NtkConstructExdc( DdManager * dd, Abc_Ntk_t * pNtk, DdNode * bUn
// start the new network
pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_BDD );
pNtkNew->pName = util_strsav("exdc");
pNtkNew->pSpec = NULL;
// create PIs corresponding to LOs
Abc_NtkForEachLatch( pNtk, pNode, i )
pNode->pCopy = Abc_NtkCreatePi(pNtkNew);
Abc_NtkLogicStoreName( pNode->pCopy = Abc_NtkCreatePi(pNtkNew), Abc_ObjName(pNode) );
// cannot ADD POs here because pLatch->pCopy point to the PIs
// create a new node
pNodeNew = Abc_NtkCreateNode(pNtkNew);
......@@ -304,21 +310,22 @@ Abc_Ntk_t * Abc_NtkConstructExdc( DdManager * dd, Abc_Ntk_t * pNtk, DdNode * bUn
free( pPermute );
Abc_NodeMinimumBase( pNodeNew );
// make the new node drive all the COs
Abc_NtkForEachCo( pNtk, pNode, i )
Abc_ObjAddFanin( Abc_NtkCreatePo(pNtkNew), pNodeNew );
// store the PI names of the EXDC network
// for each CO, create PO (skip POs equal to CIs because of name conflict)
Abc_NtkForEachPo( pNtk, pNode, i )
if ( !Abc_ObjIsCi(Abc_ObjFanin0(pNode)) )
Abc_NtkLogicStoreName( pNode->pCopy = Abc_NtkCreatePo(pNtkNew), Abc_ObjName(pNode) );
Abc_NtkForEachLatch( pNtk, pNode, i )
Abc_NtkLogicStoreName( Abc_NtkPi(pNtkNew,i), Abc_ObjName(pNode) );
// store the PO names of the EXDC network
Abc_NtkLogicStoreName( pNode->pCopy = Abc_NtkCreatePo(pNtkNew), Abc_ObjNameSuffix(pNode, "_in") );
// link to the POs of the network
Abc_NtkForEachPo( pNtk, pNode, i )
Abc_NtkLogicStoreName( Abc_NtkPo(pNtkNew,i), Abc_ObjName(pNode) );
if ( !Abc_ObjIsCi(Abc_ObjFanin0(pNode)) )
Abc_ObjAddFanin( pNode->pCopy, pNodeNew );
Abc_NtkForEachLatch( pNtk, pNode, i )
Abc_NtkLogicStoreName( Abc_NtkCo(pNtkNew,Abc_NtkPoNum(pNtk) + i), Abc_ObjNameSuffix(pNode, "_in") );
Abc_ObjAddFanin( pNode->pCopy, pNodeNew );
// make the network minimum base
Abc_NtkMinimumBase( pNtkNew );
// remove the extra nodes
Abc_AigCleanup( pNtkNew->pManFunc );
// fix the problem with complemented and duplicated CO edges
Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
......
src/base/abci/abcVerify.c
......@@ -60,12 +60,12 @@ void Abc_NtkCecSat( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int nSeconds )
RetValue = Abc_NtkMiterIsConstant( pMiter );
if ( RetValue == 0 )
{
Abc_NtkDelete( pMiter );
printf( "Networks are NOT EQUIVALENT after structural hashing.\n" );
// report the error
pMiter->pModel = Abc_NtkVerifyGetCleanModel( pMiter );
Abc_NtkVerifyReportError( pNtk1, pNtk2, pMiter->pModel );
FREE( pMiter->pModel );
Abc_NtkDelete( pMiter );
return;
}
if ( RetValue == 1 )
......@@ -127,18 +127,18 @@ void Abc_NtkCecFraig( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int nSeconds, int fV
RetValue = Abc_NtkMiterIsConstant( pMiter );
if ( RetValue == 0 )
{
Abc_NtkDelete( pMiter );
printf( "Networks are NOT EQUIVALENT after structural hashing.\n" );
// report the error
pMiter->pModel = Abc_NtkVerifyGetCleanModel( pMiter );
Abc_NtkVerifyReportError( pNtk1, pNtk2, pMiter->pModel );
FREE( pMiter->pModel );
Abc_NtkDelete( pMiter );
return;
}
if ( RetValue == 1 )
{
Abc_NtkDelete( pMiter );
printf( "Networks are equivalent after structural hashing.\n" );
Abc_NtkDelete( pMiter );
return;
}
......@@ -146,7 +146,7 @@ void Abc_NtkCecFraig( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int nSeconds, int fV
Fraig_ParamsSetDefault( &Params );
Params.fVerbose = fVerbose;
Params.nSeconds = nSeconds;
pMan = Abc_NtkToFraig( pMiter, &Params, 0 );
pMan = Abc_NtkToFraig( pMiter, &Params, 0, 0 );
Fraig_ManProveMiter( pMan );
// analyze the result
......@@ -315,7 +315,7 @@ void Abc_NtkSecFraig( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int nSeconds, int nF
Fraig_ParamsSetDefault( &Params );
Params.fVerbose = fVerbose;
Params.nSeconds = nSeconds;
pMan = Abc_NtkToFraig( pFrames, &Params, 0 );
pMan = Abc_NtkToFraig( pFrames, &Params, 0, 0 );
Fraig_ManProveMiter( pMan );
// analyze the result
......
src/base/abci/module.make
......@@ -22,4 +22,5 @@ SRC += src/base/abci/abc.c \
src/base/abci/abcSymm.c \
src/base/abci/abcTiming.c \
src/base/abci/abcUnreach.c \
src/base/abci/abcVanEijk.c \
src/base/abci/abcVerify.c
src/base/abcs/module.make
SRC += src/base/abcs/abcRetCore.c \
SRC += src/base/abcs/abcFpgaDelay.c \
src/base/abcs/abcFpgaSeq.c \
src/base/abcs/abcRetCore.c \
src/base/abcs/abcRetDelay.c \
src/base/abcs/abcRetImpl.c \
src/base/abcs/abcRetUtil.c \
......
src/base/io/io.c
......@@ -32,6 +32,7 @@ static int IoCommandReadEdif ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandReadEqn ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandReadVerilog ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandReadPla ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandReadTruth ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandWriteBlif ( Abc_Frame_t * pAbc, int argc, char **argv );
static int IoCommandWriteBench ( Abc_Frame_t * pAbc, int argc, char **argv );
......@@ -65,6 +66,7 @@ void Io_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "I/O", "read_eqn", IoCommandReadEqn, 1 );
Cmd_CommandAdd( pAbc, "I/O", "read_verilog", IoCommandReadVerilog, 1 );
Cmd_CommandAdd( pAbc, "I/O", "read_pla", IoCommandReadPla, 1 );
Cmd_CommandAdd( pAbc, "I/O", "read_truth", IoCommandReadTruth, 1 );
Cmd_CommandAdd( pAbc, "I/O", "write_blif", IoCommandWriteBlif, 0 );
Cmd_CommandAdd( pAbc, "I/O", "write_bench", IoCommandWriteBench, 0 );
......@@ -643,6 +645,76 @@ usage:
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int IoCommandReadTruth( Abc_Frame_t * pAbc, int argc, char ** argv )
{
Abc_Ntk_t * pNtk;
char * pSopCover;
int fHex;
int c;
fHex = 0;
util_getopt_reset();
while ( ( c = util_getopt( argc, argv, "xh" ) ) != EOF )
{
switch ( c )
{
case 'x':
fHex ^= 1;
break;
case 'h':
goto usage;
default:
goto usage;
}
}
if ( argc != util_optind + 1 )
{
goto usage;
}
// convert truth table to SOP
if ( fHex )
pSopCover = Abc_SopFromTruthHex(argv[util_optind]);
else
pSopCover = Abc_SopFromTruthBin(argv[util_optind]);
if ( pSopCover == NULL )
{
fprintf( pAbc->Err, "Reading truth table has failed.\n" );
return 1;
}
pNtk = Abc_NtkCreateWithNode( pSopCover );
free( pSopCover );
if ( pNtk == NULL )
{
fprintf( pAbc->Err, "Deriving the network has failed.\n" );
return 1;
}
// replace the current network
Abc_FrameReplaceCurrentNetwork( pAbc, pNtk );
return 0;
usage:
fprintf( pAbc->Err, "usage: read_truth [-xh] <truth>\n" );
fprintf( pAbc->Err, "\t creates network with node having given truth table\n" );
fprintf( pAbc->Err, "\t-x : toggles between bin and hex representation [default = %s]\n", fHex? "hex":"bin" );
fprintf( pAbc->Err, "\t-h : prints the command summary\n" );
fprintf( pAbc->Err, "\ttruth : truth table with most signficant bit first (e.g. 1000 for AND(a,b))\n" );
return 1;
}
/**Function*************************************************************
......
src/base/io/ioWriteCnf.c
......@@ -60,7 +60,7 @@ int Io_WriteCnf( Abc_Ntk_t * pNtk, char * pFileName )
// create solver with clauses
pSat = Abc_NtkMiterSatCreate( pNtk );
// write the clauses
Asat_SolverWriteDimacs( pSat, pFileName );
Asat_SolverWriteDimacs( pSat, pFileName, 0, 0, 1 );
// free the solver
solver_delete( pSat );
return 1;
......
src/misc/extra/extra.h
......@@ -106,7 +106,7 @@ typedef unsigned long long uint64;
/* Various Utilities */
/*===========================================================================*/
/*=== extraUtilBdd.c ========================================================*/
/*=== extraBddMisc.c ========================================================*/
extern DdNode * Extra_TransferPermute( DdManager * ddSource, DdManager * ddDestination, DdNode * f, int * Permute );
extern DdNode * Extra_TransferLevelByLevel( DdManager * ddSource, DdManager * ddDestination, DdNode * f );
extern DdNode * Extra_bddRemapUp( DdManager * dd, DdNode * bF );
......@@ -125,6 +125,14 @@ extern int * Extra_VectorSupportArray( DdManager * dd, DdNode ** F, int n
extern DdNode * Extra_bddFindOneCube( DdManager * dd, DdNode * bF );
extern DdNode * Extra_bddGetOneCube( DdManager * dd, DdNode * bFunc );
extern DdNode * Extra_bddComputeRangeCube( DdManager * dd, int iStart, int iStop );
extern DdNode * Extra_bddBitsToCube( DdManager * dd, int Code, int CodeWidth, DdNode ** pbVars, int fMsbFirst );
/*=== extraBddKmap.c ================================================================*/
/* displays the Karnaugh Map of a function */
extern void Extra_PrintKMap( FILE * pFile, DdManager * dd, DdNode * OnSet, DdNode * OffSet, int nVars, DdNode ** XVars, int fSuppType, char ** pVarNames );
/* displays the Karnaugh Map of a relation */
extern void Extra_PrintKMapRelation( FILE * pFile, DdManager * dd, DdNode * OnSet, DdNode * OffSet, int nXVars, int nYVars, DdNode ** XVars, DdNode ** YVars );
/*=== extraBddSymm.c =================================================================*/
......
src/misc/extra/extraBddMisc.c
......@@ -14,7 +14,7 @@
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: extraBddMisc.c,v 1.0 2003/09/01 00:00:00 alanmi Exp $]
Revision [$Id: extraBddMisc.c,v 1.4 2005/10/04 00:19:54 alanmi Exp $]
***********************************************************************/
......@@ -684,6 +684,41 @@ DdNode * Extra_bddComputeRangeCube( DdManager * dd, int iStart, int iStop )
return bProd;
}
/**Function********************************************************************
Synopsis [Computes the cube of BDD variables corresponding to bits it the bit-code]
Description [Returns a bdd composed of elementary bdds found in array BddVars[] such
that the bdd vars encode the number Value of bit length CodeWidth (if fMsbFirst is 1,
the most significant bit is encoded with the first bdd variable). If the variables
BddVars are not specified, takes the first CodeWidth variables of the manager]
SideEffects []
SeeAlso []
******************************************************************************/
DdNode * Extra_bddBitsToCube( DdManager * dd, int Code, int CodeWidth, DdNode ** pbVars, int fMsbFirst )
{
int z;
DdNode * bTemp, * bVar, * bVarBdd, * bResult;
bResult = b1; Cudd_Ref( bResult );
for ( z = 0; z < CodeWidth; z++ )
{
bVarBdd = (pbVars)? pbVars[z]: dd->vars[z];
if ( fMsbFirst )
bVar = Cudd_NotCond( bVarBdd, (Code & (1 << (CodeWidth-1-z)))==0 );
else
bVar = Cudd_NotCond( bVarBdd, (Code & (1 << (z)))==0 );
bResult = Cudd_bddAnd( dd, bTemp = bResult, bVar ); Cudd_Ref( bResult );
Cudd_RecursiveDeref( dd, bTemp );
}
Cudd_Deref( bResult );
return bResult;
} /* end of Extra_bddBitsToCube */
/*---------------------------------------------------------------------------*/
/* Definition of internal functions */
/*---------------------------------------------------------------------------*/
......
src/misc/extra/module.make
SRC += src/misc/extra/extraBddMisc.c \
SRC += src/misc/extra/extraBddKmap.c \
src/misc/extra/extraBddMisc.c \
src/misc/extra/extraBddSymm.c \
src/misc/extra/extraUtilBitMatrix.c \
src/misc/extra/extraUtilCanon.c \
......
src/opt/cut/module.make
......@@ -3,5 +3,6 @@ SRC += src/opt/cut/cutApi.c \
src/opt/cut/cutMan.c \
src/opt/cut/cutMerge.c \
src/opt/cut/cutNode.c \
src/opt/cut/cutOracle.c \
src/opt/cut/cutSeq.c \
src/opt/cut/cutTruth.c
src/opt/sim/simSupp.c
......@@ -470,7 +470,7 @@ void Sim_SolveTargetsUsingSat( Sim_Man_t * p, int Limit )
Params.nSeconds = ABC_INFINITY;
Params.fInternal = 1;
clk = clock();
pMan = Abc_NtkToFraig( pMiter, &Params, 0 );
pMan = Abc_NtkToFraig( pMiter, &Params, 0, 0 );
p->timeFraig += clock() - clk;
clk = clock();
Fraig_ManProveMiter( pMan );
......
src/opt/sim/simSymSat.c
......@@ -147,7 +147,7 @@ int Sim_SymmsSatProveOne( Sym_Man_t * p, int Out, int Var1, int Var2, unsigned *
Params.nSeconds = ABC_INFINITY;
clk = clock();
pMan = Abc_NtkToFraig( pMiter, &Params, 0 );
pMan = Abc_NtkToFraig( pMiter, &Params, 0, 0 );
p->timeFraig += clock() - clk;
clk = clock();
Fraig_ManProveMiter( pMan );
......
src/sat/asat/added.c
......@@ -14,7 +14,7 @@
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: added.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
Revision [$Id: added.c,v 1.4 2005/09/16 22:55:03 casem Exp $]
***********************************************************************/
......@@ -57,7 +57,7 @@ static void Asat_ClauseWriteDimacs( FILE * pFile, clause * pC, bool fIncrement )
SeeAlso []
***********************************************************************/
void Asat_SolverWriteDimacs( solver * p, char * pFileName )
void Asat_SolverWriteDimacs( solver * p, char * pFileName, lit* assumptionsBegin, lit* assumptionsEnd, int incrementVars )
{
FILE * pFile;
void ** pClauses;
......@@ -78,18 +78,31 @@ void Asat_SolverWriteDimacs( solver * p, char * pFileName )
nClauses = p->clauses.size;
pClauses = p->clauses.ptr;
for ( i = 0; i < nClauses; i++ )
Asat_ClauseWriteDimacs( pFile, pClauses[i], 1 );
Asat_ClauseWriteDimacs( pFile, pClauses[i], incrementVars );
// write the learned clauses
nClauses = p->learnts.size;
pClauses = p->learnts.ptr;
for ( i = 0; i < nClauses; i++ )
Asat_ClauseWriteDimacs( pFile, pClauses[i], 1 );
Asat_ClauseWriteDimacs( pFile, pClauses[i], incrementVars );
// write zero-level assertions
for ( i = 0; i < p->size; i++ )
if ( p->levels[i] == 0 && p->assigns[i] != l_Undef )
fprintf( pFile, "%s%d 0\n", (p->assigns[i] == l_False)? "-": "", i + 1 );
fprintf( pFile, "%s%d%s\n",
(p->assigns[i] == l_False)? "-": "",
i + (int)(incrementVars>0),
(incrementVars) ? " 0" : "");
// write the assumptions
if (assumptionsBegin) {
for (; assumptionsBegin != assumptionsEnd; assumptionsBegin++) {
fprintf( pFile, "%s%d%s\n",
lit_sign(*assumptionsBegin)? "-": "",
lit_var(*assumptionsBegin) + (int)(incrementVars>0),
(incrementVars) ? " 0" : "");
}
}
fprintf( pFile, "\n" );
fclose( pFile );
......
src/sat/asat/solver.c
......@@ -1099,7 +1099,7 @@ bool solver_solve(solver* s, lit* begin, lit* end, int nSeconds)
nof_conflicts *= 1.5;
nof_learnts *= 1.1;
// if the runtime limit is exceeded, quit the restart loop
if ( clock() - timeStart >= nSeconds * CLOCKS_PER_SEC )
if ( (nSeconds >= 0) && (clock() - timeStart >= nSeconds * CLOCKS_PER_SEC) )
break;
}
if (s->verbosity >= 1)
......
src/sat/asat/solver.h
......@@ -73,7 +73,9 @@ extern int solver_nvars(solver* s);
extern int solver_nclauses(solver* s);
// additional procedures
extern void Asat_SolverWriteDimacs( solver * pSat, char * pFileName );
extern void Asat_SolverWriteDimacs( solver * pSat, char * pFileName,
lit* assumptionsBegin, lit* assumptionsEnd,
int incrementVars);
struct stats_t
{
......
src/sat/csat/csat_apis.c
......@@ -542,7 +542,7 @@ enum CSAT_StatusT CSAT_Solve( CSAT_Manager mng )
else if ( mng->mode == 1 ) // resource-aware fraiging
{
// transform the target into a fraig
pMan = Abc_NtkToFraig( mng->pTarget, &mng->Params, 0 );
pMan = Abc_NtkToFraig( mng->pTarget, &mng->Params, 0, 0 );
Fraig_ManProveMiter( pMan );
RetValue = Fraig_ManCheckMiter( pMan );
......
src/sat/fraig/fraig.h
......@@ -149,6 +149,7 @@ extern void Fraig_NodeSetChoice( Fraig_Man_t * pMan, Fraig_Node_t
/*=== fraigMan.c =============================================================*/
extern void Fraig_ParamsSetDefault( Fraig_Params_t * pParams );
extern void Fraig_ParamsSetDefaultFull( Fraig_Params_t * pParams );
extern Fraig_Man_t * Fraig_ManCreate( Fraig_Params_t * pParams );
extern void Fraig_ManFree( Fraig_Man_t * pMan );
extern void Fraig_ManPrintStats( Fraig_Man_t * p );
......
src/sat/fraig/fraigMan.c
......@@ -60,6 +60,35 @@ void Fraig_ParamsSetDefault( Fraig_Params_t * pParams )
/**Function*************************************************************
Synopsis [Sets the default parameters of the package.]
Description [This set of parameters is tuned for complete FRAIGing.]
SideEffects []
SeeAlso []
***********************************************************************/
void Fraig_ParamsSetDefaultFull( Fraig_Params_t * pParams )
{
memset( pParams, 0, sizeof(Fraig_Params_t) );
pParams->nPatsRand = FRAIG_PATTERNS_RANDOM; // the number of words of random simulation info
pParams->nPatsDyna = FRAIG_PATTERNS_DYNAMIC; // the number of words of dynamic simulation info
pParams->nBTLimit = -1; // the max number of backtracks to perform
pParams->nSeconds = 20; // the max number of seconds to solve the miter
pParams->fFuncRed = 1; // performs only one level hashing
pParams->fFeedBack = 1; // enables solver feedback
pParams->fDist1Pats = 1; // enables distance-1 patterns
pParams->fDoSparse = 1; // performs equiv tests for sparse functions
pParams->fChoicing = 0; // enables recording structural choices
pParams->fTryProve = 0; // tries to solve the final miter
pParams->fVerbose = 0; // the verbosiness flag
pParams->fVerboseP = 0; // the verbose flag for reporting the proof
pParams->fInternal = 0; // the flag indicates the internal run
}
/**Function*************************************************************
Synopsis [Creates the new FRAIG manager.]
Description []
......
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