Commit d1b6413d by Alan Mishchenko

Fix index of delay tables created by %blast.

parent f5320744
......@@ -1301,7 +1301,7 @@ Gia_Man_t * Wlc_NtkBitBlast( Wlc_Ntk_t * p, Wlc_BstPar_t * pParIn )
// create new box
if ( vTables == NULL )
Tim_ManSetDelayTables( pManTime, (vTables = Vec_PtrAlloc(100)) );
Tim_ManCreateBox( pManTime, curPo, nRange0 + nRange1 + nRange2, curPi, nRange, 1+Vec_PtrSize(vTables), 0 );
Tim_ManCreateBox( pManTime, curPo, nRange0 + nRange1 + nRange2, curPi, nRange, Vec_PtrSize(vTables), 0 );
curPi += nRange;
curPo += nRange0 + nRange1 + nRange2;
......@@ -1858,7 +1858,7 @@ Gia_Man_t * Wlc_NtkBitBlast( Wlc_Ntk_t * p, Wlc_BstPar_t * pParIn )
// create new box
if ( vTables == NULL )
Tim_ManSetDelayTables( pManTime, (vTables = Vec_PtrAlloc(100)) );
Tim_ManCreateBox( pManTime, curPo, nRangeIn, curPi, nRange, 1+Vec_PtrSize(vTables), 0 );
Tim_ManCreateBox( pManTime, curPo, nRangeIn, curPi, nRange, Vec_PtrSize(vTables), 0 );
curPi += nRange;
curPo += nRangeIn;
......
......@@ -55,7 +55,7 @@
Finally, the TFO cone of the POs is traversed and all new logic nodes
encountered added to the AIG.
In the end, the POs of the AIG is constructed in 1-to-1 correspondence with
the PIs of the original combinational logic network.
the POs of the original combinational logic network.
Delay tables representing input-to-output delays of each type of white
box should be computed in advance and given to the timing manager in one array
......
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