Commit bcbc91c4 by Yen-Sheng Ho

merge

parents 70511b00 5fbe218f
......@@ -4659,6 +4659,10 @@ SOURCE=.\src\aig\gia\giaRex.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\gia\giaSat3.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\gia\giaSatEdge.c
# End Source File
# Begin Source File
......@@ -5399,6 +5403,10 @@ SOURCE=.\src\proof\pdr\pdrTsim2.c
# End Source File
# Begin Source File
SOURCE=.\src\proof\pdr\pdrTsim3.c
# End Source File
# Begin Source File
SOURCE=.\src\proof\pdr\pdrUtil.c
# End Source File
# End Group
......
......@@ -6,4 +6,5 @@ SRC += src/proof/pdr/pdrCnf.c \
src/proof/pdr/pdrSat.c \
src/proof/pdr/pdrTsim.c \
src/proof/pdr/pdrTsim2.c \
src/proof/pdr/pdrTsim3.c \
src/proof/pdr/pdrUtil.c
......@@ -43,7 +43,8 @@ ABC_NAMESPACE_HEADER_START
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
typedef struct Txs_Man_t_ Txs_Man_t;
typedef struct Txs_Man_t_ Txs_Man_t;
typedef struct Txs3_Man_t_ Txs3_Man_t;
typedef struct Pdr_Set_t_ Pdr_Set_t;
struct Pdr_Set_t_
......@@ -99,7 +100,7 @@ struct Pdr_Man_t_
int nCexes;
int nCexesTotal;
// terminary simulation
Txs_Man_t * pTxs;
Txs3_Man_t * pTxs3;
// internal use
Vec_Int_t * vPrio; // priority flops
Vec_Int_t * vLits; // array of literals
......@@ -206,6 +207,10 @@ extern Pdr_Set_t * Pdr_ManTernarySim( Pdr_Man_t * p, int k, Pdr_Set_t * pCub
extern Txs_Man_t * Txs_ManStart( Pdr_Man_t * pMan, Aig_Man_t * pAig, Vec_Int_t * vPrio );
extern void Txs_ManStop( Txs_Man_t * );
extern Pdr_Set_t * Txs_ManTernarySim( Txs_Man_t * p, int k, Pdr_Set_t * pCube );
/*=== pdrTsim3.c ==========================================================*/
extern Txs3_Man_t * Txs3_ManStart( Pdr_Man_t * pMan, Aig_Man_t * pAig, Vec_Int_t * vPrio );
extern void Txs3_ManStop( Txs3_Man_t * );
extern Pdr_Set_t * Txs3_ManTernarySim( Txs3_Man_t * p, int k, Pdr_Set_t * pCube );
/*=== pdrUtil.c ==========================================================*/
extern Pdr_Set_t * Pdr_SetAlloc( int nSize );
extern Pdr_Set_t * Pdr_SetCreate( Vec_Int_t * vLits, Vec_Int_t * vPiLits );
......
......@@ -265,8 +265,8 @@ Pdr_Man_t * Pdr_ManStart( Aig_Man_t * pAig, Pdr_Par_t * pPars, Vec_Int_t * vPrio
p->vPrio = vPrioInit;
else if ( pPars->fFlopPrio )
p->vPrio = Pdr_ManDeriveFlopPriorities2(p->pGia, 1);
else if ( p->pPars->fNewXSim )
p->vPrio = Vec_IntStartNatural( Aig_ManRegNum(pAig) );
// else if ( p->pPars->fNewXSim )
// p->vPrio = Vec_IntStartNatural( Aig_ManRegNum(pAig) );
else
p->vPrio = Vec_IntStart( Aig_ManRegNum(pAig) );
p->vLits = Vec_IntAlloc( 100 ); // array of literals
......@@ -281,7 +281,7 @@ Pdr_Man_t * Pdr_ManStart( Aig_Man_t * pAig, Pdr_Par_t * pPars, Vec_Int_t * vPrio
p->vRes = Vec_IntAlloc( 100 ); // final result
p->pCnfMan = Cnf_ManStart();
// ternary simulation
p->pTxs = pPars->fNewXSim ? Txs_ManStart( p, pAig, p->vPrio ) : NULL;
p->pTxs3 = pPars->fNewXSim ? Txs3_ManStart( p, pAig, p->vPrio ) : NULL;
// additional AIG data-members
if ( pAig->pFanData == NULL )
Aig_ManFanoutStart( pAig );
......@@ -369,7 +369,7 @@ void Pdr_ManStop( Pdr_Man_t * p )
Vec_IntFreeP( &p->vMapPpi2Ff );
// terminary simulation
if ( p->pPars->fNewXSim )
Txs_ManStop( p->pTxs );
Txs3_ManStop( p->pTxs3 );
// internal use
Vec_IntFreeP( &p->vPrio ); // priority flops
Vec_IntFree( p->vLits ); // array of literals
......
......@@ -147,7 +147,7 @@ Vec_Int_t * Pdr_ManCubeToLits( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, int fCom
int i, iVar, iVarMax = 0;
abctime clk = Abc_Clock();
Vec_IntClear( p->vLits );
assert( !(fNext && fCompl) );
// assert( !(fNext && fCompl) );
for ( i = 0; i < pCube->nLits; i++ )
{
if ( pCube->Lits[i] == -1 )
......@@ -362,7 +362,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
{
abctime clk = Abc_Clock();
if ( p->pPars->fNewXSim )
*ppPred = Txs_ManTernarySim( p->pTxs, k, pCube );
*ppPred = Txs3_ManTernarySim( p->pTxs3, k, pCube );
else
*ppPred = Pdr_ManTernarySim( p, k, pCube );
p->tTsim += Abc_Clock() - clk;
......
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