printf("Warning: LUTs with more than %d input will not be used.\n",FPGA_MAX_LEAVES);
}
// check the library
if(p->fVarPinDelays)
{
for(i=1;i<=p->LutMax;i++)
for(k=0;k<i;k++)
{
if(p->pLutDelays[i][k]<=0.0)
printf("Warning: Pin %d of LUT %d has delay %f. Pin delays should be non-negative numbers. Technology mapping may not work correctly.\n",
k,i,p->pLutDelays[i][k]);
if(k&&p->pLutDelays[i][k-1]>p->pLutDelays[i][k])
printf("Warning: Pin %d of LUT %d has delay %f. Pin %d of LUT %d has delay %f. Pin delays should be in non-degreasing order. Technology mapping may not work correctly.\n",
k-1,i,p->pLutDelays[i][k-1],
k,i,p->pLutDelays[i][k]);
}
}
else
{
for(i=1;i<=p->LutMax;i++)
{
if(p->pLutDelays[i][0]<=0.0)
printf("Warning: LUT %d has delay %f. Pin delays should be non-negative numbers. Technology mapping may not work correctly.\n",