Commit 4cf99cae by Alan Mishchenko

Version abc61206

parent 38254947
......@@ -42,7 +42,7 @@ RSC=rc.exe
# PROP Ignore_Export_Lib 0
# PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c
# ADD CPP /nologo /W3 /GX /O2 /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\bsat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\if" /I "src\map\mapper" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /I "src\misc\espresso" /I "src\misc\nm" /I "src\misc\hash" /I "src\aig\ivy" /I "src\aig\hop" /I "src\aig\rwt" /I "src\aig\deco" /I "src\aig\mem" /I "src\temp\esop" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /FR /YX /FD /c
# ADD CPP /nologo /W3 /GX /O2 /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\bsat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\opt\kit" /I "src\map\fpga" /I "src\map\if" /I "src\map\mapper" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /I "src\misc\espresso" /I "src\misc\nm" /I "src\misc\hash" /I "src\aig\ivy" /I "src\aig\hop" /I "src\aig\rwt" /I "src\aig\deco" /I "src\aig\mem" /I "src\temp\esop" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /FR /YX /FD /c
# ADD BASE RSC /l 0x409 /d "NDEBUG"
# ADD RSC /l 0x409 /d "NDEBUG"
BSC32=bscmake.exe
......@@ -66,7 +66,7 @@ LINK32=link.exe
# PROP Ignore_Export_Lib 0
# PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c
# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\bsat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\if" /I "src\map\mapper" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /I "src\misc\espresso" /I "src\misc\nm" /I "src\misc\hash" /I "src\aig\ivy" /I "src\aig\hop" /I "src\aig\rwt" /I "src\aig\deco" /I "src\aig\mem" /I "src\temp\esop" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /FR /YX /FD /GZ /c
# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\bsat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\opt\kit" /I "src\map\fpga" /I "src\map\if" /I "src\map\mapper" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /I "src\misc\espresso" /I "src\misc\nm" /I "src\misc\hash" /I "src\aig\ivy" /I "src\aig\hop" /I "src\aig\rwt" /I "src\aig\deco" /I "src\aig\mem" /I "src\temp\esop" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /FR /YX /FD /GZ /c
# SUBTRACT CPP /X
# ADD BASE RSC /l 0x409 /d "_DEBUG"
# ADD RSC /l 0x409 /d "_DEBUG"
......@@ -630,10 +630,6 @@ SOURCE=.\src\aig\ivy\ivyFastMap.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ivy\ivyFpga.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ivy\ivyFraig.c
# End Source File
# Begin Source File
......@@ -642,10 +638,6 @@ SOURCE=.\src\aig\ivy\ivyHaig.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ivy\ivyIsop.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ivy\ivyMan.c
# End Source File
# Begin Source File
......@@ -1597,6 +1589,42 @@ SOURCE=.\src\opt\ret\retInt.h
SOURCE=.\src\opt\ret\retLvalue.c
# End Source File
# End Group
# Begin Group "kit"
# PROP Default_Filter ""
# Begin Source File
SOURCE=.\src\opt\kit\kit.h
# End Source File
# Begin Source File
SOURCE=.\src\opt\kit\kitBdd.c
# End Source File
# Begin Source File
SOURCE=.\src\opt\kit\kitFactor.c
# End Source File
# Begin Source File
SOURCE=.\src\opt\kit\kitGraph.c
# End Source File
# Begin Source File
SOURCE=.\src\opt\kit\kitHop.c
# End Source File
# Begin Source File
SOURCE=.\src\opt\kit\kitIsop.c
# End Source File
# Begin Source File
SOURCE=.\src\opt\kit\kitSop.c
# End Source File
# Begin Source File
SOURCE=.\src\opt\kit\kitTruth.c
# End Source File
# End Group
# End Group
# Begin Group "map"
......
......@@ -466,8 +466,6 @@ extern void Ivy_ManHaigPostprocess( Ivy_Man_t * p, int fVerbose );
extern void Ivy_ManHaigCreateObj( Ivy_Man_t * p, Ivy_Obj_t * pObj );
extern void Ivy_ManHaigCreateChoice( Ivy_Man_t * p, Ivy_Obj_t * pObjOld, Ivy_Obj_t * pObjNew );
extern void Ivy_ManHaigSimulate( Ivy_Man_t * p );
/*=== ivyIsop.c ==========================================================*/
extern int Ivy_TruthIsop( unsigned * puTruth, int nVars, Vec_Int_t * vCover, int fTryBoth );
/*=== ivyMan.c ==========================================================*/
extern Ivy_Man_t * Ivy_ManStart();
extern Ivy_Man_t * Ivy_ManStartFrom( Ivy_Man_t * p );
......
......@@ -9,7 +9,6 @@ SRC += src/aig/ivy/ivyBalance.c \
src/aig/ivy/ivyFastMap.c \
src/aig/ivy/ivyFraig.c \
src/aig/ivy/ivyHaig.c \
src/aig/ivy/ivyIsop.c \
src/aig/ivy/ivyMan.c \
src/aig/ivy/ivyMem.c \
src/aig/ivy/ivyMulti.c \
......
......@@ -427,9 +427,9 @@ char * Abc_SopCreateFromIsop( Extra_MmFlex_t * pMan, int nVars, Vec_Int_t * vCov
{
Literal = 3 & (Entry >> (k << 1));
if ( Literal == 1 )
pCube[k] = '1';
else if ( Literal == 2 )
pCube[k] = '0';
else if ( Literal == 2 )
pCube[k] = '1';
else if ( Literal != 0 )
assert( 0 );
}
......
......@@ -2034,25 +2034,28 @@ int Abc_CommandRenode( Abc_Frame_t * pAbc, int argc, char ** argv )
{
FILE * pOut, * pErr;
Abc_Ntk_t * pNtk, * pNtkRes;
int nFaninMax, c;
int nFaninMax, nCubeMax, c;
int fUseBdds;
int fUseSops;
int fVerbose;
extern Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nFaninMax, int fUseBdds, int fVerbose );
extern Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nFaninMax, int nCubeMax, int fUseBdds, int fUseSops, int fVerbose );
pNtk = Abc_FrameReadNtk(pAbc);
pOut = Abc_FrameReadOut(pAbc);
pErr = Abc_FrameReadErr(pAbc);
// set defaults
nFaninMax = 8;
nFaninMax = 5;
nCubeMax = 5;
fUseBdds = 0;
fUseSops = 0;
fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "Fbvh" ) ) != EOF )
while ( ( c = Extra_UtilGetopt( argc, argv, "KCbsvh" ) ) != EOF )
{
switch ( c )
{
case 'F':
case 'K':
if ( globalUtilOptind >= argc )
{
fprintf( pErr, "Command line switch \"-F\" should be followed by an integer.\n" );
......@@ -2063,9 +2066,23 @@ int Abc_CommandRenode( Abc_Frame_t * pAbc, int argc, char ** argv )
if ( nFaninMax < 0 )
goto usage;
break;
case 'C':
if ( globalUtilOptind >= argc )
{
fprintf( pErr, "Command line switch \"-C\" should be followed by an integer.\n" );
goto usage;
}
nCubeMax = atoi(argv[globalUtilOptind]);
globalUtilOptind++;
if ( nCubeMax < 0 )
goto usage;
break;
case 'b':
fUseBdds ^= 1;
break;
case 's':
fUseSops ^= 1;
break;
case 'v':
fVerbose ^= 1;
break;
......@@ -2076,6 +2093,12 @@ int Abc_CommandRenode( Abc_Frame_t * pAbc, int argc, char ** argv )
}
}
if ( fUseBdds && fUseSops )
{
fprintf( pErr, "Cannot optimize both BDDs and SOPs at the same time.\n" );
goto usage;
}
if ( pNtk == NULL )
{
fprintf( pErr, "Empty network.\n" );
......@@ -2088,7 +2111,7 @@ int Abc_CommandRenode( Abc_Frame_t * pAbc, int argc, char ** argv )
}
// get the new network
pNtkRes = Abc_NtkRenode( pNtk, nFaninMax, fUseBdds, fVerbose );
pNtkRes = Abc_NtkRenode( pNtk, nFaninMax, nCubeMax, fUseBdds, fUseSops, fVerbose );
if ( pNtkRes == NULL )
{
fprintf( pErr, "Renoding has failed.\n" );
......@@ -2099,10 +2122,13 @@ int Abc_CommandRenode( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
usage:
fprintf( pErr, "usage: renode [-F num] [-bv]\n" );
fprintf( pErr, "\t transforms an AIG into a logic network by creating larger nodes\n" );
fprintf( pErr, "\t-F num : the maximum fanin size after renoding [default = %d]\n", nFaninMax );
fprintf( pErr, "\t-b : toggles cost function (BDD nodes or FF literals) [default = %s]\n", fUseBdds? "BDD nodes": "FF literals" );
fprintf( pErr, "usage: renode [-K num] [-C num] [-bsv]\n" );
fprintf( pErr, "\t transforms the AIG into a logic network with larger nodes\n" );
fprintf( pErr, "\t while minimizing the number of FF literals of the node SOPs\n" );
fprintf( pErr, "\t-K num : the maximum fanin size after renoding [default = %d]\n", nFaninMax );
fprintf( pErr, "\t-C num : the maximum number of cubes used at a node [default = %d]\n", nCubeMax );
fprintf( pErr, "\t-b : toggles minimizing the number of BDD nodes [default = %s]\n", fUseBdds? "yes": "no" );
fprintf( pErr, "\t-s : toggles minimizing the number of SOP cubes [default = %s]\n", fUseSops? "yes": "no" );
fprintf( pErr, "\t-v : print verbose information [default = %s]\n", fVerbose? "yes": "no" );
fprintf( pErr, "\t-h : print the command usage\n");
return 1;
......
......@@ -20,6 +20,7 @@
#include "abc.h"
#include "if.h"
#include "kit.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -164,6 +165,8 @@ Abc_Ntk_t * Abc_NtkFromIf( If_Man_t * pIfMan, Abc_Ntk_t * pNtk )
// create the new network
if ( pIfMan->pPars->fUseBdds )
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
else if ( pIfMan->pPars->fUseSops )
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
else
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_AIG );
// prepare the mapping manager
......@@ -223,7 +226,6 @@ Abc_Obj_t * Abc_NodeFromIf_rec( Abc_Ntk_t * pNtkNew, If_Man_t * pIfMan, If_Obj_t
If_CutForEachLeaf( pIfMan, pCutBest, pIfLeaf, i )
Abc_ObjAddFanin( pNodeNew, Abc_NodeFromIf_rec(pNtkNew, pIfMan, pIfLeaf) );
// derive the function of this node
if ( pIfMan->pPars->fTruth )
{
if ( pIfMan->pPars->fUseBdds )
......@@ -235,20 +237,29 @@ Abc_Obj_t * Abc_NodeFromIf_rec( Abc_Ntk_t * pNtkNew, If_Man_t * pIfMan, If_Obj_t
// reorder the fanins to minimize the BDD size
Abc_NodeBddReorder( pIfMan->pPars->pReoMan, pNodeNew );
}
else
else if ( pIfMan->pPars->fUseSops )
{
typedef int Kit_Graph_t;
extern Kit_Graph_t * Kit_TruthToGraph( unsigned * pTruth, int nVars );
extern Hop_Obj_t * Dec_GraphToNetworkAig( Hop_Man_t * pMan, Kit_Graph_t * pGraph );
// transform truth table into the decomposition tree
Kit_Graph_t * pGraph = Kit_TruthToGraph( If_CutTruth(pCutBest), pCutBest->nLimit );
Vec_Int_t * vCover = Vec_IntAlloc( 1 << 16 );
// transform truth table into the SOP
int RetValue = Kit_TruthIsop( If_CutTruth(pCutBest), pCutBest->nLimit, vCover, 0 );
assert( RetValue == 0 );
// derive the AIG for that tree
pNodeNew->pData = Dec_GraphToNetworkAig( pNtkNew->pManFunc, pGraph );
pNodeNew->pData = Abc_SopCreateFromIsop( pNtkNew->pManFunc, pCutBest->nLimit, vCover );
Vec_IntFree( vCover );
}
else
{
extern Hop_Obj_t * Kit_GraphToHop( Hop_Man_t * pMan, Kit_Graph_t * pGraph );
Vec_Int_t * vMemory = Vec_IntAlloc( 1 << 16 );
// transform truth table into the decomposition tree
Kit_Graph_t * pGraph = Kit_TruthToGraph( If_CutTruth(pCutBest), pCutBest->nLimit, vMemory );
// derive the AIG for the decomposition tree
pNodeNew->pData = Kit_GraphToHop( pNtkNew->pManFunc, pGraph );
Kit_GraphFree( pGraph );
Vec_IntFree( vMemory );
}
}
else
pNodeNew->pData = Abc_NodeIfToHop( pNtkNew->pManFunc, pIfMan, pIfObj );
If_ObjSetCopy( pIfObj, pNodeNew );
return pNodeNew;
......
......@@ -21,6 +21,7 @@
#include "abc.h"
#include "reo.h"
#include "if.h"
#include "kit.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -28,13 +29,11 @@
static int Abc_NtkRenodeEvalBdd( unsigned * pTruth, int nVars );
static int Abc_NtkRenodeEvalSop( unsigned * pTruth, int nVars );
static int Abc_NtkRenodeEvalAig( unsigned * pTruth, int nVars );
static reo_man * s_pReo = NULL;
static DdManager * s_pDd = NULL;
typedef int Kit_Graph_t;
extern DdNode * Kit_TruthToBdd( DdManager * dd, unsigned * pTruth, int nVars );
extern Kit_Graph_t * Kit_TruthToGraph( unsigned * pTruth, int nVars );
static reo_man * s_pReo = NULL;
static DdManager * s_pDd = NULL;
static Vec_Int_t * s_vMemory = NULL;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......@@ -51,7 +50,7 @@ extern Kit_Graph_t * Kit_TruthToGraph( unsigned * pTruth, int nVars );
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nFaninMax, int fUseBdds, int fVerbose )
Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nFaninMax, int nCubeMax, int fUseBdds, int fUseSops, int fVerbose )
{
extern Abc_Ntk_t * Abc_NtkIf( Abc_Ntk_t * pNtk, If_Par_t * pPars );
If_Par_t Pars, * pPars = &Pars;
......@@ -77,7 +76,14 @@ Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nFaninMax, int fUseBdds, int fV
pPars->pLutLib = NULL; // Abc_FrameReadLibLut();
pPars->pTimesArr = NULL;
pPars->pTimesArr = NULL;
pPars->pFuncCost = fUseBdds? Abc_NtkRenodeEvalBdd : Abc_NtkRenodeEvalSop;
pPars->fUseBdds = fUseBdds;
pPars->fUseSops = fUseSops;
if ( fUseBdds )
pPars->pFuncCost = Abc_NtkRenodeEvalBdd;
else if ( fUseSops )
pPars->pFuncCost = Abc_NtkRenodeEvalSop;
else
pPars->pFuncCost = Abc_NtkRenodeEvalAig;
// start the manager
if ( fUseBdds )
......@@ -85,9 +91,13 @@ Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nFaninMax, int fUseBdds, int fV
assert( s_pReo == NULL );
s_pDd = Cudd_Init( nFaninMax, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
s_pReo = Extra_ReorderInit( nFaninMax, 100 );
pPars->fUseBdds = 1;
pPars->pReoMan = s_pReo;
}
else
{
assert( s_vMemory == NULL );
s_vMemory = Vec_IntAlloc( 1 << 16 );
}
// perform mapping/renoding
pNtkNew = Abc_NtkIf( pNtk, pPars );
......@@ -98,14 +108,20 @@ Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nFaninMax, int fUseBdds, int fV
Extra_StopManager( s_pDd );
Extra_ReorderQuit( s_pReo );
s_pReo = NULL;
s_pDd = NULL;
s_pDd = NULL;
}
else
{
Vec_IntFree( s_vMemory );
s_vMemory = NULL;
}
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Derives the BDD after reordering.]
Synopsis [Computes the cost based on the BDD size after reordering.]
Description []
......@@ -120,7 +136,8 @@ int Abc_NtkRenodeEvalBdd( unsigned * pTruth, int nVars )
int nNodes, nSupport;
bFunc = Kit_TruthToBdd( s_pDd, pTruth, nVars ); Cudd_Ref( bFunc );
bFuncNew = Extra_Reorder( s_pReo, s_pDd, bFunc, NULL ); Cudd_Ref( bFuncNew );
nSupport = Cudd_SupportSize( s_pDd, bFuncNew );
// nSupport = Cudd_SupportSize( s_pDd, bFuncNew );
nSupport = 1;
nNodes = Cudd_DagSize( bFuncNew );
Cudd_RecursiveDeref( s_pDd, bFuncNew );
Cudd_RecursiveDeref( s_pDd, bFunc );
......@@ -129,7 +146,7 @@ int Abc_NtkRenodeEvalBdd( unsigned * pTruth, int nVars )
/**Function*************************************************************
Synopsis [Derives the BDD after reordering.]
Synopsis [Computes the cost based on ISOP.]
Description []
......@@ -140,11 +157,32 @@ int Abc_NtkRenodeEvalBdd( unsigned * pTruth, int nVars )
***********************************************************************/
int Abc_NtkRenodeEvalSop( unsigned * pTruth, int nVars )
{
int nCubes, RetValue;
RetValue = Kit_TruthIsop( pTruth, nVars, s_vMemory, 0 );
assert( RetValue == 0 );
nCubes = Vec_IntSize( s_vMemory );
return (1 << 16) | nCubes;
}
/**Function*************************************************************
Synopsis [Computes the cost based on the factored form.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkRenodeEvalAig( unsigned * pTruth, int nVars )
{
Kit_Graph_t * pGraph;
int nNodes, nDepth;
pGraph = Kit_TruthToGraph( pTruth, nVars );
pGraph = Kit_TruthToGraph( pTruth, nVars, s_vMemory );
nNodes = Kit_GraphNodeNum( pGraph );
nDepth = Kit_GraphLevelNum( pGraph );
// nDepth = Kit_GraphLevelNum( pGraph );
nDepth = 1;
Kit_GraphFree( pGraph );
return (nDepth << 16) | nNodes;
}
......
......@@ -85,6 +85,7 @@ struct If_Par_t_
// internal parameters
int fTruth; // truth table computation enabled
int fUseBdds; // sets local BDDs at the nodes
int fUseSops; // sets local SOPs at the nodes
int nLatches; // the number of latches in seq mapping
If_Lib_t * pLutLib; // the LUT library
float * pTimesArr; // arrival times
......
......@@ -205,7 +205,7 @@ If_Obj_t * If_ManSetupObj( If_Man_t * p )
{
If_Cut_t * pCut;
If_Obj_t * pObj;
int i, * pArrays;
int i, * pArrays, nTruthWords;
// get memory for the object
pObj = (If_Obj_t *)Mem_FixedEntryFetch( p->pMem );
memset( pObj, 0, p->nEntryBase );
......@@ -230,6 +230,13 @@ If_Obj_t * If_ManSetupObj( If_Man_t * p )
pObj->nCuts = 1;
// set the required times
pObj->Required = IF_FLOAT_LARGE;
// set up elementary truth table of the unit cut
if ( p->pPars->fTruth )
{
nTruthWords = Extra_TruthWordNum( pCut->nLimit );
for ( i = 0; i < nTruthWords; i++ )
If_CutTruth(pCut)[i] = 0xAAAAAAAA;
}
return pObj;
}
......
......@@ -69,6 +69,8 @@ static inline unsigned Cut_TruthPhase( If_Cut_t * pCut, If_Cut_t * pCut1 )
***********************************************************************/
void If_CutComputeTruth( If_Man_t * p, If_Cut_t * pCut, If_Cut_t * pCut0, If_Cut_t * pCut1, int fCompl0, int fCompl1 )
{
extern void Kit_FactorTest( unsigned * pTruth, int nVars );
// permute the first table
if ( fCompl0 )
Extra_TruthNot( p->puTemp[0], If_CutTruth(pCut0), pCut->nLimit );
......@@ -86,6 +88,9 @@ void If_CutComputeTruth( If_Man_t * p, If_Cut_t * pCut, If_Cut_t * pCut0, If_Cut
Extra_TruthNand( If_CutTruth(pCut), p->puTemp[2], p->puTemp[3], pCut->nLimit );
else
Extra_TruthAnd( If_CutTruth(pCut), p->puTemp[2], p->puTemp[3], pCut->nLimit );
// perform
// Kit_FactorTest( If_CutTruth(pCut), pCut->nLimit );
}
////////////////////////////////////////////////////////////////////////
......
......@@ -511,7 +511,6 @@ static inline void Extra_TruthNand( unsigned * pOut, unsigned * pIn0, unsigned *
extern void Extra_TruthSwapAdjacentVars( unsigned * pOut, unsigned * pIn, int nVars, int Start );
extern void Extra_TruthStretch( unsigned * pOut, unsigned * pIn, int nVars, int nVarsAll, unsigned Phase );
extern void Extra_TruthShrink( unsigned * pOut, unsigned * pIn, int nVars, int nVarsAll, unsigned Phase );
extern DdNode * Extra_TruthToBdd( DdManager * dd, unsigned * pTruth, int nVars );
extern int Extra_TruthVarInSupport( unsigned * pTruth, int nVars, int iVar );
extern int Extra_TruthSupportSize( unsigned * pTruth, int nVars );
extern int Extra_TruthSupport( unsigned * pTruth, int nVars );
......
......@@ -250,64 +250,6 @@ void Extra_TruthShrink( unsigned * pOut, unsigned * pIn, int nVars, int nVarsAll
/**Function*************************************************************
Synopsis [Performs truth table computation.]
Description [Note the caching makes no sense for this procedure.]
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Extra_TruthToBdd_rec( DdManager * dd, unsigned * pTruth, int iBit, int nVars, int nVarsTotal )
{
DdNode * bF0, * bF1, * bF;
if ( nVars == 0 )
{
if ( pTruth[iBit>>5] & (1 << iBit&31) )
return b1;
return b0;
}
if ( nVars == 5 )
{
if ( pTruth[iBit>>5] == 0xFFFFFFFF )
return b1;
if ( pTruth[iBit>>5] == 0 )
return b0;
}
// other special cases can be added
bF0 = Extra_TruthToBdd_rec( dd, pTruth, iBit, nVars-1, nVarsTotal ); Cudd_Ref( bF0 );
bF1 = Extra_TruthToBdd_rec( dd, pTruth, iBit+(1<<(nVars-1)), nVars-1, nVarsTotal ); Cudd_Ref( bF1 );
bF = Cudd_bddIte( dd, dd->vars[nVarsTotal-nVars], bF1, bF0 ); Cudd_Ref( bF );
Cudd_RecursiveDeref( dd, bF0 );
Cudd_RecursiveDeref( dd, bF1 );
Cudd_Deref( bF );
return bF;
}
/**Function*************************************************************
Synopsis [Compute BDD corresponding to the truth table.]
Description [If truth table has N vars, the BDD depends on N topmost
variables of the BDD manager. The most significant variable of the table
is encoded by the topmost variable of the manager. BDD construction is
very efficient in this case because BDD is constructed one node at a time,
by simply adding BDD nodes on top of existent BDD nodes.]
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Extra_TruthToBdd( DdManager * dd, unsigned * pTruth, int nVars )
{
return Extra_TruthToBdd_rec( dd, pTruth, 0, nVars, nVars );
}
/**Function*************************************************************
Synopsis [Returns 1 if TT depends on the given variable.]
Description []
......
......@@ -598,6 +598,9 @@ static inline int Vec_IntPushUnique( Vec_Int_t * p, int Entry )
***********************************************************************/
static inline unsigned * Vec_IntFetch( Vec_Int_t * p, int nWords )
{
if ( nWords == 0 )
return NULL;
assert( nWords > 0 );
p->nSize += nWords;
if ( p->nSize > p->nCap )
{
......
/**CFile****************************************************************
FileName [kitBdd.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Computation kit.]
Synopsis [Procedures involving BDDs.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - Dec 6, 2006.]
Revision [$Id: kitBdd.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
***********************************************************************/
#include "kit.h"
#include "extra.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Derives the BDD for the given SOP.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Kit_SopToBdd( DdManager * dd, Kit_Sop_t * cSop, int nVars )
{
DdNode * bSum, * bCube, * bTemp, * bVar;
unsigned uCube;
int Value, i, v;
assert( nVars < 16 );
// start the cover
bSum = Cudd_ReadLogicZero(dd); Cudd_Ref( bSum );
// check the logic function of the node
Kit_SopForEachCube( cSop, uCube, i )
{
bCube = Cudd_ReadOne(dd); Cudd_Ref( bCube );
for ( v = 0; v < nVars; v++ )
{
Value = ((uCube >> 2*v) & 3);
if ( Value == 1 )
bVar = Cudd_Not( Cudd_bddIthVar( dd, v ) );
else if ( Value == 2 )
bVar = Cudd_bddIthVar( dd, v );
else
continue;
bCube = Cudd_bddAnd( dd, bTemp = bCube, bVar ); Cudd_Ref( bCube );
Cudd_RecursiveDeref( dd, bTemp );
}
bSum = Cudd_bddOr( dd, bTemp = bSum, bCube );
Cudd_Ref( bSum );
Cudd_RecursiveDeref( dd, bTemp );
Cudd_RecursiveDeref( dd, bCube );
}
// complement the result if necessary
Cudd_Deref( bSum );
return bSum;
}
/**Function*************************************************************
Synopsis [Converts graph to BDD.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Kit_GraphToBdd( DdManager * dd, Kit_Graph_t * pGraph )
{
DdNode * bFunc, * bFunc0, * bFunc1;
Kit_Node_t * pNode;
int i;
// sanity checks
assert( Kit_GraphLeaveNum(pGraph) >= 0 );
assert( Kit_GraphLeaveNum(pGraph) <= pGraph->nSize );
// check for constant function
if ( Kit_GraphIsConst(pGraph) )
return Cudd_NotCond( b1, Kit_GraphIsComplement(pGraph) );
// check for a literal
if ( Kit_GraphIsVar(pGraph) )
return Cudd_NotCond( Cudd_bddIthVar(dd, Kit_GraphVarInt(pGraph)), Kit_GraphIsComplement(pGraph) );
// assign the elementary variables
Kit_GraphForEachLeaf( pGraph, pNode, i )
pNode->pFunc = Cudd_bddIthVar( dd, i );
// compute the function for each internal node
Kit_GraphForEachNode( pGraph, pNode, i )
{
bFunc0 = Cudd_NotCond( Kit_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc, pNode->eEdge0.fCompl );
bFunc1 = Cudd_NotCond( Kit_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc, pNode->eEdge1.fCompl );
pNode->pFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( pNode->pFunc );
}
// deref the intermediate results
bFunc = pNode->pFunc; Cudd_Ref( bFunc );
Kit_GraphForEachNode( pGraph, pNode, i )
Cudd_RecursiveDeref( dd, pNode->pFunc );
Cudd_Deref( bFunc );
// complement the result if necessary
return Cudd_NotCond( bFunc, Kit_GraphIsComplement(pGraph) );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Kit_TruthToBdd_rec( DdManager * dd, unsigned * pTruth, int iBit, int nVars, int nVarsTotal )
{
DdNode * bF0, * bF1, * bF;
if ( nVars == 0 )
{
if ( pTruth[iBit>>5] & (1 << iBit&31) )
return b1;
return b0;
}
if ( nVars == 5 )
{
if ( pTruth[iBit>>5] == 0xFFFFFFFF )
return b1;
if ( pTruth[iBit>>5] == 0 )
return b0;
}
// other special cases can be added
bF0 = Kit_TruthToBdd_rec( dd, pTruth, iBit, nVars-1, nVarsTotal ); Cudd_Ref( bF0 );
bF1 = Kit_TruthToBdd_rec( dd, pTruth, iBit+(1<<(nVars-1)), nVars-1, nVarsTotal ); Cudd_Ref( bF1 );
bF = Cudd_bddIte( dd, dd->vars[nVarsTotal-nVars], bF1, bF0 ); Cudd_Ref( bF );
Cudd_RecursiveDeref( dd, bF0 );
Cudd_RecursiveDeref( dd, bF1 );
Cudd_Deref( bF );
return bF;
}
/**Function*************************************************************
Synopsis [Compute BDD corresponding to the truth table.]
Description [If truth table has N vars, the BDD depends on N topmost
variables of the BDD manager. The most significant variable of the table
is encoded by the topmost variable of the manager. BDD construction is
efficient in this case because BDD is constructed one node at a time,
by simply adding BDD nodes on top of existent BDD nodes.]
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Kit_TruthToBdd( DdManager * dd, unsigned * pTruth, int nVars )
{
return Kit_TruthToBdd_rec( dd, pTruth, 0, nVars, nVars );
}
/**Function*************************************************************
Synopsis [Verifies that the factoring is correct.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Kit_SopFactorVerify( Vec_Int_t * vCover, Kit_Graph_t * pFForm, int nVars )
{
static DdManager * dd = NULL;
Kit_Sop_t Sop, * cSop = &Sop;
DdNode * bFunc1, * bFunc2;
Vec_Int_t * vMemory;
int RetValue;
// get the manager
if ( dd == NULL )
dd = Cudd_Init( 16, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
// derive SOP
vMemory = Vec_IntAlloc( Vec_IntSize(vCover) );
Kit_SopCreate( cSop, vCover, nVars, vMemory );
// get the functions
bFunc1 = Kit_SopToBdd( dd, cSop, nVars ); Cudd_Ref( bFunc1 );
bFunc2 = Kit_GraphToBdd( dd, pFForm ); Cudd_Ref( bFunc2 );
//Extra_bddPrint( dd, bFunc1 ); printf("\n");
//Extra_bddPrint( dd, bFunc2 ); printf("\n");
RetValue = (bFunc1 == bFunc2);
if ( bFunc1 != bFunc2 )
{
int s;
Extra_bddPrint( dd, bFunc1 ); printf("\n");
Extra_bddPrint( dd, bFunc2 ); printf("\n");
s = 0;
}
Cudd_RecursiveDeref( dd, bFunc1 );
Cudd_RecursiveDeref( dd, bFunc2 );
Vec_IntFree( vMemory );
return RetValue;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
/**CFile****************************************************************
FileName [kitHop.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Computation kit.]
Synopsis [Procedures involving AIGs.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - Dec 6, 2006.]
Revision [$Id: kitHop.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
***********************************************************************/
#include "kit.h"
#include "hop.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Transforms the decomposition graph into the AIG.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Obj_t * Kit_GraphToHopInternal( Hop_Man_t * pMan, Kit_Graph_t * pGraph )
{
Kit_Node_t * pNode;
Hop_Obj_t * pAnd0, * pAnd1;
int i;
// check for constant function
if ( Kit_GraphIsConst(pGraph) )
return Hop_NotCond( Hop_ManConst1(pMan), Kit_GraphIsComplement(pGraph) );
// check for a literal
if ( Kit_GraphIsVar(pGraph) )
return Hop_NotCond( Kit_GraphVar(pGraph)->pFunc, Kit_GraphIsComplement(pGraph) );
// build the AIG nodes corresponding to the AND gates of the graph
Kit_GraphForEachNode( pGraph, pNode, i )
{
pAnd0 = Hop_NotCond( Kit_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc, pNode->eEdge0.fCompl );
pAnd1 = Hop_NotCond( Kit_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc, pNode->eEdge1.fCompl );
pNode->pFunc = Hop_And( pMan, pAnd0, pAnd1 );
}
// complement the result if necessary
return Hop_NotCond( pNode->pFunc, Kit_GraphIsComplement(pGraph) );
}
/**Function*************************************************************
Synopsis [Strashes one logic node using its SOP.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Obj_t * Kit_GraphToHop( Hop_Man_t * pMan, Kit_Graph_t * pGraph )
{
Kit_Node_t * pNode;
int i;
// collect the fanins
Kit_GraphForEachLeaf( pGraph, pNode, i )
pNode->pFunc = Hop_IthVar( pMan, i );
// perform strashing
return Kit_GraphToHopInternal( pMan, pGraph );
}
/**Function*************************************************************
Synopsis [Strashes one logic node using its SOP.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Obj_t * Kit_CoverToHop( Hop_Man_t * pMan, Vec_Int_t * vCover, int nVars, Vec_Int_t * vMemory )
{
Kit_Graph_t * pGraph;
Hop_Obj_t * pFunc;
// perform factoring
pGraph = Kit_SopFactor( vCover, 0, nVars, vMemory );
// convert graph to the AIG
pFunc = Kit_GraphToHop( pMan, pGraph );
Kit_GraphFree( pGraph );
return pFunc;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
/**CFile****************************************************************
FileName [kit_.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Computation kit.]
Synopsis []
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - Dec 6, 2006.]
Revision [$Id: kit_.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
***********************************************************************/
#include "kit.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
SRC += src/opt/kit/kitBdd.c \
src/opt/kit/kitFactor.c \
src/opt/kit/kitGraph.c \
src/opt/kit/kitHop.c \
src/opt/kit/kitIsop.c \
src/opt/kit/kitSop.c \
src/opt/kit/kitTruth.c
......@@ -801,14 +801,14 @@ void sat_solver_reducedb(sat_solver* s)
vecp_resize(&s->learnts,j);
}
static lbool sat_solver_search(sat_solver* s, int nof_conflicts, int nof_learnts)
static lbool sat_solver_search(sat_solver* s, sint64 nof_conflicts, sint64 nof_learnts)
{
int* levels = s->levels;
double var_decay = 0.95;
double clause_decay = 0.999;
double random_var_freq = 0.02;
int conflictC = 0;
sint64 conflictC = 0;
veci learnt_clause;
int i;
......@@ -1118,8 +1118,8 @@ bool sat_solver_simplify(sat_solver* s)
int sat_solver_solve(sat_solver* s, lit* begin, lit* end, sint64 nConfLimit, sint64 nInsLimit, sint64 nConfLimitGlobal, sint64 nInsLimitGlobal)
{
double nof_conflicts = 100;
double nof_learnts = sat_solver_nclauses(s) / 3;
sint64 nof_conflicts = 100;
sint64 nof_learnts = sat_solver_nclauses(s) / 3;
lbool status = l_Undef;
lbool* values = s->assigns;
lit* i;
......@@ -1178,9 +1178,9 @@ int sat_solver_solve(sat_solver* s, lit* begin, lit* end, sint64 nConfLimit, sin
s->progress_estimate*100);
fflush(stdout);
}
status = sat_solver_search(s,(int)nof_conflicts, (int)nof_learnts);
nof_conflicts *= 1.5;
nof_learnts *= 1.1;
status = sat_solver_search(s, nof_conflicts, nof_learnts);
nof_conflicts = nof_conflicts * 3 / 2; //*= 1.5;
nof_learnts = nof_learnts * 11 / 10; //*= 1.1;
// quit the loop if reached an external limit
if ( s->nConfLimit && s->stats.conflicts > s->nConfLimit )
......
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