Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
A
abc
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
abc
Commits
ad67f4ef
Commit
ad67f4ef
authored
Dec 10, 2012
by
Alan Mishchenko
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Assembling timing/hierarchy manager from input data.
parent
2575a5d6
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
62 additions
and
0 deletions
+62
-0
src/misc/tim/tim.h
+1
-0
src/misc/tim/timMan.c
+61
-0
No files found.
src/misc/tim/tim.h
View file @
ad67f4ef
...
@@ -127,6 +127,7 @@ extern Tim_Man_t * Tim_ManLoad( Vec_Str_t * p, int fHieOnly );
...
@@ -127,6 +127,7 @@ extern Tim_Man_t * Tim_ManLoad( Vec_Str_t * p, int fHieOnly );
/*=== timMan.c ===========================================================*/
/*=== timMan.c ===========================================================*/
extern
Tim_Man_t
*
Tim_ManStart
(
int
nCis
,
int
nCos
);
extern
Tim_Man_t
*
Tim_ManStart
(
int
nCis
,
int
nCos
);
extern
Tim_Man_t
*
Tim_ManDup
(
Tim_Man_t
*
p
,
int
fUnitDelay
);
extern
Tim_Man_t
*
Tim_ManDup
(
Tim_Man_t
*
p
,
int
fUnitDelay
);
extern
Tim_Man_t
*
Tim_ManCreate
(
Tim_Man_t
*
p
,
void
*
pLib
,
Vec_Flt_t
*
vInArrs
,
Vec_Flt_t
*
vOutReqs
);
extern
void
Tim_ManStop
(
Tim_Man_t
*
p
);
extern
void
Tim_ManStop
(
Tim_Man_t
*
p
);
extern
void
Tim_ManStopP
(
Tim_Man_t
**
p
);
extern
void
Tim_ManStopP
(
Tim_Man_t
**
p
);
extern
void
Tim_ManPrint
(
Tim_Man_t
*
p
);
extern
void
Tim_ManPrint
(
Tim_Man_t
*
p
);
...
...
src/misc/tim/timMan.c
View file @
ad67f4ef
...
@@ -19,6 +19,7 @@
...
@@ -19,6 +19,7 @@
***********************************************************************/
***********************************************************************/
#include "timInt.h"
#include "timInt.h"
#include "map/if/if.h"
ABC_NAMESPACE_IMPL_START
ABC_NAMESPACE_IMPL_START
...
@@ -171,6 +172,66 @@ void Tim_ManStopP( Tim_Man_t ** p )
...
@@ -171,6 +172,66 @@ void Tim_ManStopP( Tim_Man_t ** p )
/**Function*************************************************************
/**Function*************************************************************
Synopsis [Creates manager using hierarchy / box library / delay info.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Tim_Man_t
*
Tim_ManCreate
(
Tim_Man_t
*
p
,
void
*
pLib
,
Vec_Flt_t
*
vInArrs
,
Vec_Flt_t
*
vOutReqs
)
{
Tim_Box_t
*
pBox
;
If_LibBox_t
*
pLibBox
=
(
If_LibBox_t
*
)
pLib
;
If_Box_t
*
pIfBox
;
int
i
,
k
,
*
pTable
;
float
Entry
;
assert
(
p
->
vDelayTables
==
NULL
);
p
->
vDelayTables
=
Vec_PtrStart
(
Vec_PtrSize
(
pLibBox
->
vBoxes
)
);
Tim_ManForEachBox
(
p
,
pBox
,
i
)
{
if
(
pBox
->
iDelayTable
==
-
1
)
{
// create table with constants
pTable
=
ABC_ALLOC
(
int
,
pBox
->
nInputs
*
pBox
->
nOutputs
);
for
(
k
=
0
;
k
<
pBox
->
nInputs
*
pBox
->
nOutputs
;
k
++
)
pTable
[
k
]
=
1
;
continue
;
}
assert
(
pBox
->
iDelayTable
>=
0
&&
pBox
->
iDelayTable
<
Vec_PtrSize
(
pLibBox
->
vBoxes
)
);
pIfBox
=
(
If_Box_t
*
)
Vec_PtrEntry
(
pLibBox
->
vBoxes
,
pBox
->
iDelayTable
);
assert
(
pIfBox
!=
NULL
);
assert
(
pIfBox
->
nPis
==
pBox
->
nInputs
);
assert
(
pIfBox
->
nPos
==
pBox
->
nOutputs
);
if
(
Vec_PtrEntry
(
p
->
vDelayTables
,
pBox
->
iDelayTable
)
!=
NULL
)
continue
;
// create table of boxes
pTable
=
ABC_ALLOC
(
int
,
pBox
->
nInputs
*
pBox
->
nOutputs
);
for
(
k
=
0
;
k
<
pBox
->
nInputs
*
pBox
->
nOutputs
;
k
++
)
pTable
[
k
]
=
pIfBox
->
pDelays
[
k
];
}
// create arrival times
if
(
vInArrs
)
{
assert
(
Vec_FltSize
(
vInArrs
)
==
Tim_ManPiNum
(
p
)
);
Vec_FltForEachEntry
(
vInArrs
,
Entry
,
i
)
Tim_ManInitPiArrival
(
p
,
i
,
Entry
);
}
// create required times
if
(
vOutReqs
)
{
assert
(
Vec_FltSize
(
vOutReqs
)
==
Tim_ManPoNum
(
p
)
);
Vec_FltForEachEntry
(
vOutReqs
,
Entry
,
i
)
Tim_ManInitPoRequired
(
p
,
i
,
Entry
);
}
return
p
;
}
/**Function*************************************************************
Synopsis [Prints the timing manager.]
Synopsis [Prints the timing manager.]
Description []
Description []
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment