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Commit a6086f08 by Alan Mishchenko
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parent 53c4fffa
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abc.plg
...@@ -6,13 +6,327 @@ ...@@ -6,13 +6,327 @@
--------------------Configuration: abc - Win32 Release-------------------- --------------------Configuration: abc - Win32 Release--------------------
</h3> </h3>
<h3>Command Lines</h3> <h3>Command Lines</h3>
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DA.tmp" with contents Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP7A.tmp" with contents
[ [
/nologo /ML /W3 /GX /O2 /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\pga" /I "src\map\mapper" /I "src\map\mapp" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D "HAVE_ASSERT_H" /FR"Release/" /Fp"Release/abc.pch" /YX /Fo"Release/" /Fd"Release/" /FD /c /nologo /ML /W3 /GX /O2 /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\pga" /I "src\map\mapper" /I "src\map\mapp" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D "HAVE_ASSERT_H" /FR"Release/" /Fp"Release/abc.pch" /YX /Fo"Release/" /Fd"Release/" /FD /c
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"C:\_projects\abc\src\base\abc\abcMinBase.c"
"C:\_projects\abc\src\base\abc\abcNames.c"
"C:\_projects\abc\src\base\abc\abcNetlist.c"
"C:\_projects\abc\src\base\abc\abcNtk.c"
"C:\_projects\abc\src\base\abc\abcObj.c"
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"C:\_projects\abc\src\base\abc\abcShow.c"
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"C:\_projects\abc\src\base\abc\abcUtil.c"
"C:\_projects\abc\src\base\abci\abc.c"
"C:\_projects\abc\src\base\abci\abcAttach.c"
"C:\_projects\abc\src\base\abci\abcBalance.c"
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"C:\_projects\abc\src\base\abci\abcDsd.c"
"C:\_projects\abc\src\base\abci\abcFpga.c"
"C:\_projects\abc\src\base\abci\abcFraig.c"
"C:\_projects\abc\src\base\abci\abcFxu.c"
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"C:\_projects\abc\src\base\abci\abcMiter.c"
"C:\_projects\abc\src\base\abci\abcNtbdd.c"
"C:\_projects\abc\src\base\abci\abcPga.c"
"C:\_projects\abc\src\base\abci\abcPrint.c"
"C:\_projects\abc\src\base\abci\abcReconv.c"
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"C:\_projects\abc\src\base\abci\abcRenode.c"
"C:\_projects\abc\src\base\abci\abcRewrite.c"
"C:\_projects\abc\src\base\abci\abcSat.c"
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"C:\_projects\abc\src\base\abci\abcSymm.c"
"C:\_projects\abc\src\base\abci\abcTiming.c"
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"C:\_projects\abc\src\base\abci\abcVanEijk.c"
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"C:\_projects\abc\src\base\seq\seqCreate.c"
"C:\_projects\abc\src\base\seq\seqFpgaCore.c"
"C:\_projects\abc\src\base\seq\seqFpgaIter.c"
"C:\_projects\abc\src\base\seq\seqLatch.c"
"C:\_projects\abc\src\base\seq\seqMan.c"
"C:\_projects\abc\src\base\seq\seqMapCore.c"
"C:\_projects\abc\src\base\seq\seqMapIter.c"
"C:\_projects\abc\src\base\seq\seqRetCore.c"
"C:\_projects\abc\src\base\seq\seqRetIter.c" "C:\_projects\abc\src\base\seq\seqRetIter.c"
"C:\_projects\abc\src\base\seq\seqShare.c"
"C:\_projects\abc\src\base\seq\seqUtil.c"
"C:\_projects\abc\src\base\cmd\cmd.c"
"C:\_projects\abc\src\base\cmd\cmdAlias.c"
"C:\_projects\abc\src\base\cmd\cmdApi.c"
"C:\_projects\abc\src\base\cmd\cmdFlag.c"
"C:\_projects\abc\src\base\cmd\cmdHist.c"
"C:\_projects\abc\src\base\cmd\cmdUtils.c"
"C:\_projects\abc\src\base\io\io.c"
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"C:\_projects\abc\src\base\io\ioReadBaf.c"
"C:\_projects\abc\src\base\io\ioReadBench.c"
"C:\_projects\abc\src\base\io\ioReadBlif.c"
"C:\_projects\abc\src\base\io\ioReadEdif.c"
"C:\_projects\abc\src\base\io\ioReadEqn.c"
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"C:\_projects\abc\src\base\io\ioUtil.c"
"C:\_projects\abc\src\base\io\ioWriteBaf.c"
"C:\_projects\abc\src\base\io\ioWriteBench.c"
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"C:\_projects\abc\src\base\io\ioWriteCnf.c"
"C:\_projects\abc\src\base\io\ioWriteDot.c"
"C:\_projects\abc\src\base\io\ioWriteEqn.c"
"C:\_projects\abc\src\base\io\ioWriteGml.c"
"C:\_projects\abc\src\base\io\ioWriteList.c"
"C:\_projects\abc\src\base\io\ioWritePla.c"
"C:\_projects\abc\src\base\main\libSupport.c"
"C:\_projects\abc\src\base\main\main.c"
"C:\_projects\abc\src\base\main\mainFrame.c"
"C:\_projects\abc\src\base\main\mainInit.c"
"C:\_projects\abc\src\base\main\mainUtils.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddAbs.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddApply.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddFind.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddInv.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddIte.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddNeg.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddWalsh.c"
"C:\_projects\abc\src\bdd\cudd\cuddAndAbs.c"
"C:\_projects\abc\src\bdd\cudd\cuddAnneal.c"
"C:\_projects\abc\src\bdd\cudd\cuddApa.c"
"C:\_projects\abc\src\bdd\cudd\cuddAPI.c"
"C:\_projects\abc\src\bdd\cudd\cuddApprox.c"
"C:\_projects\abc\src\bdd\cudd\cuddBddAbs.c"
"C:\_projects\abc\src\bdd\cudd\cuddBddCorr.c"
"C:\_projects\abc\src\bdd\cudd\cuddBddIte.c"
"C:\_projects\abc\src\bdd\cudd\cuddBridge.c"
"C:\_projects\abc\src\bdd\cudd\cuddCache.c"
"C:\_projects\abc\src\bdd\cudd\cuddCheck.c"
"C:\_projects\abc\src\bdd\cudd\cuddClip.c"
"C:\_projects\abc\src\bdd\cudd\cuddCof.c"
"C:\_projects\abc\src\bdd\cudd\cuddCompose.c"
"C:\_projects\abc\src\bdd\cudd\cuddDecomp.c"
"C:\_projects\abc\src\bdd\cudd\cuddEssent.c"
"C:\_projects\abc\src\bdd\cudd\cuddExact.c"
"C:\_projects\abc\src\bdd\cudd\cuddExport.c"
"C:\_projects\abc\src\bdd\cudd\cuddGenCof.c"
"C:\_projects\abc\src\bdd\cudd\cuddGenetic.c"
"C:\_projects\abc\src\bdd\cudd\cuddGroup.c"
"C:\_projects\abc\src\bdd\cudd\cuddHarwell.c"
"C:\_projects\abc\src\bdd\cudd\cuddInit.c"
"C:\_projects\abc\src\bdd\cudd\cuddInteract.c"
"C:\_projects\abc\src\bdd\cudd\cuddLCache.c"
"C:\_projects\abc\src\bdd\cudd\cuddLevelQ.c"
"C:\_projects\abc\src\bdd\cudd\cuddLinear.c"
"C:\_projects\abc\src\bdd\cudd\cuddLiteral.c"
"C:\_projects\abc\src\bdd\cudd\cuddMatMult.c"
"C:\_projects\abc\src\bdd\cudd\cuddPriority.c"
"C:\_projects\abc\src\bdd\cudd\cuddRead.c"
"C:\_projects\abc\src\bdd\cudd\cuddRef.c"
"C:\_projects\abc\src\bdd\cudd\cuddReorder.c"
"C:\_projects\abc\src\bdd\cudd\cuddSat.c"
"C:\_projects\abc\src\bdd\cudd\cuddSign.c"
"C:\_projects\abc\src\bdd\cudd\cuddSolve.c"
"C:\_projects\abc\src\bdd\cudd\cuddSplit.c"
"C:\_projects\abc\src\bdd\cudd\cuddSubsetHB.c"
"C:\_projects\abc\src\bdd\cudd\cuddSubsetSP.c"
"C:\_projects\abc\src\bdd\cudd\cuddSymmetry.c"
"C:\_projects\abc\src\bdd\cudd\cuddTable.c"
"C:\_projects\abc\src\bdd\cudd\cuddUtil.c"
"C:\_projects\abc\src\bdd\cudd\cuddWindow.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddCount.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddFuncs.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddGroup.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddIsop.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddLin.c"
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"C:\_projects\abc\src\bdd\cudd\cuddZddPort.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddReord.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddSetop.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddSymm.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddUtil.c"
"C:\_projects\abc\src\bdd\epd\epd.c"
"C:\_projects\abc\src\bdd\mtr\mtrBasic.c"
"C:\_projects\abc\src\bdd\mtr\mtrGroup.c"
"C:\_projects\abc\src\bdd\parse\parseCore.c"
"C:\_projects\abc\src\bdd\parse\parseStack.c"
"C:\_projects\abc\src\bdd\dsd\dsdApi.c"
"C:\_projects\abc\src\bdd\dsd\dsdCheck.c"
"C:\_projects\abc\src\bdd\dsd\dsdLocal.c"
"C:\_projects\abc\src\bdd\dsd\dsdMan.c"
"C:\_projects\abc\src\bdd\dsd\dsdProc.c"
"C:\_projects\abc\src\bdd\dsd\dsdTree.c"
"C:\_projects\abc\src\bdd\reo\reoApi.c"
"C:\_projects\abc\src\bdd\reo\reoCore.c"
"C:\_projects\abc\src\bdd\reo\reoProfile.c"
"C:\_projects\abc\src\bdd\reo\reoSift.c"
"C:\_projects\abc\src\bdd\reo\reoSwap.c"
"C:\_projects\abc\src\bdd\reo\reoTest.c"
"C:\_projects\abc\src\bdd\reo\reoTransfer.c"
"C:\_projects\abc\src\bdd\reo\reoUnits.c"
"C:\_projects\abc\src\sat\asat\added.c"
"C:\_projects\abc\src\sat\asat\solver.c"
"C:\_projects\abc\src\sat\msat\msatActivity.c"
"C:\_projects\abc\src\sat\msat\msatClause.c"
"C:\_projects\abc\src\sat\msat\msatClauseVec.c"
"C:\_projects\abc\src\sat\msat\msatMem.c"
"C:\_projects\abc\src\sat\msat\msatOrderH.c"
"C:\_projects\abc\src\sat\msat\msatQueue.c"
"C:\_projects\abc\src\sat\msat\msatRead.c"
"C:\_projects\abc\src\sat\msat\msatSolverApi.c"
"C:\_projects\abc\src\sat\msat\msatSolverCore.c"
"C:\_projects\abc\src\sat\msat\msatSolverIo.c"
"C:\_projects\abc\src\sat\msat\msatSolverSearch.c"
"C:\_projects\abc\src\sat\msat\msatSort.c"
"C:\_projects\abc\src\sat\msat\msatVec.c"
"C:\_projects\abc\src\sat\fraig\fraigApi.c"
"C:\_projects\abc\src\sat\fraig\fraigCanon.c"
"C:\_projects\abc\src\sat\fraig\fraigFanout.c"
"C:\_projects\abc\src\sat\fraig\fraigFeed.c"
"C:\_projects\abc\src\sat\fraig\fraigMan.c"
"C:\_projects\abc\src\sat\fraig\fraigMem.c"
"C:\_projects\abc\src\sat\fraig\fraigNode.c"
"C:\_projects\abc\src\sat\fraig\fraigPrime.c"
"C:\_projects\abc\src\sat\fraig\fraigSat.c"
"C:\_projects\abc\src\sat\fraig\fraigTable.c"
"C:\_projects\abc\src\sat\fraig\fraigUtil.c"
"C:\_projects\abc\src\sat\fraig\fraigVec.c"
"C:\_projects\abc\src\sat\csat\csat_apis.c"
"C:\_projects\abc\src\opt\fxu\fxu.c"
"C:\_projects\abc\src\opt\fxu\fxuCreate.c"
"C:\_projects\abc\src\opt\fxu\fxuHeapD.c"
"C:\_projects\abc\src\opt\fxu\fxuHeapS.c"
"C:\_projects\abc\src\opt\fxu\fxuList.c"
"C:\_projects\abc\src\opt\fxu\fxuMatrix.c"
"C:\_projects\abc\src\opt\fxu\fxuPair.c"
"C:\_projects\abc\src\opt\fxu\fxuPrint.c"
"C:\_projects\abc\src\opt\fxu\fxuReduce.c"
"C:\_projects\abc\src\opt\fxu\fxuSelect.c"
"C:\_projects\abc\src\opt\fxu\fxuSingle.c"
"C:\_projects\abc\src\opt\fxu\fxuUpdate.c"
"C:\_projects\abc\src\opt\rwr\rwrDec.c"
"C:\_projects\abc\src\opt\rwr\rwrEva.c"
"C:\_projects\abc\src\opt\rwr\rwrExp.c"
"C:\_projects\abc\src\opt\rwr\rwrLib.c"
"C:\_projects\abc\src\opt\rwr\rwrMan.c"
"C:\_projects\abc\src\opt\rwr\rwrPrint.c"
"C:\_projects\abc\src\opt\rwr\rwrUtil.c"
"C:\_projects\abc\src\opt\cut\cutApi.c"
"C:\_projects\abc\src\opt\cut\cutCut.c"
"C:\_projects\abc\src\opt\cut\cutMan.c"
"C:\_projects\abc\src\opt\cut\cutMerge.c"
"C:\_projects\abc\src\opt\cut\cutNode.c"
"C:\_projects\abc\src\opt\cut\cutOracle.c"
"C:\_projects\abc\src\opt\cut\cutSeq.c"
"C:\_projects\abc\src\opt\cut\cutTruth.c"
"C:\_projects\abc\src\opt\dec\decAbc.c"
"C:\_projects\abc\src\opt\dec\decFactor.c"
"C:\_projects\abc\src\opt\dec\decMan.c"
"C:\_projects\abc\src\opt\dec\decPrint.c"
"C:\_projects\abc\src\opt\dec\decUtil.c"
"C:\_projects\abc\src\opt\sim\simMan.c"
"C:\_projects\abc\src\opt\sim\simSat.c"
"C:\_projects\abc\src\opt\sim\simSeq.c"
"C:\_projects\abc\src\opt\sim\simSupp.c"
"C:\_projects\abc\src\opt\sim\simSwitch.c"
"C:\_projects\abc\src\opt\sim\simSym.c"
"C:\_projects\abc\src\opt\sim\simSymSat.c"
"C:\_projects\abc\src\opt\sim\simSymSim.c"
"C:\_projects\abc\src\opt\sim\simSymStr.c"
"C:\_projects\abc\src\opt\sim\simUtils.c"
"C:\_projects\abc\src\map\fpga\fpga.c"
"C:\_projects\abc\src\map\fpga\fpgaCore.c"
"C:\_projects\abc\src\map\fpga\fpgaCreate.c"
"C:\_projects\abc\src\map\fpga\fpgaCut.c"
"C:\_projects\abc\src\map\fpga\fpgaCutUtils.c"
"C:\_projects\abc\src\map\fpga\fpgaFanout.c"
"C:\_projects\abc\src\map\fpga\fpgaLib.c"
"C:\_projects\abc\src\map\fpga\fpgaMatch.c"
"C:\_projects\abc\src\map\fpga\fpgaSwitch.c"
"C:\_projects\abc\src\map\fpga\fpgaTime.c"
"C:\_projects\abc\src\map\fpga\fpgaTruth.c"
"C:\_projects\abc\src\map\fpga\fpgaUtils.c"
"C:\_projects\abc\src\map\fpga\fpgaVec.c"
"C:\_projects\abc\src\map\mapper\mapper.c"
"C:\_projects\abc\src\map\mapper\mapperCanon.c"
"C:\_projects\abc\src\map\mapper\mapperCore.c"
"C:\_projects\abc\src\map\mapper\mapperCreate.c"
"C:\_projects\abc\src\map\mapper\mapperCut.c"
"C:\_projects\abc\src\map\mapper\mapperCutUtils.c"
"C:\_projects\abc\src\map\mapper\mapperFanout.c"
"C:\_projects\abc\src\map\mapper\mapperLib.c"
"C:\_projects\abc\src\map\mapper\mapperMatch.c"
"C:\_projects\abc\src\map\mapper\mapperRefs.c"
"C:\_projects\abc\src\map\mapper\mapperSuper.c"
"C:\_projects\abc\src\map\mapper\mapperSwitch.c"
"C:\_projects\abc\src\map\mapper\mapperTable.c"
"C:\_projects\abc\src\map\mapper\mapperTime.c"
"C:\_projects\abc\src\map\mapper\mapperTree.c"
"C:\_projects\abc\src\map\mapper\mapperTruth.c"
"C:\_projects\abc\src\map\mapper\mapperUtils.c"
"C:\_projects\abc\src\map\mapper\mapperVec.c"
"C:\_projects\abc\src\map\mio\mio.c"
"C:\_projects\abc\src\map\mio\mioApi.c"
"C:\_projects\abc\src\map\mio\mioFunc.c"
"C:\_projects\abc\src\map\mio\mioRead.c"
"C:\_projects\abc\src\map\mio\mioUtils.c"
"C:\_projects\abc\src\map\super\super.c"
"C:\_projects\abc\src\map\super\superAnd.c"
"C:\_projects\abc\src\map\super\superGate.c"
"C:\_projects\abc\src\map\super\superWrite.c"
"C:\_projects\abc\src\map\pga\pgaCore.c"
"C:\_projects\abc\src\map\pga\pgaMan.c"
"C:\_projects\abc\src\map\pga\pgaMatch.c"
"C:\_projects\abc\src\map\pga\pgaUtil.c"
"C:\_projects\abc\src\misc\extra\extraBddKmap.c"
"C:\_projects\abc\src\misc\extra\extraBddMisc.c"
"C:\_projects\abc\src\misc\extra\extraBddSymm.c"
"C:\_projects\abc\src\misc\extra\extraUtilBitMatrix.c"
"C:\_projects\abc\src\misc\extra\extraUtilCanon.c"
"C:\_projects\abc\src\misc\extra\extraUtilFile.c"
"C:\_projects\abc\src\misc\extra\extraUtilMemory.c"
"C:\_projects\abc\src\misc\extra\extraUtilMisc.c"
"C:\_projects\abc\src\misc\extra\extraUtilProgress.c"
"C:\_projects\abc\src\misc\extra\extraUtilReader.c"
"C:\_projects\abc\src\misc\st\st.c"
"C:\_projects\abc\src\misc\st\stmm.c"
"C:\_projects\abc\src\misc\util\cpu_stats.c"
"C:\_projects\abc\src\misc\util\cpu_time.c"
"C:\_projects\abc\src\misc\util\datalimit.c"
"C:\_projects\abc\src\misc\util\getopt.c"
"C:\_projects\abc\src\misc\util\pathsearch.c"
"C:\_projects\abc\src\misc\util\safe_mem.c"
"C:\_projects\abc\src\misc\util\strsav.c"
"C:\_projects\abc\src\misc\util\texpand.c"
"C:\_projects\abc\src\misc\mvc\mvc.c"
"C:\_projects\abc\src\misc\mvc\mvcApi.c"
"C:\_projects\abc\src\misc\mvc\mvcCompare.c"
"C:\_projects\abc\src\misc\mvc\mvcContain.c"
"C:\_projects\abc\src\misc\mvc\mvcCover.c"
"C:\_projects\abc\src\misc\mvc\mvcCube.c"
"C:\_projects\abc\src\misc\mvc\mvcDivide.c"
"C:\_projects\abc\src\misc\mvc\mvcDivisor.c"
"C:\_projects\abc\src\misc\mvc\mvcList.c"
"C:\_projects\abc\src\misc\mvc\mvcLits.c"
"C:\_projects\abc\src\misc\mvc\mvcMan.c"
"C:\_projects\abc\src\misc\mvc\mvcOpAlg.c"
"C:\_projects\abc\src\misc\mvc\mvcOpBool.c"
"C:\_projects\abc\src\misc\mvc\mvcPrint.c"
"C:\_projects\abc\src\misc\mvc\mvcSort.c"
"C:\_projects\abc\src\misc\mvc\mvcUtils.c"
] ]
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DA.tmp" Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP7A.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DB.tmp" with contents Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP7B.tmp" with contents
[ [
kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /incremental:no /pdb:"Release/abc.pdb" /machine:I386 /out:"_TEST/abc.exe" kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /incremental:no /pdb:"Release/abc.pdb" /machine:I386 /out:"_TEST/abc.exe"
.\Release\abcAig.obj .\Release\abcAig.obj
...@@ -331,12 +645,341 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32 ...@@ -331,12 +645,341 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32
.\Release\mvcSort.obj .\Release\mvcSort.obj
.\Release\mvcUtils.obj .\Release\mvcUtils.obj
] ]
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DB.tmp" Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP7B.tmp"
<h3>Output Window</h3> <h3>Output Window</h3>
Compiling... Compiling...
abcAig.c
abcCheck.c
abcDfs.c
abcFanio.c
abcFunc.c
abcLatch.c
abcMinBase.c
abcNames.c
abcNetlist.c
abcNtk.c
abcObj.c
abcRefs.c
abcShow.c
abcSop.c
abcUtil.c
abc.c
abcAttach.c
abcBalance.c
abcCollapse.c
abcCut.c
abcDsd.c
abcFpga.c
abcFraig.c
abcFxu.c
abcMap.c
abcMiter.c
abcNtbdd.c
abcPga.c
abcPrint.c
abcReconv.c
abcRefactor.c
abcRenode.c
abcRewrite.c
abcSat.c
abcStrash.c
abcSweep.c
abcSymm.c
abcTiming.c
abcUnreach.c
abcVanEijk.c
abcVanImp.c
abcVerify.c
seqAigCore.c
seqAigIter.c
seqCreate.c
seqFpgaCore.c
seqFpgaIter.c
seqLatch.c
seqMan.c
seqMapCore.c
seqMapIter.c
seqRetCore.c
seqRetIter.c seqRetIter.c
seqShare.c
seqUtil.c
cmd.c
cmdAlias.c
cmdApi.c
cmdFlag.c
cmdHist.c
cmdUtils.c
io.c
ioRead.c
ioReadBaf.c
ioReadBench.c
ioReadBlif.c
ioReadEdif.c
ioReadEqn.c
ioReadPla.c
ioReadVerilog.c
ioUtil.c
ioWriteBaf.c
ioWriteBench.c
ioWriteBlif.c
ioWriteCnf.c
ioWriteDot.c
ioWriteEqn.c
ioWriteGml.c
ioWriteList.c
ioWritePla.c
libSupport.c
main.c
mainFrame.c
mainInit.c
mainUtils.c
cuddAddAbs.c
cuddAddApply.c
cuddAddFind.c
cuddAddInv.c
cuddAddIte.c
cuddAddNeg.c
cuddAddWalsh.c
cuddAndAbs.c
cuddAnneal.c
cuddApa.c
C:\_projects\abc\src\bdd\cudd\cuddApa.c(181) : warning C4244: 'return' : conversion from 'unsigned long ' to 'unsigned short ', possible loss of data
C:\_projects\abc\src\bdd\cudd\cuddApa.c(213) : warning C4244: 'return' : conversion from 'unsigned long ' to 'unsigned short ', possible loss of data
C:\_projects\abc\src\bdd\cudd\cuddApa.c(530) : warning C4244: '=' : conversion from 'unsigned short ' to 'unsigned char ', possible loss of data
C:\_projects\abc\src\bdd\cudd\cuddApa.c(588) : warning C4244: '=' : conversion from 'unsigned short ' to 'unsigned char ', possible loss of data
cuddAPI.c
cuddApprox.c
cuddBddAbs.c
cuddBddCorr.c
cuddBddIte.c
cuddBridge.c
cuddCache.c
C:\_projects\abc\src\bdd\cudd\cuddCache.c(902) : warning C4146: unary minus operator applied to unsigned type, result still unsigned
cuddCheck.c
cuddClip.c
cuddCof.c
cuddCompose.c
cuddDecomp.c
cuddEssent.c
cuddExact.c
cuddExport.c
cuddGenCof.c
cuddGenetic.c
cuddGroup.c
C:\_projects\abc\src\bdd\cudd\cuddGroup.c(2062) : warning C4018: '<=' : signed/unsigned mismatch
cuddHarwell.c
cuddInit.c
cuddInteract.c
cuddLCache.c
C:\_projects\abc\src\bdd\cudd\cuddLCache.c(1387) : warning C4146: unary minus operator applied to unsigned type, result still unsigned
cuddLevelQ.c
cuddLinear.c
cuddLiteral.c
cuddMatMult.c
cuddPriority.c
cuddRead.c
cuddRef.c
cuddReorder.c
C:\_projects\abc\src\bdd\cudd\cuddReorder.c(395) : warning C4146: unary minus operator applied to unsigned type, result still unsigned
cuddSat.c
C:\_projects\abc\src\bdd\cudd\cuddReorder.c(2016) : warning C4700: local variable 'minLevel' used without having been initialized
C:\_projects\abc\src\bdd\cudd\cuddReorder.c(2020) : warning C4700: local variable 'maxLevel' used without having been initialized
cuddSign.c
cuddSolve.c
cuddSplit.c
cuddSubsetHB.c
cuddSubsetSP.c
cuddSymmetry.c
cuddTable.c
C:\_projects\abc\src\bdd\cudd\cuddTable.c(1822) : warning C4018: '<' : signed/unsigned mismatch
C:\_projects\abc\src\bdd\cudd\cuddTable.c(1927) : warning C4018: '<' : signed/unsigned mismatch
C:\_projects\abc\src\bdd\cudd\cuddTable.c(2235) : warning C4018: '<' : signed/unsigned mismatch
C:\_projects\abc\src\bdd\cudd\cuddTable.c(2303) : warning C4018: '<' : signed/unsigned mismatch
C:\_projects\abc\src\bdd\cudd\cuddTable.c(2358) : warning C4146: unary minus operator applied to unsigned type, result still unsigned
cuddUtil.c
cuddWindow.c
cuddZddCount.c
cuddZddFuncs.c
cuddZddGroup.c
cuddZddIsop.c
cuddZddLin.c
cuddZddMisc.c
cuddZddPort.c
cuddZddReord.c
cuddZddSetop.c
cuddZddSymm.c
cuddZddUtil.c
epd.c
mtrBasic.c
mtrGroup.c
parseCore.c
parseStack.c
dsdApi.c
dsdCheck.c
dsdLocal.c
dsdMan.c
dsdProc.c
dsdTree.c
reoApi.c
reoCore.c
reoProfile.c
reoSift.c
reoSwap.c
reoTest.c
reoTransfer.c
reoUnits.c
added.c
solver.c
msatActivity.c
msatClause.c
msatClauseVec.c
msatMem.c
msatOrderH.c
msatQueue.c
msatRead.c
msatSolverApi.c
msatSolverCore.c
msatSolverIo.c
msatSolverSearch.c
msatSort.c
msatVec.c
fraigApi.c
fraigCanon.c
fraigFanout.c
fraigFeed.c
fraigMan.c
fraigMem.c
fraigNode.c
fraigPrime.c
fraigSat.c
fraigTable.c
fraigUtil.c
fraigVec.c
csat_apis.c
fxu.c
fxuCreate.c
fxuHeapD.c
fxuHeapS.c
fxuList.c
fxuMatrix.c
fxuPair.c
fxuPrint.c
fxuReduce.c
fxuSelect.c
fxuSingle.c
fxuUpdate.c
rwrDec.c
rwrEva.c
rwrExp.c
rwrLib.c
rwrMan.c
rwrPrint.c
rwrUtil.c
cutApi.c
cutCut.c
cutMan.c
cutMerge.c
cutNode.c
cutOracle.c
cutSeq.c
cutTruth.c
decAbc.c
decFactor.c
decMan.c
decPrint.c
decUtil.c
simMan.c
simSat.c
simSeq.c
simSupp.c
simSwitch.c
simSym.c
simSymSat.c
simSymSim.c
simSymStr.c
simUtils.c
fpga.c
fpgaCore.c
fpgaCreate.c
fpgaCut.c
fpgaCutUtils.c
fpgaFanout.c
fpgaLib.c
fpgaMatch.c
fpgaSwitch.c
fpgaTime.c
fpgaTruth.c
fpgaUtils.c
fpgaVec.c
mapper.c
mapperCanon.c
mapperCore.c
mapperCreate.c
mapperCut.c
mapperCutUtils.c
mapperFanout.c
mapperLib.c
mapperMatch.c
mapperRefs.c
mapperSuper.c
mapperSwitch.c
mapperTable.c
mapperTime.c
mapperTree.c
mapperTruth.c
mapperUtils.c
mapperVec.c
mio.c
mioApi.c
mioFunc.c
mioRead.c
mioUtils.c
super.c
superAnd.c
superGate.c
superWrite.c
pgaCore.c
pgaMan.c
pgaMatch.c
pgaUtil.c
extraBddKmap.c
extraBddMisc.c
extraBddSymm.c
extraUtilBitMatrix.c
extraUtilCanon.c
extraUtilFile.c
extraUtilMemory.c
extraUtilMisc.c
extraUtilProgress.c
extraUtilReader.c
st.c
stmm.c
cpu_stats.c
cpu_time.c
datalimit.c
getopt.c
pathsearch.c
safe_mem.c
strsav.c
texpand.c
mvc.c
mvcApi.c
mvcCompare.c
mvcContain.c
mvcCover.c
mvcCube.c
mvcDivide.c
mvcDivisor.c
mvcList.c
mvcLits.c
mvcMan.c
mvcOpAlg.c
mvcOpBool.c
mvcPrint.c
mvcSort.c
mvcUtils.c
Linking... Linking...
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DD.tmp" with contents Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP7D.tmp" with contents
[ [
/nologo /o"Release/abc.bsc" /nologo /o"Release/abc.bsc"
.\Release\abcAig.sbr .\Release\abcAig.sbr
...@@ -654,14 +1297,14 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DD.tmp" with conte ...@@ -654,14 +1297,14 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DD.tmp" with conte
.\Release\mvcPrint.sbr .\Release\mvcPrint.sbr
.\Release\mvcSort.sbr .\Release\mvcSort.sbr
.\Release\mvcUtils.sbr] .\Release\mvcUtils.sbr]
Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DD.tmp" Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP7D.tmp"
Creating browse info file... Creating browse info file...
<h3>Output Window</h3> <h3>Output Window</h3>
<h3>Results</h3> <h3>Results</h3>
abc.exe - 0 error(s), 0 warning(s) abc.exe - 0 error(s), 15 warning(s)
</pre> </pre>
</body> </body>
</html> </html>
abc.rc
# global parameters # global parameters
set check # checks intermediate networks #set check # checks intermediate networks
#set checkfio # prints warnings when fanins/fanouts are duplicated #set checkfio # prints warnings when fanins/fanouts are duplicated
set checkread # checks new networks after reading from file set checkread # checks new networks after reading from file
set backup # saves backup networks retrived by "undo" and "recall" set backup # saves backup networks retrived by "undo" and "recall"
...@@ -61,17 +61,15 @@ alias wl write_blif ...@@ -61,17 +61,15 @@ alias wl write_blif
alias wp write_pla alias wp write_pla
# standard scripts # standard scripts
alias cnf "st; ren -c; write_cnf" alias cnf "st; ren -c; write_cnf"
alias prove "st; ren -c; sat" alias prove "st; ren -c; sat"
alias opt "b; ren; b" alias opt "b; ren; b"
alias share "b; ren; fx; b" alias share "b; ren; fx; b"
alias sharem "b; ren -m; fx; b" alias sharem "b; ren -m; fx; b"
alias sharedsd "b; ren; dsd -g; sw; fx; b" alias sharedsd "b; ren; dsd -g; sw; fx; b"
alias resyn "b; rw; rwz; b; rwz; b" alias resyn "b; rw; rwz; b; rwz; b"
alias resynl "b; rw -l; rwz -l; b; rwz -l; b" alias resyn2 "b; rw; rf; b; rw; rwz; b; rfz; rwz; b"
alias resyn2 "b; rw; rf; b; rw; rwz; b; rfz; rwz; b" alias compress "b; rw -l; rwz -l; b; rwz -l; b"
alias resyn2l "b; rw -l; rf -l; b; rw -l; rwz -l; b; rfz -l; rwz -l; b" alias compress2 "b; rw -l; rf -l; b; rw -l; rwz -l; b; rfz -l; rwz -l; b"
alias thin "rwz; rfz; b; ps" alias choice "fraig_store; resyn; fraig_store; resyn2; fraig_store; fraig_restore"
alias choice "fraig_store; resynl; fraig_store; resyn2l; fraig_store; fraig_restore"
alias t "r step_opt.blif; b; seq; show_aig; sfpga -v"
abclib.opt
No preview for this file type
abclib.plg
...@@ -3,12 +3,12 @@ ...@@ -3,12 +3,12 @@
<pre> <pre>
<h1>Build Log</h1> <h1>Build Log</h1>
<h3> <h3>
--------------------Configuration: abclib - Win32 Debug-------------------- --------------------Configuration: abclib - Win32 Release--------------------
</h3> </h3>
<h3>Command Lines</h3> <h3>Command Lines</h3>
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E3.tmp" with contents Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP82.tmp" with contents
[ [
/nologo /MLd /W3 /Gm /GX /ZI /Od /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\pga" /I "src\map\mapper" /I "src\map\mapp" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /D "__STDC__" /D "HAVE_ASSERT_H" /FR"abclib\DebugLib/" /Fp"abclib\DebugLib/abclib.pch" /YX /Fo"abclib\DebugLib/" /Fd"abclib\DebugLib/" /FD /GZ /c /nologo /ML /W3 /GX /O2 /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\pga" /I "src\map\mapper" /I "src\map\mapp" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /D "__STDC__" /D "HAVE_ASSERT_H" /FR"abclib\ReleaseLib/" /Fp"abclib\ReleaseLib/abclib.pch" /YX /Fo"abclib\ReleaseLib/" /Fd"abclib\ReleaseLib/" /FD /c
"C:\_projects\abc\src\base\abc\abcAig.c" "C:\_projects\abc\src\base\abc\abcAig.c"
"C:\_projects\abc\src\base\abc\abcCheck.c" "C:\_projects\abc\src\base\abc\abcCheck.c"
"C:\_projects\abc\src\base\abc\abcDfs.c" "C:\_projects\abc\src\base\abc\abcDfs.c"
...@@ -51,6 +51,19 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E3.tmp" with conte ...@@ -51,6 +51,19 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E3.tmp" with conte
"C:\_projects\abc\src\base\abci\abcVanEijk.c" "C:\_projects\abc\src\base\abci\abcVanEijk.c"
"C:\_projects\abc\src\base\abci\abcVanImp.c" "C:\_projects\abc\src\base\abci\abcVanImp.c"
"C:\_projects\abc\src\base\abci\abcVerify.c" "C:\_projects\abc\src\base\abci\abcVerify.c"
"C:\_projects\abc\src\base\seq\seqAigCore.c"
"C:\_projects\abc\src\base\seq\seqAigIter.c"
"C:\_projects\abc\src\base\seq\seqCreate.c"
"C:\_projects\abc\src\base\seq\seqFpgaCore.c"
"C:\_projects\abc\src\base\seq\seqFpgaIter.c"
"C:\_projects\abc\src\base\seq\seqLatch.c"
"C:\_projects\abc\src\base\seq\seqMan.c"
"C:\_projects\abc\src\base\seq\seqMapCore.c"
"C:\_projects\abc\src\base\seq\seqMapIter.c"
"C:\_projects\abc\src\base\seq\seqRetCore.c"
"C:\_projects\abc\src\base\seq\seqRetIter.c"
"C:\_projects\abc\src\base\seq\seqShare.c"
"C:\_projects\abc\src\base\seq\seqUtil.c"
"C:\_projects\abc\src\base\cmd\cmd.c" "C:\_projects\abc\src\base\cmd\cmd.c"
"C:\_projects\abc\src\base\cmd\cmdAlias.c" "C:\_projects\abc\src\base\cmd\cmdAlias.c"
"C:\_projects\abc\src\base\cmd\cmdApi.c" "C:\_projects\abc\src\base\cmd\cmdApi.c"
...@@ -81,6 +94,113 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E3.tmp" with conte ...@@ -81,6 +94,113 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E3.tmp" with conte
"C:\_projects\abc\src\base\main\mainFrame.c" "C:\_projects\abc\src\base\main\mainFrame.c"
"C:\_projects\abc\src\base\main\mainInit.c" "C:\_projects\abc\src\base\main\mainInit.c"
"C:\_projects\abc\src\base\main\mainUtils.c" "C:\_projects\abc\src\base\main\mainUtils.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddAbs.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddApply.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddFind.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddInv.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddIte.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddNeg.c"
"C:\_projects\abc\src\bdd\cudd\cuddAddWalsh.c"
"C:\_projects\abc\src\bdd\cudd\cuddAndAbs.c"
"C:\_projects\abc\src\bdd\cudd\cuddAnneal.c"
"C:\_projects\abc\src\bdd\cudd\cuddApa.c"
"C:\_projects\abc\src\bdd\cudd\cuddAPI.c"
"C:\_projects\abc\src\bdd\cudd\cuddApprox.c"
"C:\_projects\abc\src\bdd\cudd\cuddBddAbs.c"
"C:\_projects\abc\src\bdd\cudd\cuddBddCorr.c"
"C:\_projects\abc\src\bdd\cudd\cuddBddIte.c"
"C:\_projects\abc\src\bdd\cudd\cuddBridge.c"
"C:\_projects\abc\src\bdd\cudd\cuddCache.c"
"C:\_projects\abc\src\bdd\cudd\cuddCheck.c"
"C:\_projects\abc\src\bdd\cudd\cuddClip.c"
"C:\_projects\abc\src\bdd\cudd\cuddCof.c"
"C:\_projects\abc\src\bdd\cudd\cuddCompose.c"
"C:\_projects\abc\src\bdd\cudd\cuddDecomp.c"
"C:\_projects\abc\src\bdd\cudd\cuddEssent.c"
"C:\_projects\abc\src\bdd\cudd\cuddExact.c"
"C:\_projects\abc\src\bdd\cudd\cuddExport.c"
"C:\_projects\abc\src\bdd\cudd\cuddGenCof.c"
"C:\_projects\abc\src\bdd\cudd\cuddGenetic.c"
"C:\_projects\abc\src\bdd\cudd\cuddGroup.c"
"C:\_projects\abc\src\bdd\cudd\cuddHarwell.c"
"C:\_projects\abc\src\bdd\cudd\cuddInit.c"
"C:\_projects\abc\src\bdd\cudd\cuddInteract.c"
"C:\_projects\abc\src\bdd\cudd\cuddLCache.c"
"C:\_projects\abc\src\bdd\cudd\cuddLevelQ.c"
"C:\_projects\abc\src\bdd\cudd\cuddLinear.c"
"C:\_projects\abc\src\bdd\cudd\cuddLiteral.c"
"C:\_projects\abc\src\bdd\cudd\cuddMatMult.c"
"C:\_projects\abc\src\bdd\cudd\cuddPriority.c"
"C:\_projects\abc\src\bdd\cudd\cuddRead.c"
"C:\_projects\abc\src\bdd\cudd\cuddRef.c"
"C:\_projects\abc\src\bdd\cudd\cuddReorder.c"
"C:\_projects\abc\src\bdd\cudd\cuddSat.c"
"C:\_projects\abc\src\bdd\cudd\cuddSign.c"
"C:\_projects\abc\src\bdd\cudd\cuddSolve.c"
"C:\_projects\abc\src\bdd\cudd\cuddSplit.c"
"C:\_projects\abc\src\bdd\cudd\cuddSubsetHB.c"
"C:\_projects\abc\src\bdd\cudd\cuddSubsetSP.c"
"C:\_projects\abc\src\bdd\cudd\cuddSymmetry.c"
"C:\_projects\abc\src\bdd\cudd\cuddTable.c"
"C:\_projects\abc\src\bdd\cudd\cuddUtil.c"
"C:\_projects\abc\src\bdd\cudd\cuddWindow.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddCount.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddFuncs.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddGroup.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddIsop.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddLin.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddMisc.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddPort.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddReord.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddSetop.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddSymm.c"
"C:\_projects\abc\src\bdd\cudd\cuddZddUtil.c"
"C:\_projects\abc\src\bdd\epd\epd.c"
"C:\_projects\abc\src\bdd\mtr\mtrBasic.c"
"C:\_projects\abc\src\bdd\mtr\mtrGroup.c"
"C:\_projects\abc\src\bdd\parse\parseCore.c"
"C:\_projects\abc\src\bdd\parse\parseStack.c"
"C:\_projects\abc\src\bdd\dsd\dsdApi.c"
"C:\_projects\abc\src\bdd\dsd\dsdCheck.c"
"C:\_projects\abc\src\bdd\dsd\dsdLocal.c"
"C:\_projects\abc\src\bdd\dsd\dsdMan.c"
"C:\_projects\abc\src\bdd\dsd\dsdProc.c"
"C:\_projects\abc\src\bdd\dsd\dsdTree.c"
"C:\_projects\abc\src\bdd\reo\reoApi.c"
"C:\_projects\abc\src\bdd\reo\reoCore.c"
"C:\_projects\abc\src\bdd\reo\reoProfile.c"
"C:\_projects\abc\src\bdd\reo\reoSift.c"
"C:\_projects\abc\src\bdd\reo\reoSwap.c"
"C:\_projects\abc\src\bdd\reo\reoTest.c"
"C:\_projects\abc\src\bdd\reo\reoTransfer.c"
"C:\_projects\abc\src\bdd\reo\reoUnits.c"
"C:\_projects\abc\src\sat\asat\added.c"
"C:\_projects\abc\src\sat\asat\solver.c"
"C:\_projects\abc\src\sat\msat\msatActivity.c"
"C:\_projects\abc\src\sat\msat\msatClause.c"
"C:\_projects\abc\src\sat\msat\msatClauseVec.c"
"C:\_projects\abc\src\sat\msat\msatMem.c"
"C:\_projects\abc\src\sat\msat\msatOrderJ.c"
"C:\_projects\abc\src\sat\msat\msatQueue.c"
"C:\_projects\abc\src\sat\msat\msatRead.c"
"C:\_projects\abc\src\sat\msat\msatSolverApi.c"
"C:\_projects\abc\src\sat\msat\msatSolverCore.c"
"C:\_projects\abc\src\sat\msat\msatSolverIo.c"
"C:\_projects\abc\src\sat\msat\msatSolverSearch.c"
"C:\_projects\abc\src\sat\msat\msatSort.c"
"C:\_projects\abc\src\sat\msat\msatVec.c"
"C:\_projects\abc\src\sat\fraig\fraigApi.c"
"C:\_projects\abc\src\sat\fraig\fraigCanon.c"
"C:\_projects\abc\src\sat\fraig\fraigFanout.c"
"C:\_projects\abc\src\sat\fraig\fraigFeed.c"
"C:\_projects\abc\src\sat\fraig\fraigMan.c"
"C:\_projects\abc\src\sat\fraig\fraigMem.c"
"C:\_projects\abc\src\sat\fraig\fraigNode.c"
"C:\_projects\abc\src\sat\fraig\fraigPrime.c"
"C:\_projects\abc\src\sat\fraig\fraigSat.c"
"C:\_projects\abc\src\sat\fraig\fraigTable.c"
"C:\_projects\abc\src\sat\fraig\fraigUtil.c"
"C:\_projects\abc\src\sat\fraig\fraigVec.c"
"C:\_projects\abc\src\sat\csat\csat_apis.c" "C:\_projects\abc\src\sat\csat\csat_apis.c"
"C:\_projects\abc\src\opt\fxu\fxu.c" "C:\_projects\abc\src\opt\fxu\fxu.c"
"C:\_projects\abc\src\opt\fxu\fxuCreate.c" "C:\_projects\abc\src\opt\fxu\fxuCreate.c"
...@@ -168,342 +288,364 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E3.tmp" with conte ...@@ -168,342 +288,364 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E3.tmp" with conte
"C:\_projects\abc\src\map\pga\pgaMan.c" "C:\_projects\abc\src\map\pga\pgaMan.c"
"C:\_projects\abc\src\map\pga\pgaMatch.c" "C:\_projects\abc\src\map\pga\pgaMatch.c"
"C:\_projects\abc\src\map\pga\pgaUtil.c" "C:\_projects\abc\src\map\pga\pgaUtil.c"
"C:\_projects\abc\src\misc\extra\extraBddKmap.c"
"C:\_projects\abc\src\misc\extra\extraBddMisc.c"
"C:\_projects\abc\src\misc\extra\extraBddSymm.c"
"C:\_projects\abc\src\misc\extra\extraUtilBitMatrix.c"
"C:\_projects\abc\src\misc\extra\extraUtilCanon.c"
"C:\_projects\abc\src\misc\extra\extraUtilFile.c"
"C:\_projects\abc\src\misc\extra\extraUtilMemory.c"
"C:\_projects\abc\src\misc\extra\extraUtilMisc.c"
"C:\_projects\abc\src\misc\extra\extraUtilProgress.c"
"C:\_projects\abc\src\misc\extra\extraUtilReader.c" "C:\_projects\abc\src\misc\extra\extraUtilReader.c"
"C:\_projects\abc\src\base\seq\seqUtil.c" "C:\_projects\abc\src\misc\st\st.c"
"C:\_projects\abc\src\base\seq\seqAigCore.c" "C:\_projects\abc\src\misc\st\stmm.c"
"C:\_projects\abc\src\base\seq\seqAigIter.c" "C:\_projects\abc\src\misc\util\cpu_stats.c"
"C:\_projects\abc\src\base\seq\seqCreate.c" "C:\_projects\abc\src\misc\util\cpu_time.c"
"C:\_projects\abc\src\base\seq\seqFpgaCore.c" "C:\_projects\abc\src\misc\util\datalimit.c"
"C:\_projects\abc\src\base\seq\seqFpgaIter.c" "C:\_projects\abc\src\misc\util\getopt.c"
"C:\_projects\abc\src\base\seq\seqLatch.c" "C:\_projects\abc\src\misc\util\pathsearch.c"
"C:\_projects\abc\src\base\seq\seqMan.c" "C:\_projects\abc\src\misc\util\safe_mem.c"
"C:\_projects\abc\src\base\seq\seqMapCore.c" "C:\_projects\abc\src\misc\util\strsav.c"
"C:\_projects\abc\src\base\seq\seqMapIter.c" "C:\_projects\abc\src\misc\util\texpand.c"
"C:\_projects\abc\src\base\seq\seqRetCore.c" "C:\_projects\abc\src\misc\mvc\mvc.c"
"C:\_projects\abc\src\base\seq\seqRetIter.c" "C:\_projects\abc\src\misc\mvc\mvcApi.c"
"C:\_projects\abc\src\base\seq\seqShare.c" "C:\_projects\abc\src\misc\mvc\mvcCompare.c"
"C:\_projects\abc\src\misc\mvc\mvcContain.c"
"C:\_projects\abc\src\misc\mvc\mvcCover.c"
"C:\_projects\abc\src\misc\mvc\mvcCube.c"
"C:\_projects\abc\src\misc\mvc\mvcDivide.c"
"C:\_projects\abc\src\misc\mvc\mvcDivisor.c"
"C:\_projects\abc\src\misc\mvc\mvcList.c"
"C:\_projects\abc\src\misc\mvc\mvcLits.c"
"C:\_projects\abc\src\misc\mvc\mvcMan.c"
"C:\_projects\abc\src\misc\mvc\mvcOpAlg.c"
"C:\_projects\abc\src\misc\mvc\mvcOpBool.c"
"C:\_projects\abc\src\misc\mvc\mvcPrint.c"
"C:\_projects\abc\src\misc\mvc\mvcSort.c"
"C:\_projects\abc\src\misc\mvc\mvcUtils.c"
] ]
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E3.tmp" Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP82.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E4.tmp" with contents Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP83.tmp" with contents
[ [
/nologo /out:"abclib\abclib_debug.lib" /nologo /out:"abclib\abclib_release.lib"
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.\abclib\DebugLib\fraigMem.obj .\abclib\ReleaseLib\msatQueue.obj
.\abclib\DebugLib\fraigNode.obj .\abclib\ReleaseLib\msatRead.obj
.\abclib\DebugLib\fraigPrime.obj .\abclib\ReleaseLib\msatSolverApi.obj
.\abclib\DebugLib\fraigSat.obj .\abclib\ReleaseLib\msatSolverCore.obj
.\abclib\DebugLib\fraigTable.obj .\abclib\ReleaseLib\msatSolverIo.obj
.\abclib\DebugLib\fraigUtil.obj .\abclib\ReleaseLib\msatSolverSearch.obj
.\abclib\DebugLib\fraigVec.obj .\abclib\ReleaseLib\msatSort.obj
.\abclib\DebugLib\csat_apis.obj .\abclib\ReleaseLib\msatVec.obj
.\abclib\DebugLib\fxu.obj .\abclib\ReleaseLib\fraigApi.obj
.\abclib\DebugLib\fxuCreate.obj .\abclib\ReleaseLib\fraigCanon.obj
.\abclib\DebugLib\fxuHeapD.obj .\abclib\ReleaseLib\fraigFanout.obj
.\abclib\DebugLib\fxuHeapS.obj .\abclib\ReleaseLib\fraigFeed.obj
.\abclib\DebugLib\fxuList.obj .\abclib\ReleaseLib\fraigMan.obj
.\abclib\DebugLib\fxuMatrix.obj .\abclib\ReleaseLib\fraigMem.obj
.\abclib\DebugLib\fxuPair.obj .\abclib\ReleaseLib\fraigNode.obj
.\abclib\DebugLib\fxuPrint.obj .\abclib\ReleaseLib\fraigPrime.obj
.\abclib\DebugLib\fxuReduce.obj .\abclib\ReleaseLib\fraigSat.obj
.\abclib\DebugLib\fxuSelect.obj .\abclib\ReleaseLib\fraigTable.obj
.\abclib\DebugLib\fxuSingle.obj .\abclib\ReleaseLib\fraigUtil.obj
.\abclib\DebugLib\fxuUpdate.obj .\abclib\ReleaseLib\fraigVec.obj
.\abclib\DebugLib\rwrDec.obj .\abclib\ReleaseLib\csat_apis.obj
.\abclib\DebugLib\rwrEva.obj .\abclib\ReleaseLib\fxu.obj
.\abclib\DebugLib\rwrExp.obj .\abclib\ReleaseLib\fxuCreate.obj
.\abclib\DebugLib\rwrLib.obj .\abclib\ReleaseLib\fxuHeapD.obj
.\abclib\DebugLib\rwrMan.obj .\abclib\ReleaseLib\fxuHeapS.obj
.\abclib\DebugLib\rwrPrint.obj .\abclib\ReleaseLib\fxuList.obj
.\abclib\DebugLib\rwrUtil.obj .\abclib\ReleaseLib\fxuMatrix.obj
.\abclib\DebugLib\cutApi.obj .\abclib\ReleaseLib\fxuPair.obj
.\abclib\DebugLib\cutCut.obj .\abclib\ReleaseLib\fxuPrint.obj
.\abclib\DebugLib\cutMan.obj .\abclib\ReleaseLib\fxuReduce.obj
.\abclib\DebugLib\cutMerge.obj .\abclib\ReleaseLib\fxuSelect.obj
.\abclib\DebugLib\cutNode.obj .\abclib\ReleaseLib\fxuSingle.obj
.\abclib\DebugLib\cutOracle.obj .\abclib\ReleaseLib\fxuUpdate.obj
.\abclib\DebugLib\cutSeq.obj .\abclib\ReleaseLib\rwrDec.obj
.\abclib\DebugLib\cutTruth.obj .\abclib\ReleaseLib\rwrEva.obj
.\abclib\DebugLib\decAbc.obj .\abclib\ReleaseLib\rwrExp.obj
.\abclib\DebugLib\decFactor.obj .\abclib\ReleaseLib\rwrLib.obj
.\abclib\DebugLib\decMan.obj .\abclib\ReleaseLib\rwrMan.obj
.\abclib\DebugLib\decPrint.obj .\abclib\ReleaseLib\rwrPrint.obj
.\abclib\DebugLib\decUtil.obj .\abclib\ReleaseLib\rwrUtil.obj
.\abclib\DebugLib\simMan.obj .\abclib\ReleaseLib\cutApi.obj
.\abclib\DebugLib\simSat.obj .\abclib\ReleaseLib\cutCut.obj
.\abclib\DebugLib\simSeq.obj .\abclib\ReleaseLib\cutMan.obj
.\abclib\DebugLib\simSupp.obj .\abclib\ReleaseLib\cutMerge.obj
.\abclib\DebugLib\simSwitch.obj .\abclib\ReleaseLib\cutNode.obj
.\abclib\DebugLib\simSym.obj .\abclib\ReleaseLib\cutOracle.obj
.\abclib\DebugLib\simSymSat.obj .\abclib\ReleaseLib\cutSeq.obj
.\abclib\DebugLib\simSymSim.obj .\abclib\ReleaseLib\cutTruth.obj
.\abclib\DebugLib\simSymStr.obj .\abclib\ReleaseLib\decAbc.obj
.\abclib\DebugLib\simUtils.obj .\abclib\ReleaseLib\decFactor.obj
.\abclib\DebugLib\fpga.obj .\abclib\ReleaseLib\decMan.obj
.\abclib\DebugLib\fpgaCore.obj .\abclib\ReleaseLib\decPrint.obj
.\abclib\DebugLib\fpgaCreate.obj .\abclib\ReleaseLib\decUtil.obj
.\abclib\DebugLib\fpgaCut.obj .\abclib\ReleaseLib\simMan.obj
.\abclib\DebugLib\fpgaCutUtils.obj .\abclib\ReleaseLib\simSat.obj
.\abclib\DebugLib\fpgaFanout.obj .\abclib\ReleaseLib\simSeq.obj
.\abclib\DebugLib\fpgaLib.obj .\abclib\ReleaseLib\simSupp.obj
.\abclib\DebugLib\fpgaMatch.obj .\abclib\ReleaseLib\simSwitch.obj
.\abclib\DebugLib\fpgaSwitch.obj .\abclib\ReleaseLib\simSym.obj
.\abclib\DebugLib\fpgaTime.obj .\abclib\ReleaseLib\simSymSat.obj
.\abclib\DebugLib\fpgaTruth.obj .\abclib\ReleaseLib\simSymSim.obj
.\abclib\DebugLib\fpgaUtils.obj .\abclib\ReleaseLib\simSymStr.obj
.\abclib\DebugLib\fpgaVec.obj .\abclib\ReleaseLib\simUtils.obj
.\abclib\DebugLib\mapper.obj .\abclib\ReleaseLib\fpga.obj
.\abclib\DebugLib\mapperCanon.obj .\abclib\ReleaseLib\fpgaCore.obj
.\abclib\DebugLib\mapperCore.obj .\abclib\ReleaseLib\fpgaCreate.obj
.\abclib\DebugLib\mapperCreate.obj .\abclib\ReleaseLib\fpgaCut.obj
.\abclib\DebugLib\mapperCut.obj .\abclib\ReleaseLib\fpgaCutUtils.obj
.\abclib\DebugLib\mapperCutUtils.obj .\abclib\ReleaseLib\fpgaFanout.obj
.\abclib\DebugLib\mapperFanout.obj .\abclib\ReleaseLib\fpgaLib.obj
.\abclib\DebugLib\mapperLib.obj .\abclib\ReleaseLib\fpgaMatch.obj
.\abclib\DebugLib\mapperMatch.obj .\abclib\ReleaseLib\fpgaSwitch.obj
.\abclib\DebugLib\mapperRefs.obj .\abclib\ReleaseLib\fpgaTime.obj
.\abclib\DebugLib\mapperSuper.obj .\abclib\ReleaseLib\fpgaTruth.obj
.\abclib\DebugLib\mapperSwitch.obj .\abclib\ReleaseLib\fpgaUtils.obj
.\abclib\DebugLib\mapperTable.obj .\abclib\ReleaseLib\fpgaVec.obj
.\abclib\DebugLib\mapperTime.obj .\abclib\ReleaseLib\mapper.obj
.\abclib\DebugLib\mapperTree.obj .\abclib\ReleaseLib\mapperCanon.obj
.\abclib\DebugLib\mapperTruth.obj .\abclib\ReleaseLib\mapperCore.obj
.\abclib\DebugLib\mapperUtils.obj .\abclib\ReleaseLib\mapperCreate.obj
.\abclib\DebugLib\mapperVec.obj .\abclib\ReleaseLib\mapperCut.obj
.\abclib\DebugLib\mio.obj .\abclib\ReleaseLib\mapperCutUtils.obj
.\abclib\DebugLib\mioApi.obj .\abclib\ReleaseLib\mapperFanout.obj
.\abclib\DebugLib\mioFunc.obj .\abclib\ReleaseLib\mapperLib.obj
.\abclib\DebugLib\mioRead.obj .\abclib\ReleaseLib\mapperMatch.obj
.\abclib\DebugLib\mioUtils.obj .\abclib\ReleaseLib\mapperRefs.obj
.\abclib\DebugLib\super.obj .\abclib\ReleaseLib\mapperSuper.obj
.\abclib\DebugLib\superAnd.obj .\abclib\ReleaseLib\mapperSwitch.obj
.\abclib\DebugLib\superGate.obj .\abclib\ReleaseLib\mapperTable.obj
.\abclib\DebugLib\superWrite.obj .\abclib\ReleaseLib\mapperTime.obj
.\abclib\DebugLib\pgaCore.obj .\abclib\ReleaseLib\mapperTree.obj
.\abclib\DebugLib\pgaMan.obj .\abclib\ReleaseLib\mapperTruth.obj
.\abclib\DebugLib\pgaMatch.obj .\abclib\ReleaseLib\mapperUtils.obj
.\abclib\DebugLib\pgaUtil.obj .\abclib\ReleaseLib\mapperVec.obj
.\abclib\DebugLib\extraBddKmap.obj .\abclib\ReleaseLib\mio.obj
.\abclib\DebugLib\extraBddMisc.obj .\abclib\ReleaseLib\mioApi.obj
.\abclib\DebugLib\extraBddSymm.obj .\abclib\ReleaseLib\mioFunc.obj
.\abclib\DebugLib\extraUtilBitMatrix.obj .\abclib\ReleaseLib\mioRead.obj
.\abclib\DebugLib\extraUtilCanon.obj .\abclib\ReleaseLib\mioUtils.obj
.\abclib\DebugLib\extraUtilFile.obj .\abclib\ReleaseLib\super.obj
.\abclib\DebugLib\extraUtilMemory.obj .\abclib\ReleaseLib\superAnd.obj
.\abclib\DebugLib\extraUtilMisc.obj .\abclib\ReleaseLib\superGate.obj
.\abclib\DebugLib\extraUtilProgress.obj .\abclib\ReleaseLib\superWrite.obj
.\abclib\DebugLib\extraUtilReader.obj .\abclib\ReleaseLib\pgaCore.obj
.\abclib\DebugLib\st.obj .\abclib\ReleaseLib\pgaMan.obj
.\abclib\DebugLib\stmm.obj .\abclib\ReleaseLib\pgaMatch.obj
.\abclib\DebugLib\cpu_stats.obj .\abclib\ReleaseLib\pgaUtil.obj
.\abclib\DebugLib\cpu_time.obj .\abclib\ReleaseLib\extraBddKmap.obj
.\abclib\DebugLib\datalimit.obj .\abclib\ReleaseLib\extraBddMisc.obj
.\abclib\DebugLib\getopt.obj .\abclib\ReleaseLib\extraBddSymm.obj
.\abclib\DebugLib\pathsearch.obj .\abclib\ReleaseLib\extraUtilBitMatrix.obj
.\abclib\DebugLib\safe_mem.obj .\abclib\ReleaseLib\extraUtilCanon.obj
.\abclib\DebugLib\strsav.obj .\abclib\ReleaseLib\extraUtilFile.obj
.\abclib\DebugLib\texpand.obj .\abclib\ReleaseLib\extraUtilMemory.obj
.\abclib\DebugLib\mvc.obj .\abclib\ReleaseLib\extraUtilMisc.obj
.\abclib\DebugLib\mvcApi.obj .\abclib\ReleaseLib\extraUtilProgress.obj
.\abclib\DebugLib\mvcCompare.obj .\abclib\ReleaseLib\extraUtilReader.obj
.\abclib\DebugLib\mvcContain.obj .\abclib\ReleaseLib\st.obj
.\abclib\DebugLib\mvcCover.obj .\abclib\ReleaseLib\stmm.obj
.\abclib\DebugLib\mvcCube.obj .\abclib\ReleaseLib\cpu_stats.obj
.\abclib\DebugLib\mvcDivide.obj .\abclib\ReleaseLib\cpu_time.obj
.\abclib\DebugLib\mvcDivisor.obj .\abclib\ReleaseLib\datalimit.obj
.\abclib\DebugLib\mvcList.obj .\abclib\ReleaseLib\getopt.obj
.\abclib\DebugLib\mvcLits.obj .\abclib\ReleaseLib\pathsearch.obj
.\abclib\DebugLib\mvcMan.obj .\abclib\ReleaseLib\safe_mem.obj
.\abclib\DebugLib\mvcOpAlg.obj .\abclib\ReleaseLib\strsav.obj
.\abclib\DebugLib\mvcOpBool.obj .\abclib\ReleaseLib\texpand.obj
.\abclib\DebugLib\mvcPrint.obj .\abclib\ReleaseLib\mvc.obj
.\abclib\DebugLib\mvcSort.obj .\abclib\ReleaseLib\mvcApi.obj
.\abclib\DebugLib\mvcUtils.obj .\abclib\ReleaseLib\mvcCompare.obj
.\abclib\DebugLib\seqUtil.obj .\abclib\ReleaseLib\mvcContain.obj
.\abclib\DebugLib\seqAigCore.obj .\abclib\ReleaseLib\mvcCover.obj
.\abclib\DebugLib\seqAigIter.obj .\abclib\ReleaseLib\mvcCube.obj
.\abclib\DebugLib\seqCreate.obj .\abclib\ReleaseLib\mvcDivide.obj
.\abclib\DebugLib\seqFpgaCore.obj .\abclib\ReleaseLib\mvcDivisor.obj
.\abclib\DebugLib\seqFpgaIter.obj .\abclib\ReleaseLib\mvcList.obj
.\abclib\DebugLib\seqLatch.obj .\abclib\ReleaseLib\mvcLits.obj
.\abclib\DebugLib\seqMan.obj .\abclib\ReleaseLib\mvcMan.obj
.\abclib\DebugLib\seqMapCore.obj .\abclib\ReleaseLib\mvcOpAlg.obj
.\abclib\DebugLib\seqMapIter.obj .\abclib\ReleaseLib\mvcOpBool.obj
.\abclib\DebugLib\seqRetCore.obj .\abclib\ReleaseLib\mvcPrint.obj
.\abclib\DebugLib\seqRetIter.obj .\abclib\ReleaseLib\mvcSort.obj
.\abclib\DebugLib\seqShare.obj .\abclib\ReleaseLib\mvcUtils.obj
] ]
Creating command line "link.exe -lib @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E4.tmp" Creating command line "link.exe -lib @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP83.tmp"
<h3>Output Window</h3> <h3>Output Window</h3>
Compiling... Compiling...
abcAig.c abcAig.c
...@@ -548,6 +690,19 @@ abcUnreach.c ...@@ -548,6 +690,19 @@ abcUnreach.c
abcVanEijk.c abcVanEijk.c
abcVanImp.c abcVanImp.c
abcVerify.c abcVerify.c
seqAigCore.c
seqAigIter.c
seqCreate.c
seqFpgaCore.c
seqFpgaIter.c
seqLatch.c
seqMan.c
seqMapCore.c
seqMapIter.c
seqRetCore.c
seqRetIter.c
seqShare.c
seqUtil.c
cmd.c cmd.c
cmdAlias.c cmdAlias.c
cmdApi.c cmdApi.c
...@@ -578,6 +733,128 @@ main.c ...@@ -578,6 +733,128 @@ main.c
mainFrame.c mainFrame.c
mainInit.c mainInit.c
mainUtils.c mainUtils.c
cuddAddAbs.c
cuddAddApply.c
cuddAddFind.c
cuddAddInv.c
cuddAddIte.c
cuddAddNeg.c
cuddAddWalsh.c
cuddAndAbs.c
cuddAnneal.c
cuddApa.c
C:\_projects\abc\src\bdd\cudd\cuddApa.c(181) : warning C4244: 'return' : conversion from 'unsigned long ' to 'unsigned short ', possible loss of data
C:\_projects\abc\src\bdd\cudd\cuddApa.c(213) : warning C4244: 'return' : conversion from 'unsigned long ' to 'unsigned short ', possible loss of data
C:\_projects\abc\src\bdd\cudd\cuddApa.c(530) : warning C4244: '=' : conversion from 'unsigned short ' to 'unsigned char ', possible loss of data
C:\_projects\abc\src\bdd\cudd\cuddApa.c(588) : warning C4244: '=' : conversion from 'unsigned short ' to 'unsigned char ', possible loss of data
cuddAPI.c
cuddApprox.c
cuddBddAbs.c
cuddBddCorr.c
cuddBddIte.c
cuddBridge.c
cuddCache.c
C:\_projects\abc\src\bdd\cudd\cuddCache.c(902) : warning C4146: unary minus operator applied to unsigned type, result still unsigned
cuddCheck.c
cuddClip.c
cuddCof.c
cuddCompose.c
cuddDecomp.c
cuddEssent.c
cuddExact.c
cuddExport.c
cuddGenCof.c
cuddGenetic.c
cuddGroup.c
C:\_projects\abc\src\bdd\cudd\cuddGroup.c(2062) : warning C4018: '<=' : signed/unsigned mismatch
cuddHarwell.c
cuddInit.c
cuddInteract.c
cuddLCache.c
C:\_projects\abc\src\bdd\cudd\cuddLCache.c(1387) : warning C4146: unary minus operator applied to unsigned type, result still unsigned
cuddLevelQ.c
cuddLinear.c
cuddLiteral.c
cuddMatMult.c
cuddPriority.c
cuddRead.c
cuddRef.c
cuddReorder.c
C:\_projects\abc\src\bdd\cudd\cuddReorder.c(395) : warning C4146: unary minus operator applied to unsigned type, result still unsigned
cuddSat.c
C:\_projects\abc\src\bdd\cudd\cuddReorder.c(2016) : warning C4700: local variable 'minLevel' used without having been initialized
C:\_projects\abc\src\bdd\cudd\cuddReorder.c(2020) : warning C4700: local variable 'maxLevel' used without having been initialized
cuddSign.c
cuddSolve.c
cuddSplit.c
cuddSubsetHB.c
cuddSubsetSP.c
cuddSymmetry.c
cuddTable.c
C:\_projects\abc\src\bdd\cudd\cuddTable.c(1822) : warning C4018: '<' : signed/unsigned mismatch
C:\_projects\abc\src\bdd\cudd\cuddTable.c(1927) : warning C4018: '<' : signed/unsigned mismatch
C:\_projects\abc\src\bdd\cudd\cuddTable.c(2235) : warning C4018: '<' : signed/unsigned mismatch
C:\_projects\abc\src\bdd\cudd\cuddTable.c(2303) : warning C4018: '<' : signed/unsigned mismatch
C:\_projects\abc\src\bdd\cudd\cuddTable.c(2358) : warning C4146: unary minus operator applied to unsigned type, result still unsigned
cuddUtil.c
cuddWindow.c
cuddZddCount.c
cuddZddFuncs.c
cuddZddGroup.c
cuddZddIsop.c
cuddZddLin.c
cuddZddMisc.c
cuddZddPort.c
cuddZddReord.c
cuddZddSetop.c
cuddZddSymm.c
cuddZddUtil.c
epd.c
mtrBasic.c
mtrGroup.c
parseCore.c
parseStack.c
dsdApi.c
dsdCheck.c
dsdLocal.c
dsdMan.c
dsdProc.c
dsdTree.c
reoApi.c
reoCore.c
reoProfile.c
reoSift.c
reoSwap.c
reoTest.c
reoTransfer.c
reoUnits.c
added.c
solver.c
msatActivity.c
msatClause.c
msatClauseVec.c
msatMem.c
msatOrderJ.c
msatQueue.c
msatRead.c
msatSolverApi.c
msatSolverCore.c
msatSolverIo.c
msatSolverSearch.c
msatSort.c
msatVec.c
fraigApi.c
fraigCanon.c
fraigFanout.c
fraigFeed.c
fraigMan.c
fraigMem.c
fraigNode.c
fraigPrime.c
fraigSat.c
fraigTable.c
fraigUtil.c
fraigVec.c
csat_apis.c csat_apis.c
fxu.c fxu.c
fxuCreate.c fxuCreate.c
...@@ -665,347 +942,369 @@ pgaCore.c ...@@ -665,347 +942,369 @@ pgaCore.c
pgaMan.c pgaMan.c
pgaMatch.c pgaMatch.c
pgaUtil.c pgaUtil.c
extraBddKmap.c
extraBddMisc.c
extraBddSymm.c
extraUtilBitMatrix.c
extraUtilCanon.c
extraUtilFile.c
extraUtilMemory.c
extraUtilMisc.c
extraUtilProgress.c
extraUtilReader.c extraUtilReader.c
seqUtil.c st.c
seqAigCore.c stmm.c
seqAigIter.c cpu_stats.c
seqCreate.c cpu_time.c
seqFpgaCore.c datalimit.c
seqFpgaIter.c getopt.c
seqLatch.c pathsearch.c
seqMan.c safe_mem.c
seqMapCore.c strsav.c
seqMapIter.c texpand.c
seqRetCore.c mvc.c
seqRetIter.c mvcApi.c
seqShare.c mvcCompare.c
mvcContain.c
mvcCover.c
mvcCube.c
mvcDivide.c
mvcDivisor.c
mvcList.c
mvcLits.c
mvcMan.c
mvcOpAlg.c
mvcOpBool.c
mvcPrint.c
mvcSort.c
mvcUtils.c
Creating library... Creating library...
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E5.tmp" with contents Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84.tmp" with contents
[ [
/nologo /o"abclib\DebugLib/abclib.bsc" /nologo /o"abclib\ReleaseLib/abclib.bsc"
.\abclib\DebugLib\abcAig.sbr .\abclib\ReleaseLib\abcAig.sbr
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.\abclib\DebugLib\abcFanio.sbr .\abclib\ReleaseLib\abcFanio.sbr
.\abclib\DebugLib\abcFunc.sbr .\abclib\ReleaseLib\abcFunc.sbr
.\abclib\DebugLib\abcLatch.sbr .\abclib\ReleaseLib\abcLatch.sbr
.\abclib\DebugLib\abcMinBase.sbr .\abclib\ReleaseLib\abcMinBase.sbr
.\abclib\DebugLib\abcNames.sbr .\abclib\ReleaseLib\abcNames.sbr
.\abclib\DebugLib\abcNetlist.sbr .\abclib\ReleaseLib\abcNetlist.sbr
.\abclib\DebugLib\abcNtk.sbr .\abclib\ReleaseLib\abcNtk.sbr
.\abclib\DebugLib\abcObj.sbr .\abclib\ReleaseLib\abcObj.sbr
.\abclib\DebugLib\abcRefs.sbr .\abclib\ReleaseLib\abcRefs.sbr
.\abclib\DebugLib\abcShow.sbr .\abclib\ReleaseLib\abcShow.sbr
.\abclib\DebugLib\abcSop.sbr .\abclib\ReleaseLib\abcSop.sbr
.\abclib\DebugLib\abcUtil.sbr .\abclib\ReleaseLib\abcUtil.sbr
.\abclib\DebugLib\abc.sbr .\abclib\ReleaseLib\abc.sbr
.\abclib\DebugLib\abcAttach.sbr .\abclib\ReleaseLib\abcAttach.sbr
.\abclib\DebugLib\abcBalance.sbr .\abclib\ReleaseLib\abcBalance.sbr
.\abclib\DebugLib\abcCollapse.sbr .\abclib\ReleaseLib\abcCollapse.sbr
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.\abclib\DebugLib\abcDsd.sbr .\abclib\ReleaseLib\abcDsd.sbr
.\abclib\DebugLib\abcFpga.sbr .\abclib\ReleaseLib\abcFpga.sbr
.\abclib\DebugLib\abcFraig.sbr .\abclib\ReleaseLib\abcFraig.sbr
.\abclib\DebugLib\abcFxu.sbr .\abclib\ReleaseLib\abcFxu.sbr
.\abclib\DebugLib\abcMap.sbr .\abclib\ReleaseLib\abcMap.sbr
.\abclib\DebugLib\abcMiter.sbr .\abclib\ReleaseLib\abcMiter.sbr
.\abclib\DebugLib\abcNtbdd.sbr .\abclib\ReleaseLib\abcNtbdd.sbr
.\abclib\DebugLib\abcPga.sbr .\abclib\ReleaseLib\abcPga.sbr
.\abclib\DebugLib\abcPrint.sbr .\abclib\ReleaseLib\abcPrint.sbr
.\abclib\DebugLib\abcReconv.sbr .\abclib\ReleaseLib\abcReconv.sbr
.\abclib\DebugLib\abcRefactor.sbr .\abclib\ReleaseLib\abcRefactor.sbr
.\abclib\DebugLib\abcRenode.sbr .\abclib\ReleaseLib\abcRenode.sbr
.\abclib\DebugLib\abcRewrite.sbr .\abclib\ReleaseLib\abcRewrite.sbr
.\abclib\DebugLib\abcSat.sbr .\abclib\ReleaseLib\abcSat.sbr
.\abclib\DebugLib\abcStrash.sbr .\abclib\ReleaseLib\abcStrash.sbr
.\abclib\DebugLib\abcSweep.sbr .\abclib\ReleaseLib\abcSweep.sbr
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.\abclib\DebugLib\abcUnreach.sbr .\abclib\ReleaseLib\abcUnreach.sbr
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.\abclib\DebugLib\abcVanImp.sbr .\abclib\ReleaseLib\abcVanImp.sbr
.\abclib\DebugLib\abcVerify.sbr .\abclib\ReleaseLib\abcVerify.sbr
.\abclib\DebugLib\cmd.sbr .\abclib\ReleaseLib\seqAigCore.sbr
.\abclib\DebugLib\cmdAlias.sbr .\abclib\ReleaseLib\seqAigIter.sbr
.\abclib\DebugLib\cmdApi.sbr .\abclib\ReleaseLib\seqCreate.sbr
.\abclib\DebugLib\cmdFlag.sbr .\abclib\ReleaseLib\seqFpgaCore.sbr
.\abclib\DebugLib\cmdHist.sbr .\abclib\ReleaseLib\seqFpgaIter.sbr
.\abclib\DebugLib\cmdUtils.sbr .\abclib\ReleaseLib\seqLatch.sbr
.\abclib\DebugLib\io.sbr .\abclib\ReleaseLib\seqMan.sbr
.\abclib\DebugLib\ioRead.sbr .\abclib\ReleaseLib\seqMapCore.sbr
.\abclib\DebugLib\ioReadBaf.sbr .\abclib\ReleaseLib\seqMapIter.sbr
.\abclib\DebugLib\ioReadBench.sbr .\abclib\ReleaseLib\seqRetCore.sbr
.\abclib\DebugLib\ioReadBlif.sbr .\abclib\ReleaseLib\seqRetIter.sbr
.\abclib\DebugLib\ioReadEdif.sbr .\abclib\ReleaseLib\seqShare.sbr
.\abclib\DebugLib\ioReadEqn.sbr .\abclib\ReleaseLib\seqUtil.sbr
.\abclib\DebugLib\ioReadPla.sbr .\abclib\ReleaseLib\cmd.sbr
.\abclib\DebugLib\ioReadVerilog.sbr .\abclib\ReleaseLib\cmdAlias.sbr
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Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3E5.tmp" Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84.tmp"
Creating browse info file... Creating browse info file...
<h3>Output Window</h3> <h3>Output Window</h3>
<h3>Results</h3> <h3>Results</h3>
abclib_debug.lib - 0 error(s), 0 warning(s) abclib_release.lib - 0 error(s), 15 warning(s)
</pre> </pre>
</body> </body>
</html> </html>
abctestlib.dsp 0 → 100644
# Microsoft Developer Studio Project File - Name="abctestlib" - Package Owner=<4>
# Microsoft Developer Studio Generated Build File, Format Version 6.00
# ** DO NOT EDIT **
# TARGTYPE "Win32 (x86) Console Application" 0x0103
CFG=abctestlib - Win32 Debug
!MESSAGE This is not a valid makefile. To build this project using NMAKE,
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!MESSAGE NMAKE /f "abctestlib.mak".
!MESSAGE
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!MESSAGE "abctestlib - Win32 Release" (based on "Win32 (x86) Console Application")
!MESSAGE "abctestlib - Win32 Debug" (based on "Win32 (x86) Console Application")
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RSC=rc.exe
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LINK32=link.exe
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abctestlib.dsw 0 → 100644
Microsoft Developer Studio Workspace File, Format Version 6.00
# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE!
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abctestlib.opt 0 → 100644
File added
abctestlib.plg 0 → 100644
<html>
<body>
<pre>
<h1>Build Log</h1>
<h3>
--------------------Configuration: abctestlib - Win32 Release--------------------
</h3>
<h3>Command Lines</h3>
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP86.tmp" with contents
[
/nologo /ML /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /Fp"Release/abctestlib.pch" /YX /Fo"Release/" /Fd"Release/" /FD /c
"C:\_projects\abctestlib\demo.c"
]
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP86.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP87.tmp" with contents
[
kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib C:\_projects\abc\abclib\abclib_release.lib /nologo /subsystem:console /incremental:no /pdb:"Release/abctestlib.pdb" /machine:I386 /out:"_TEST/abctestlib.exe"
.\Release\demo.obj
]
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP87.tmp"
<h3>Output Window</h3>
Compiling...
demo.c
Linking...
<h3>Results</h3>
abctestlib.exe - 0 error(s), 0 warning(s)
</pre>
</body>
</html>
demo.c 0 → 100644
/**CFile****************************************************************
FileName [demo.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [ABC as a static library.]
Synopsis [A demo program illustrating the use of ABC as a static library.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: demo.c,v 1.00 2005/11/14 00:00:00 alanmi Exp $]
***********************************************************************/
#include <stdio.h>
#include <time.h>
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
// procedures to start and stop the ABC framework
// (should be called before and after the ABC procedures are called)
extern void Abc_Start();
extern void Abc_Stop();
// procedures to get the ABC framework and execute commands in it
extern void * Abc_FrameGetGlobalFrame();
extern int Cmd_CommandExecute( void * pAbc, char * sCommand );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [The main() procedure.]
Description [This procedure compiles into a stand-alone program for
DAG-aware rewriting of the AIGs. A BLIF or PLA file to be considered
for rewriting should be given as a command-line argument. Implementation
of the rewriting is inspired by the paper: Per Bjesse, Arne Boralv,
"DAG-aware circuit compression for formal verification", Proc. ICCAD 2004.]
SideEffects []
SeeAlso []
***********************************************************************/
int main( int argc, char * argv[] )
{
// parameters
int fUseResyn2 = 0;
int fPrintStats = 1;
int fVerify = 1;
// variables
void * pAbc;
char * pFileName;
char Command[1000];
int clkRead, clkResyn, clkVer, clk;
//////////////////////////////////////////////////////////////////////////
// get the input file name
if ( argc != 2 )
{
printf( "Wrong number of command-line arguments.\n" );
return 1;
}
pFileName = argv[1];
//////////////////////////////////////////////////////////////////////////
// start the ABC framework
Abc_Start();
pAbc = Abc_FrameGetGlobalFrame();
clk = clock();
//////////////////////////////////////////////////////////////////////////
// read the file
sprintf( Command, "read %s", pFileName );
if ( Cmd_CommandExecute( pAbc, Command ) )
{
fprintf( stdout, "Cannot execute command \"%s\".\n", Command );
return 1;
}
//////////////////////////////////////////////////////////////////////////
// balance
sprintf( Command, "balance" );
if ( Cmd_CommandExecute( pAbc, Command ) )
{
fprintf( stdout, "Cannot execute command \"%s\".\n", Command );
return 1;
}
clkRead = clock() - clk;
//////////////////////////////////////////////////////////////////////////
// print stats
if ( fPrintStats )
{
sprintf( Command, "print_stats" );
if ( Cmd_CommandExecute( pAbc, Command ) )
{
fprintf( stdout, "Cannot execute command \"%s\".\n", Command );
return 1;
}
}
clk = clock();
//////////////////////////////////////////////////////////////////////////
// synthesize
if ( fUseResyn2 )
{
sprintf( Command, "balance; rewrite -l; refactor -l; balance; rewrite -l; rewrite -lz; balance; refactor -lz; rewrite -lz; balance" );
if ( Cmd_CommandExecute( pAbc, Command ) )
{
fprintf( stdout, "Cannot execute command \"%s\".\n", Command );
return 1;
}
}
else
{
sprintf( Command, "balance; rewrite -l; rewrite -lz; balance; rewrite -lz; balance" );
if ( Cmd_CommandExecute( pAbc, Command ) )
{
fprintf( stdout, "Cannot execute command \"%s\".\n", Command );
return 1;
}
}
clkResyn = clock() - clk;
//////////////////////////////////////////////////////////////////////////
// print stats
if ( fPrintStats )
{
sprintf( Command, "print_stats" );
if ( Cmd_CommandExecute( pAbc, Command ) )
{
fprintf( stdout, "Cannot execute command \"%s\".\n", Command );
return 1;
}
}
//////////////////////////////////////////////////////////////////////////
// write the result in blif
sprintf( Command, "write_blif result.blif" );
if ( Cmd_CommandExecute( pAbc, Command ) )
{
fprintf( stdout, "Cannot execute command \"%s\".\n", Command );
return 1;
}
//////////////////////////////////////////////////////////////////////////
// perform verification
clk = clock();
if ( fVerify )
{
sprintf( Command, "cec %s result.blif", pFileName );
if ( Cmd_CommandExecute( pAbc, Command ) )
{
fprintf( stdout, "Cannot execute command \"%s\".\n", Command );
return 1;
}
}
clkVer = clock() - clk;
printf( "Reading = %6.2f sec ", (float)(clkRead)/(float)(CLOCKS_PER_SEC) );
printf( "Rewriting = %6.2f sec ", (float)(clkResyn)/(float)(CLOCKS_PER_SEC) );
printf( "Verification = %6.2f sec\n", (float)(clkVer)/(float)(CLOCKS_PER_SEC) );
//////////////////////////////////////////////////////////////////////////
// stop the ABC framework
Abc_Stop();
return 0;
}
examples/C2670.blif 0 → 100644
# ATPG -- Automatic Test Pattern Generation for
# Combinational Circuits
# ATPG, Version 1.0, 4/29/86, Author: Ruey-sing Wei and Tony Ma
.model C2670.iscas
.inputs 1(0) 2(1) 3(2) 4(3) 5(4) 6(5) 7(6) 8(7) 11(8) 14(9) 15(10) 16(11) 19(12) 20(13) 21(14) 22(15) 23(16) 24(17) 25(18) 26(19) 27(20) 28(21) 29(22) 32(23) 33(24) 34(25) 35(26) 36(27) 37(28) 40(29) 43(30) 44(31) 47(32) 48(33) 49(34) 50(35) 51(36) 52(37) 53(38) 54(39) 55(40) 56(41) 57(42) 60(43) 61(44) 62(45) 63(46) 64(47) 65(48) 66(49) 67(50) 68(51) 69(52) 72(53) 73(54) 74(55) 75(56) 76(57) 77(58) 78(59) 79(60) 80(61) 81(62) 82(63) 85(64) 86(65) 87(66) 88(67) 89(68) 90(69) 91(70) 92(71) 93(72) 94(73) 95(74) 96(75) 99(76) 100(77) 101(78) 102(79) 103(80) 104(81) 105(82) 106(83) 107(84) 108(85) 111(86) 112(87) 113(88) 114(89) 115(90) 116(91) 117(92) 118(93) 119(94) 120(95) 123(96) 124(97) 125(98) 126(99) 127(100) 128(101) 129(102) 130(103) 131(104) 132(105) 135(106) 136(107) 137(108) 138(109) 139(110) 140(111) 141(112) 142(113) 169(114) 174(115) 177(116) 178(117) 179(118) 180(119) 181(120) 182(121) 183(122) 184(123) 185(124) 186(125) 189(126) 190(127) 191(128) 192(129) 193(130) 194(131) 195(132) 196(133) 197(134) 198(135) 199(136) 200(137) 201(138) 202(139) 203(140) 204(141) 205(142) 206(143) 207(144) 208(145) 209(146) 210(147) 211(148) 212(149) 213(150) 214(151) 215(152) 239(153) 240(154) 241(155) 242(156) 243(157) 244(158) 245(159) 246(160) 247(161) 248(162) 249(163) 250(164) 251(165) 252(166) 253(167) 254(168) 255(169) 256(170) 257(171) 262(172) 263(173) 264(174) 265(175) 266(176) 267(177) 268(178) 269(179) 270(180) 271(181) 272(182) 273(183) 274(184) 275(185) 276(186) 277(187) 278(188) 279(189) 452(190) 483(191) 543(192) 559(193) 567(194) 651(195) 661(196) 860(197) 868(198) 1083(199) 1341(200) 1348(201) 1384(202) 1956(203) 1961(204) 1966(205) 1971(206) 1976(207) 1981(208) 1986(209) 1991(210) 1996(211) 2066(212) 2067(213) 2072(214) 2078(215) 2084(216) 2090(217) 2096(218) 2100(219) 2104(220) 2105(221) 2106(222) 2427(223) 2430(224) 2435(225) 2438(226) 2443(227) 2446(228) 2451(229) 2454(230) 2474(231) 2678(232)
.outputs 169(114) 174(115) 177(116) 178(117) 179(118) 180(119) 181(120) 182(121) 183(122) 184(123) 185(124) 186(125) 189(126) 190(127) 191(128) 192(129) 193(130) 194(131) 195(132) 196(133) 197(134) 198(135) 199(136) 200(137) 201(138) 202(139) 203(140) 204(141) 205(142) 206(143) 207(144) 208(145) 209(146) 210(147) 211(148) 212(149) 213(150) 214(151) 215(152) 239(153) 240(154) 241(155) 242(156) 243(157) 244(158) 245(159) 246(160) 247(161) 248(162) 249(163) 250(164) 251(165) 252(166) 253(167) 254(168) 255(169) 256(170) 257(171) 262(172) 263(173) 264(174) 265(175) 266(176) 267(177) 268(178) 269(179) 270(180) 271(181) 272(182) 273(183) 274(184) 275(185) 276(186) 277(187) 278(188) 279(189) 350(301) 335(299) 409(298) 369(289) 367(288) 411(264) 337(263) 384(262) 218(311) 219(302) 220(306) 221(305) 235(307) 236(303) 237(309) 238(304) 158(349) 259(414) 391(379) 173(389) 223(413) 234(376) 217(423) 325(507) 261(506) 319(656) 160(609) 162(612) 164(607) 166(625) 168(623) 171(621) 153(671) 176(803) 188(761) 299(692) 301(694) 286(696) 303(698) 288(700) 305(702) 290(704) 284(847) 321(848) 297(849) 280(850) 148(851) 282(922) 323(923) 156(1046) 401(1276) 227(1179) 229(1180) 311(1278) 150(1277) 145(1358) 395(1392) 295(1400) 331(1401) 397(1406) 329(1414) 231(1422) 308(1425) 225(1424)
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1 0
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1 0
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1 0
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1 0
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1 0
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1 0
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1 0
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1 0
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examples/ac.v 0 → 100644
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examples/apex4.pla 0 → 100644
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0010001-- 0000000011011101110
010111000 0000011111110010000
1-0000000 0001101111000000000
110111010 0011011001110010000
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011110111 0010101111001100000
110100110 0000111011101010000
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01-011000 0001011111000000000
00-00-0-- 0000000000011001110
11110-1-0 0001001101000000000
111110101 0000111011100110000
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010101101 0001111111001101001
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1000000-0 0000111111010010000
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000------ 0000000000011111111
.e
examples/frg2.blif 0 → 100644
.model frg2
.inputs a b c d e f g h i j k l m n o p q r s t u v w x y z a0 b0 c0 d0 e0 f0 \
g0 h0 i0 j0 k0 l0 m0 n0 o0 p0 q0 s0 t0 u0 v0 w0 x0 y0 z0 a1 b1 c1 d1 e1 f1 \
g1 h1 i1 j1 k1 l1 m1 n1 o1 p1 q1 r1 s1 t1 u1 v1 w1 x1 y1 z1 a2 b2 c2 d2 e2 f2 \
g2 h2 i2 j2 k2 l2 m2 n2 o2 p2 q2 r2 s2 t2 u2 v2 w2 x2 y2 z2 a3 b3 c3 d3 e3 f3 \
g3 h3 i3 j3 k3 l3 m3 n3 o3 p3 q3 r3 s3 t3 u3 v3 w3 x3 y3 z3 a4 b4 c4 d4 e4 f4 \
g4 h4 i4 j4 k4 l4 m4 n4
.outputs o4 p4 q4 r4 s4 t4 u4 v4 w4 x4 y4 z4 a5 b5 c5 d5 e5 f5 g5 h5 i5 j5 k5 \
l5 m5 n5 o5 p5 q5 r5 s5 t5 u5 v5 w5 x5 y5 z5 a6 b6 c6 d6 e6 f6 g6 h6 i6 j6 k6 \
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l8 m8 n8 o8 p8 q8 r8 s8 t8 u8 v8 w8 x8 y8 z8 a9 b9 c9 d9 e9 f9 g9 h9 i9 j9 k9 \
l9 m9 n9 o9 p9 q9 r9 s9 t9 u9 v9 w9
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100 1
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.names l4 i1 q34
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.names l4 j1 r34
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.names l4 k1 s34
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.names l4 l1 t34
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.names y3 x3 w34 v34
0-- 1
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.names a4 z3 w34
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1-1-1- 1
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1--01- 1
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.names i1 y0 j1 z0 d35 b35
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.end
examples/i10.blif 0 → 100644
.model i10
.inputs V32(0) V32(1) V32(2) V32(3) V56(0) V289(0) V10(0) V13(0) \
V35(0) V203(0) V288(6) V288(7) V248(0) V249(0) V62(0) V59(0) \
V174(0) V215(0) V66(0) V70(0) V43(0) V214(0) V37(0) V271(0) V40(0) \
V45(0) V149(7) V149(6) V149(5) V149(4) V1(0) V7(0) V34(0) V243(0) \
V244(0) V245(0) V246(0) V247(0) V293(0) V302(0) V270(0) V269(0) \
V274(0) V202(0) V275(0) V257(7) V257(5) V257(3) V257(1) V257(2) \
V257(4) V257(6) V9(0) V149(0) V149(1) V149(2) V149(3) V169(1) \
V165(0) V165(2) V165(4) V165(5) V165(6) V165(7) V165(1) V88(2) \
V88(3) V55(0) V169(0) V52(0) V5(0) V6(0) V12(0) V11(0) V4(0) \
V165(3) V51(0) V65(0) V290(0) V279(0) V280(0) V288(4) V288(2) \
V288(0) V258(0) V229(5) V229(4) V229(3) V229(2) V229(1) V229(0) \
V223(5) V223(4) V223(3) V223(2) V223(1) V223(0) V189(5) V189(4) \
V189(3) V189(2) V189(1) V189(0) V183(5) V183(4) V183(3) V183(2) \
V183(1) V183(0) V239(4) V239(3) V239(2) V239(1) V239(0) V234(4) \
V234(3) V234(2) V234(1) V234(0) V199(4) V199(3) V199(2) V199(1) \
V199(0) V194(4) V194(3) V194(2) V194(1) V194(0) V257(0) V32(8) \
V32(7) V32(6) V32(5) V32(4) V32(11) V32(10) V32(9) V88(1) V88(0) \
V84(5) V84(4) V84(3) V84(2) V84(1) V84(0) V78(5) V78(4) V2(0) V3(0) \
V14(0) V213(0) V213(5) V213(4) V213(3) V213(2) V213(1) V268(5) \
V268(3) V268(1) V268(2) V268(4) V8(0) V60(0) V53(0) V57(0) V109(0) \
V277(0) V278(0) V259(0) V260(0) V67(0) V68(0) V69(0) V216(0) \
V175(0) V177(0) V172(0) V171(0) V50(0) V63(0) V71(0) V292(0) \
V291(0) V91(0) V91(1) V294(0) V207(0) V295(0) V204(0) V205(0) \
V261(0) V262(0) V100(0) V100(5) V100(4) V100(3) V100(2) V100(1) \
V240(0) V242(0) V241(0) V33(0) V16(0) V15(0) V101(0) V268(0) \
V288(1) V288(3) V288(5) V301(0) V108(0) V108(1) V108(2) V108(3) \
V108(4) V108(5) V124(5) V124(4) V124(3) V124(2) V124(1) V124(0) \
V132(7) V132(6) V132(5) V132(4) V132(3) V132(2) V132(1) V132(0) \
V118(5) V118(4) V118(3) V118(2) V118(1) V118(0) V118(7) V118(6) \
V46(0) V48(0) V102(0) V110(0) V134(1) V134(0) V272(0) V78(2) V78(3) \
V39(0) V38(0) V42(0) V44(0) V41(0) V78(1) V78(0) V94(0) V94(1)
.outputs V321(2) V356 V357 V373 V375(0) V377 V393(0) V398(0) V410(0) \
V423(0) V432 V435(0) V500(0) V508(0) V511(0) V512 V527 V537 V538 \
V539 V540 V541 V542 V543 V544 V545 V546 V547 V548 V572(9) V572(8) \
V572(7) V572(6) V572(5) V572(4) V572(3) V572(2) V572(1) V572(0) \
V585(0) V587 V591(0) V597(0) V603(0) V609(0) V620 V621 V630 V634(0) \
V640(0) V657 V707 V763 V775 V778 V779 V780 V781 V782 V783 V784 V787 \
V789 V798(0) V801 V802(0) V821(0) V826(0) V966 V986 V1213(11) \
V1213(10) V1213(9) V1213(8) V1213(7) V1213(6) V1213(5) V1213(4) \
V1213(3) V1213(2) V1213(1) V1213(0) V1243(9) V1243(8) V1243(7) \
V1243(6) V1243(5) V1243(4) V1243(3) V1243(2) V1243(1) V1243(0) \
V1256 V1257 V1258 V1259 V1260 V1261 V1262 V1263 V1264 V1265 V1266 \
V1267 V1274(0) V1281(0) V1297(4) V1297(3) V1297(2) V1297(1) \
V1297(0) V1365 V1375 V1378 V1380 V1382 V1384 V1386 V1387 V1392(0) \
V1423 V1426 V1428 V1429 V1431 V1432 V1439(0) V1440(0) V1451(0) \
V1459(0) V1467(0) V1470 V1480(0) V1481(0) V1492(0) V1495(0) \
V1512(3) V1512(2) V1512(1) V1536(0) V1537 V1539 V1552(1) V1552(0) \
V1613(0) V1613(1) V1620(0) V1629(0) V1645(0) V1652(0) V1669 \
V1671(0) V1679(0) V1693(0) V1709(4) V1709(3) V1709(2) V1709(1) \
V1709(0) V1717(0) V1719 V1726(0) V1736 V1741(0) V1745(0) V1757(0) \
V1758(0) V1759(0) V1760(0) V1771(1) V1771(0) V1781(1) V1781(0) \
V1829(9) V1829(8) V1829(7) V1829(6) V1829(5) V1829(4) V1829(3) \
V1829(2) V1829(1) V1829(0) V1832 V1833(0) V1863(0) V1864(0) \
V1896(0) V1897(0) V1898(0) V1899(0) V1900(0) V1901(0) V1921(5) \
V1921(4) V1921(3) V1921(2) V1921(1) V1921(0) V1953(1) V1953(7) \
V1953(6) V1953(5) V1953(4) V1953(3) V1953(2) V1953(0) V1960(1) \
V1960(0) V1968(0) V1992(1) V1992(0) V650 V651 V652 V653 V654 V655 \
V656 V1370 V1371 V1372 V1373 V1374
.names V1243(0) V321(2)
0 1
.names V451 V322
0 1
.names V322 V32(0) V323
11 1
.names V446 V327
0 1
.names V324 V328
0 1
.names V328 V32(1) V327 V329
111 1
.names V441 V330
0 1
.names V325 V331
0 1
.names V331 V330 V32(2) V328 V332
1111 1
.names V437 V333
0 1
.names V326 V334
0 1
.names V334 V328 V32(3) V333 V331 V335
11111 1
.names V335 V329 V323 V332 V336(0)
---1 1
--1- 1
-1-- 1
1--- 1
.names V1476 V337
0 1
.names V695 V338
0 1
.names V338 V56(0) V744 V337 V339
1111 1
.names V802(0) V721 V340
11 1
.names V2011(0) V802(0) V341
11 1
.names V339 V342(0)
0 1
.names V802(0) V343
0 1
.names V289(0) V344
0 1
.names V56(0) V759(0) V345
11 1
.names V345 V346(0)
0 1
.names V434(0) V1685(0) V347
11 1
.names V1685(0) V937(0) V947(0) V348
111 1
.names V1685(0) V917(0) V927(0) V349
111 1
.names V1685(0) V897(0) V907(0) V350
111 1
.names V1685(0) V877(0) V887(0) V351
111 1
.names V1685(0) V857(0) V867(0) V352
111 1
.names V1685(0) V837(0) V847(0) V353
111 1
.names V1685(0) V958(0) V959(0) V354
111 1
.names V1685(0) V956(0) V957(0) V355
111 1
.names V347 V917(0) V877(0) V837(0) V956(0) V958(0) V857(0) V897(0) \
V937(0) V356
111111111 1
.names V1685(0) V927(0) V887(0) V847(0) V957(0) V959(0) V867(0) \
V907(0) V947(0) V357
111111111 1
.names V947(0) V927(0) V907(0) V887(0) V877(0) V897(0) V917(0) \
V937(0) V358
11111111 1
.names V947(0) V927(0) V867(0) V847(0) V837(0) V857(0) V917(0) \
V937(0) V359
11111111 1
.names V947(0) V907(0) V867(0) V959(0) V958(0) V857(0) V897(0) \
V937(0) V360
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.names V348 V361(0)
0 1
.names V349 V362(0)
0 1
.names V350 V363(0)
0 1
.names V351 V364(0)
0 1
.names V352 V365(0)
0 1
.names V353 V366(0)
0 1
.names V354 V367(0)
0 1
.names V355 V368(0)
0 1
.names V358 V369(0)
0 1
.names V359 V370(0)
0 1
.names V360 V371(0)
0 1
.names V658(0) V10(0) V372
11 1
.names V13(0) V10(0) V373
11 1
.names V372 V374(0)
0 1
.names V789 V1263 V1259 V1387 V780 V778 V787 V1431 V1258 V1425 V1423 \
V375(0)
----------1 1
---------1- 1
--------1-- 1
-------1--- 1
------1---- 1
-----1----- 1
----1------ 1
---1------- 1
--1-------- 1
-1--------- 1
1---------- 1
.names V35(0) V697 V376(0)
-1 1
1- 1
.names V203(0) V376(0) V377
11 1
.names V701 V766 V378(0)
-1 1
1- 1
.names V802(0) V378(0) V379
11 1
.names V721 V379 V380(0)
-1 1
1- 1
.names V380(0) V381(0)
0 1
.names V741 V740 V382(0)
-1 1
1- 1
.names V362(0) V361(0) V383(0)
-1 1
1- 1
.names V364(0) V363(0) V384(0)
-1 1
1- 1
.names V366(0) V365(0) V385(0)
-1 1
1- 1
.names V368(0) V367(0) V386(0)
-1 1
1- 1
.names V383(0) V1838 V387
11 1
.names V384(0) V1839 V388
11 1
.names V385(0) V1840 V389
11 1
.names V386(0) V288(6) V288(7) V390
111 1
.names V390 V388 V387 V389 V391(0)
---1 1
--1- 1
-1-- 1
1--- 1
.names V394(0) V391(0) V1243(8) V1243(7) V1243(9) V1719 V392
111111 1
.names V1572 V392 V1571 V393(0)
--1 1
-1- 1
1-- 1
.names V248(0) V394(0)
0 1
.names V1719 V248(0) V395
11 1
.names V423(0) V395 V396(0)
-1 1
1- 1
.names V431 V426 V396(0) V430 V1577 V1575 V1573 V1574 V1576 V1578 \
V397
1111111111 1
.names V397 V398(0)
0 1
.names V249(0) V399(0)
0 1
.names V733(0) V730(0) V400
11 1
.names V687 V729(0) V401
11 1
.names V62(0) V401 V402
11 1
.names V1757(0) V403
0 1
.names V728 V400 V404(0)
-1 1
1- 1
.names V731(0) V515 V734 V405(0)
--1 1
-1- 1
1-- 1
.names V56(0) V404(0) V406
11 1
.names V59(0) V405(0) V407
11 1
.names V402 V406 V407 V408(0)
--1 1
-1- 1
1-- 1
.names V408(0) V338 V403 V409
111 1
.names V409 V410(0)
0 1
.names V729(0) V687 V411
11 1
.names V731(0) V1681(0) V710 V729(0) V721 V412(0)
----1 1
---1- 1
--1-- 1
-1--- 1
1---- 1
.names V404(0) V411 V502 V174(0) V413(0)
---1 1
--1- 1
-1-- 1
1--- 1
.names V405(0) V1681(0) V414(0)
-1 1
1- 1
.names V802(0) V412(0) V415
11 1
.names V56(0) V413(0) V416
11 1
.names V59(0) V414(0) V417
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.names V215(0) V418
0 1
.names V338 V66(0) V763 V418 V419
1111 1
.names V70(0) V1681(0) V420
11 1
.names V1446(0) V2011(0) V421
11 1
.names V802(0) V421 V422
11 1
.names V422 V1719 V419 V416 V415 V417 V402 V420 V423(0)
-------1 1
------1- 1
-----1-- 1
----1--- 1
---1---- 1
--1----- 1
-1------ 1
1------- 1
.names V687 V763 V424(0)
-1 1
1- 1
.names V802(0) V424(0) V425
11 1
.names V425 V426
0 1
.names V1643 V427
0 1
.names V1646 V428
0 1
.names V1491 V429
0 1
.names V43(0) V430
0 1
.names V214(0) V431
0 1
.names V431 V430 V1685(0) V429 V427 V403 V426 V337 V428 V423(0) \
V1577 V1575 V1573 V1574 V1576 V1578 V432
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.names V803(0) V749 V433
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.names V433 V434(0)
0 1
.names V630 V432 V435(0)
-1 1
1- 1
.names V37(0) V436(0)
0 1
.names V1850 V1298 V438
11 1
.names V1852 V438 V442
11 1
.names V1302 V438 V443
11 1
.names V1302 V1852 V444
11 1
.names V444 V442 V443 V445(0)
--1 1
-1- 1
1-- 1
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examples/s38584.bench 0 → 100644
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examples/s444.blif 0 → 100644
.model iscas\s444.bench
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.end
src/base/abc/abcCheck.c
...@@ -54,7 +54,7 @@ static bool Abc_NtkCompareLatches( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fCo ...@@ -54,7 +54,7 @@ static bool Abc_NtkCompareLatches( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fCo
***********************************************************************/ ***********************************************************************/
bool Abc_NtkCheck( Abc_Ntk_t * pNtk ) bool Abc_NtkCheck( Abc_Ntk_t * pNtk )
{ {
return !Abc_FrameIsFlagEnabled( "check" ) || Abc_NtkDoCheck( pNtk ); return !Abc_FrameIsFlagEnabled( "check" ) || Abc_NtkDoCheck( pNtk );
} }
......
src/base/abci/abc.c
...@@ -2062,7 +2062,7 @@ int Abc_CommandRewrite( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -2062,7 +2062,7 @@ int Abc_CommandRewrite( Abc_Frame_t * pAbc, int argc, char ** argv )
pErr = Abc_FrameReadErr(pAbc); pErr = Abc_FrameReadErr(pAbc);
// set defaults // set defaults
fUpdateLevel = 0; fUpdateLevel = 1;
fPrecompute = 0; fPrecompute = 0;
fUseZeros = 0; fUseZeros = 0;
fVerbose = 0; fVerbose = 0;
...@@ -5257,7 +5257,7 @@ int Abc_CommandSeqFpga( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -5257,7 +5257,7 @@ int Abc_CommandSeqFpga( Abc_Frame_t * pAbc, int argc, char ** argv )
pNtkRes = Seq_NtkFpgaMapRetime( pNtkNew, nMaxIters, fVerbose ); pNtkRes = Seq_NtkFpgaMapRetime( pNtkNew, nMaxIters, fVerbose );
if ( pNtkRes == NULL ) if ( pNtkRes == NULL )
{ {
fprintf( pErr, "Sequential FPGA mapping has failed.\n" ); // fprintf( pErr, "Sequential FPGA mapping has failed.\n" );
Abc_NtkDelete( pNtkNew ); Abc_NtkDelete( pNtkNew );
return 0; return 0;
} }
...@@ -5381,7 +5381,7 @@ int Abc_CommandSeqMap( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -5381,7 +5381,7 @@ int Abc_CommandSeqMap( Abc_Frame_t * pAbc, int argc, char ** argv )
pNtkRes = Seq_MapRetime( pNtkNew, nMaxIters, fVerbose ); pNtkRes = Seq_MapRetime( pNtkNew, nMaxIters, fVerbose );
if ( pNtkRes == NULL ) if ( pNtkRes == NULL )
{ {
fprintf( pErr, "Sequential FPGA mapping has failed.\n" ); // fprintf( pErr, "Sequential FPGA mapping has failed.\n" );
Abc_NtkDelete( pNtkNew ); Abc_NtkDelete( pNtkNew );
return 0; return 0;
} }
......
src/base/abci/abcNtbdd.c
...@@ -343,7 +343,7 @@ DdNode * Abc_NodeGlobalBdds_rec( DdManager * dd, Abc_Obj_t * pNode ) ...@@ -343,7 +343,7 @@ DdNode * Abc_NodeGlobalBdds_rec( DdManager * dd, Abc_Obj_t * pNode )
{ {
DdNode * bFunc, * bFunc0, * bFunc1; DdNode * bFunc, * bFunc0, * bFunc1;
assert( !Abc_ObjIsComplement(pNode) ); assert( !Abc_ObjIsComplement(pNode) );
if ( Cudd_ReadKeys(dd) > 500000 ) if ( Cudd_ReadKeys(dd) > 5000000 )
return NULL; return NULL;
// if the result is available return // if the result is available return
if ( pNode->pCopy ) if ( pNode->pCopy )
......
src/base/seq/seqAigIter.c
...@@ -48,7 +48,7 @@ int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose ) ...@@ -48,7 +48,7 @@ int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
{ {
Abc_Seq_t * p = pNtk->pManFunc; Abc_Seq_t * p = pNtk->pManFunc;
Abc_Obj_t * pNode; Abc_Obj_t * pNode;
int i, FiMax, FiBest, RetValue, clk, clkIter; int i, FiMax, RetValue, clk, clkIter;
char NodeLag; char NodeLag;
assert( Abc_NtkIsSeq( pNtk ) ); assert( Abc_NtkIsSeq( pNtk ) );
...@@ -68,11 +68,11 @@ int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose ) ...@@ -68,11 +68,11 @@ int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
// search for the optimal clock period between 0 and nLevelMax // search for the optimal clock period between 0 and nLevelMax
clk = clock(); clk = clock();
FiBest = Seq_RetimeSearch_rec( pNtk, 0, FiMax, fVerbose ); p->FiBestInt = Seq_RetimeSearch_rec( pNtk, 0, FiMax, fVerbose );
clkIter = clock() - clk; clkIter = clock() - clk;
// recompute the best l-values // recompute the best l-values
RetValue = Seq_RetimeForPeriod( pNtk, FiBest, fVerbose ); RetValue = Seq_RetimeForPeriod( pNtk, p->FiBestInt, fVerbose );
assert( RetValue ); assert( RetValue );
// fix the problem with non-converged delays // fix the problem with non-converged delays
...@@ -84,13 +84,14 @@ clkIter = clock() - clk; ...@@ -84,13 +84,14 @@ clkIter = clock() - clk;
Vec_StrFill( p->vLags, p->nSize, 0 ); Vec_StrFill( p->vLags, p->nSize, 0 );
Abc_AigForEachAnd( pNtk, pNode, i ) Abc_AigForEachAnd( pNtk, pNode, i )
{ {
NodeLag = Seq_NodeComputeLag( Seq_NodeGetLValue(pNode), FiBest ); NodeLag = Seq_NodeComputeLag( Seq_NodeGetLValue(pNode), p->FiBestInt );
Seq_NodeSetLag( pNode, NodeLag ); Seq_NodeSetLag( pNode, NodeLag );
} }
// print the result // print the result
if ( fVerbose ) if ( fVerbose )
printf( "The best clock period is %3d.\n", FiBest ); printf( "The best clock period is %3d.\n", p->FiBestInt );
/* /*
printf( "lvalues and lags : " ); printf( "lvalues and lags : " );
Abc_AigForEachAnd( pNtk, pNode, i ) Abc_AigForEachAnd( pNtk, pNode, i )
......
src/base/seq/seqFpgaCore.c
...@@ -66,7 +66,8 @@ Abc_Ntk_t * Seq_NtkFpgaMapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose ...@@ -66,7 +66,8 @@ Abc_Ntk_t * Seq_NtkFpgaMapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose
return NULL; return NULL;
if ( RetValue = Abc_NtkGetChoiceNum(pNtk) ) if ( RetValue = Abc_NtkGetChoiceNum(pNtk) )
{ {
printf( "The network has %d choices. Deriving the resulting network is skipped.\n", RetValue ); printf( "The network has %d choices. The resulting network is not derived (this is temporary).\n", RetValue );
printf( "The mininum clock period computed is %d.\n", p->FiBestInt );
return NULL; return NULL;
} }
......
src/base/seq/seqInt.h
...@@ -59,6 +59,8 @@ struct Abc_Seq_t_ ...@@ -59,6 +59,8 @@ struct Abc_Seq_t_
float fEpsilon; // the accuracy for delay computation float fEpsilon; // the accuracy for delay computation
int fStandCells; // the flag denoting standard cell mapping int fStandCells; // the flag denoting standard cell mapping
int nMaxIters; // the max number of iterations int nMaxIters; // the max number of iterations
int FiBestInt; // the best clock period
float FiBestFloat; // the best clock period
// K-feasible cuts // K-feasible cuts
int nVarsMax; // the max cut size int nVarsMax; // the max cut size
Cut_Man_t * pCutMan; // cut manager Cut_Man_t * pCutMan; // cut manager
......
src/base/seq/seqMapCore.c
...@@ -78,10 +78,11 @@ Abc_Ntk_t * Seq_MapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose ) ...@@ -78,10 +78,11 @@ Abc_Ntk_t * Seq_MapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose )
return NULL; return NULL;
if ( RetValue = Abc_NtkGetChoiceNum(pNtk) ) if ( RetValue = Abc_NtkGetChoiceNum(pNtk) )
{ {
printf( "The network has %d choices. Deriving the resulting network is skipped.\n", RetValue ); printf( "The network has %d choices. The resulting network is not derived (this is temporary).\n", RetValue );
printf( "The mininum clock period computed is %5.2f.\n", p->FiBestFloat );
return NULL; return NULL;
} }
return NULL; printf( "The resulting network is derived as BDD logic network (this is temporary).\n" );
// duplicate the nodes contained in multiple cuts // duplicate the nodes contained in multiple cuts
pNtkNew = Seq_NtkMapDup( pNtk ); pNtkNew = Seq_NtkMapDup( pNtk );
......
src/base/seq/seqMapIter.c
...@@ -53,7 +53,7 @@ int Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose ) ...@@ -53,7 +53,7 @@ int Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
Abc_Seq_t * p = pNtk->pManFunc; Abc_Seq_t * p = pNtk->pManFunc;
Cut_Params_t Params, * pParams = &Params; Cut_Params_t Params, * pParams = &Params;
Abc_Obj_t * pObj; Abc_Obj_t * pObj;
float TotalArea, FiBest; float TotalArea;
int i, clk; int i, clk;
// set defaults for cut computation // set defaults for cut computation
...@@ -80,8 +80,8 @@ p->timeCuts = clock() - clk; ...@@ -80,8 +80,8 @@ p->timeCuts = clock() - clk;
// compute the delays // compute the delays
clk = clock(); clk = clock();
FiBest = Seq_MapRetimeDelayLagsInternal( pNtk, fVerbose ); p->FiBestFloat = Seq_MapRetimeDelayLagsInternal( pNtk, fVerbose );
if ( FiBest == 0.0 ) if ( p->FiBestFloat == 0.0 )
return 0; return 0;
p->timeDelay = clock() - clk; p->timeDelay = clock() - clk;
/* /*
...@@ -89,7 +89,7 @@ p->timeDelay = clock() - clk; ...@@ -89,7 +89,7 @@ p->timeDelay = clock() - clk;
FILE * pTable; FILE * pTable;
pTable = fopen( "stats.txt", "a+" ); pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName ); fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%.2f ", FiBest ); fprintf( pTable, "%.2f ", p->FiBestFloat );
fprintf( pTable, "%.2f ", (float)(p->timeCuts)/(float)(CLOCKS_PER_SEC) ); fprintf( pTable, "%.2f ", (float)(p->timeCuts)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "%.2f ", (float)(p->timeDelay)/(float)(CLOCKS_PER_SEC) ); fprintf( pTable, "%.2f ", (float)(p->timeDelay)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "\n" ); fprintf( pTable, "\n" );
...@@ -105,7 +105,7 @@ p->timeDelay = clock() - clk; ...@@ -105,7 +105,7 @@ p->timeDelay = clock() - clk;
p->vMapCuts = Vec_VecAlloc( 1000 ); p->vMapCuts = Vec_VecAlloc( 1000 );
TotalArea = 0.0; TotalArea = 0.0;
Abc_NtkForEachPo( pNtk, pObj, i ) Abc_NtkForEachPo( pNtk, pObj, i )
TotalArea += Seq_MapCollectNode_rec( Abc_ObjChild0(pObj), FiBest, p->vMapAnds, p->vMapCuts ); TotalArea += Seq_MapCollectNode_rec( Abc_ObjChild0(pObj), p->FiBestFloat, p->vMapAnds, p->vMapCuts );
// clean the marks // clean the marks
Abc_NtkForEachObj( pNtk, pObj, i ) Abc_NtkForEachObj( pNtk, pObj, i )
...@@ -202,7 +202,7 @@ float Seq_MapRetimeDelayLagsInternal( Abc_Ntk_t * pNtk, int fVerbose ) ...@@ -202,7 +202,7 @@ float Seq_MapRetimeDelayLagsInternal( Abc_Ntk_t * pNtk, int fVerbose )
//printf( "\n\n" ); //printf( "\n\n" );
// print the result // print the result
// if ( fVerbose ) if ( fVerbose )
printf( "The best clock period after mapping/retiming is %6.2f.\n", FiBest ); printf( "The best clock period after mapping/retiming is %6.2f.\n", FiBest );
return FiBest; return FiBest;
} }
......
src/base/seq/seqRetCore.c
...@@ -62,8 +62,6 @@ Abc_Ntk_t * Seq_NtkRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fV ...@@ -62,8 +62,6 @@ Abc_Ntk_t * Seq_NtkRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fV
// find the best mapping and retiming // find the best mapping and retiming
if ( !Seq_NtkRetimeDelayLags( pNtk, pNtkSeq, fVerbose ) ) if ( !Seq_NtkRetimeDelayLags( pNtk, pNtkSeq, fVerbose ) )
return NULL; return NULL;
return NULL;
// implement the retiming // implement the retiming
RetValue = Seq_NtkImplementRetiming( pNtkSeq, p->vLags, fVerbose ); RetValue = Seq_NtkImplementRetiming( pNtkSeq, p->vLags, fVerbose );
......
src/base/seq/seqRetIter.c
...@@ -53,7 +53,7 @@ int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose ...@@ -53,7 +53,7 @@ int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose
{ {
Abc_Seq_t * p = pNtk->pManFunc; Abc_Seq_t * p = pNtk->pManFunc;
Abc_Obj_t * pNode; Abc_Obj_t * pNode;
float FiMax, FiBest, Delta; float FiMax, Delta;
int i, RetValue; int i, RetValue;
char NodeLag; char NodeLag;
...@@ -99,10 +99,10 @@ int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose ...@@ -99,10 +99,10 @@ int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose
} }
// search for the optimal clock period between 0 and nLevelMax // search for the optimal clock period between 0 and nLevelMax
FiBest = Seq_NtkMappingSearch_rec( pNtk, 0.0, FiMax, Delta, fVerbose ); p->FiBestFloat = Seq_NtkMappingSearch_rec( pNtk, 0.0, FiMax, Delta, fVerbose );
// recompute the best l-values // recompute the best l-values
RetValue = Seq_NtkMappingForPeriod( pNtk, FiBest, fVerbose ); RetValue = Seq_NtkMappingForPeriod( pNtk, p->FiBestFloat, fVerbose );
assert( RetValue ); assert( RetValue );
// fix the problem with non-converged delays // fix the problem with non-converged delays
...@@ -127,7 +127,7 @@ int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose ...@@ -127,7 +127,7 @@ int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose
Seq_NodeSetLag( pNode, 0 ); Seq_NodeSetLag( pNode, 0 );
continue; continue;
} }
NodeLag = Seq_NodeComputeLagFloat( Seq_NodeGetLValueP(pNode), FiBest ); NodeLag = Seq_NodeComputeLagFloat( Seq_NodeGetLValueP(pNode), p->FiBestFloat );
Seq_NodeRetimeSetLag_rec( pNode, NodeLag ); Seq_NodeRetimeSetLag_rec( pNode, NodeLag );
} }
// unmark the nodes // unmark the nodes
...@@ -136,7 +136,7 @@ int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose ...@@ -136,7 +136,7 @@ int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose
// print the result // print the result
if ( fVerbose ) if ( fVerbose )
printf( "The best clock period is %6.2f.\n", FiBest ); printf( "The best clock period is %6.2f.\n", p->FiBestFloat );
/* /*
{ {
FILE * pTable; FILE * pTable;
......
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