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abc
Commit 53c4fffa by Alan Mishchenko
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Version abc51130

parent 5e0f86a2
Showing with 465 additions and 107 deletions
abc.opt
No preview for this file type
abc.plg
......@@ -6,30 +6,13 @@
--------------------Configuration: abc - Win32 Release--------------------
</h3>
<h3>Command Lines</h3>
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1FA3.tmp" with contents
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DA.tmp" with contents
[
/nologo /ML /W3 /GX /O2 /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\seq" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\sim" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\pga" /I "src\map\mapper" /I "src\map\mapp" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\npn" /I "src\misc\vec" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D "HAVE_ASSERT_H" /FR"Release/" /Fp"Release/abc.pch" /YX /Fo"Release/" /Fd"Release/" /FD /c
"C:\_projects\abc\src\base\abc\abcFanio.c"
"C:\_projects\abc\src\base\abc\abcNtk.c"
"C:\_projects\abc\src\base\abci\abcCut.c"
"C:\_projects\abc\src\base\seq\seqAigCore.c"
"C:\_projects\abc\src\base\seq\seqAigIter.c"
"C:\_projects\abc\src\base\seq\seqCreate.c"
"C:\_projects\abc\src\base\seq\seqFpgaCore.c"
"C:\_projects\abc\src\base\seq\seqFpgaIter.c"
"C:\_projects\abc\src\base\seq\seqLatch.c"
"C:\_projects\abc\src\base\seq\seqMan.c"
"C:\_projects\abc\src\base\seq\seqMapCore.c"
"C:\_projects\abc\src\base\seq\seqMapIter.c"
"C:\_projects\abc\src\base\seq\seqRetCore.c"
"C:\_projects\abc\src\base\seq\seqRetIter.c"
"C:\_projects\abc\src\base\seq\seqShare.c"
"C:\_projects\abc\src\base\seq\seqUtil.c"
"C:\_projects\abc\src\base\io\ioWriteDot.c"
"C:\_projects\abc\src\base\io\ioWriteList.c"
]
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1FA3.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1FA4.tmp" with contents
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DA.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DB.tmp" with contents
[
kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /incremental:no /pdb:"Release/abc.pdb" /machine:I386 /out:"_TEST/abc.exe"
.\Release\abcAig.obj
......@@ -348,29 +331,12 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32
.\Release\mvcSort.obj
.\Release\mvcUtils.obj
]
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1FA4.tmp"
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DB.tmp"
<h3>Output Window</h3>
Compiling...
abcFanio.c
abcNtk.c
abcCut.c
seqAigCore.c
seqAigIter.c
seqCreate.c
seqFpgaCore.c
seqFpgaIter.c
seqLatch.c
seqMan.c
seqMapCore.c
seqMapIter.c
seqRetCore.c
seqRetIter.c
seqShare.c
seqUtil.c
ioWriteDot.c
ioWriteList.c
Linking...
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1FA6.tmp" with contents
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DD.tmp" with contents
[
/nologo /o"Release/abc.bsc"
.\Release\abcAig.sbr
......@@ -688,7 +654,7 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1FA6.tmp" with cont
.\Release\mvcPrint.sbr
.\Release\mvcSort.sbr
.\Release\mvcUtils.sbr]
Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1FA6.tmp"
Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP3DD.tmp"
Creating browse info file...
<h3>Output Window</h3>
......
abc.rc
......@@ -53,7 +53,8 @@ alias sa set autoexec ps
alias so source -x
alias st strash
alias sw sweep
alias ssw seq_sweep
alias ssw ssweep
alias scl scleanup
alias u undo
alias wb write_blif
alias wl write_blif
......@@ -71,6 +72,6 @@ alias resynl "b; rw -l; rwz -l; b; rwz -l; b"
alias resyn2 "b; rw; rf; b; rw; rwz; b; rfz; rwz; b"
alias resyn2l "b; rw -l; rf -l; b; rw -l; rwz -l; b; rfz -l; rwz -l; b"
alias thin "rwz; rfz; b; ps"
alias choice "fsto; resynl; fsto; resyn2l; fsto; fres"
alias t "r iscas2/s3330_edf.blif; st; seq; smap"
alias choice "fraig_store; resynl; fraig_store; resyn2l; fraig_store; fraig_restore"
alias t "r step_opt.blif; b; seq; show_aig; sfpga -v"
abclib.dsp
......@@ -279,6 +279,14 @@ SOURCE=.\src\base\seq\seq.h
# End Source File
# Begin Source File
SOURCE=.\src\base\seq\seqAigCore.c
# End Source File
# Begin Source File
SOURCE=.\src\base\seq\seqAigIter.c
# End Source File
# Begin Source File
SOURCE=.\src\base\seq\seqCreate.c
# End Source File
# Begin Source File
......
abclib.opt
No preview for this file type
src/base/abc/abc.h
......@@ -632,8 +632,9 @@ extern Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool
extern Abc_Obj_t * Abc_NodeStrash( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode );
extern int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2 );
/*=== abcSweep.c ==========================================================*/
extern int Abc_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose );
extern int Abc_NtkSweep( Abc_Ntk_t * pNtk, int fVerbose );
extern int Abc_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose );
extern int Abc_NtkReduceNodes( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes );
/*=== abcTiming.c ==========================================================*/
extern Abc_Time_t * Abc_NodeReadArrival( Abc_Obj_t * pNode );
extern Abc_Time_t * Abc_NodeReadRequired( Abc_Obj_t * pNode );
......
src/base/abc/abcNetlist.c
......@@ -25,6 +25,8 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static void Abc_NtkAddPoBuffers( Abc_Ntk_t * pNtk );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
......@@ -280,7 +282,17 @@ Abc_Ntk_t * Abc_NtkAigToLogicSop( Abc_Ntk_t * pNtk )
else
Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
// connect the COs
Abc_NtkFinalize( pNtk, pNtkNew );
// Abc_NtkFinalize( pNtk, pNtkNew );
Abc_NtkForEachCo( pNtk, pObj, i )
{
pFanin = Abc_ObjFanin0(pObj);
if ( pFanin->pCopy->pCopy )
pNodeNew = Abc_ObjNotCond(pFanin->pCopy->pCopy, Abc_ObjFaninC0(pObj));
else
pNodeNew = Abc_ObjNotCond(pFanin->pCopy, Abc_ObjFaninC0(pObj));
Abc_ObjAddFanin( pObj->pCopy, pNodeNew );
}
// fix the problem with complemented and duplicated CO edges
Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
// duplicate the EXDC Ntk
......@@ -364,6 +376,31 @@ Abc_Ntk_t * Abc_NtkAigToLogicSopBench( Abc_Ntk_t * pNtk )
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Adds buffers for each PO.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkAddPoBuffers( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj, * pFanin, * pFaninNew;
int i;
assert( Abc_NtkIsStrash(pNtk) );
Abc_NtkForEachPo( pNtk, pObj, i )
{
pFanin = Abc_ObjChild0(pObj);
pFaninNew = Abc_NtkCreateNode(pNtk);
Abc_ObjAddFanin( pFaninNew, pFanin );
Abc_ObjPatchFanin( pObj, pFanin, pFaninNew );
}
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/base/abci/abc.c
......@@ -102,6 +102,7 @@ static int Abc_CommandRetime ( Abc_Frame_t * pAbc, int argc, char ** argv
static int Abc_CommandSeqFpga ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSeqMap ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSeqSweep ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSeqCleanup ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandCec ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSec ( Abc_Frame_t * pAbc, int argc, char ** argv );
......@@ -195,7 +196,8 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "Sequential", "retime", Abc_CommandRetime, 1 );
Cmd_CommandAdd( pAbc, "Sequential", "sfpga", Abc_CommandSeqFpga, 1 );
Cmd_CommandAdd( pAbc, "Sequential", "smap", Abc_CommandSeqMap, 1 );
Cmd_CommandAdd( pAbc, "Sequential", "seq_sweep", Abc_CommandSeqSweep, 1 );
Cmd_CommandAdd( pAbc, "Sequential", "ssweep", Abc_CommandSeqSweep, 1 );
Cmd_CommandAdd( pAbc, "Sequential", "scleanup", Abc_CommandSeqCleanup, 1 );
Cmd_CommandAdd( pAbc, "Verification", "cec", Abc_CommandCec, 0 );
Cmd_CommandAdd( pAbc, "Verification", "sec", Abc_CommandSec, 0 );
......@@ -1299,7 +1301,7 @@ int Abc_CommandShowNtk( Abc_Frame_t * pAbc, int argc, char ** argv )
{
switch ( c )
{
case 'n':
case 'g':
fGateNames ^= 1;
break;
default:
......@@ -1716,7 +1718,7 @@ int Abc_CommandCleanup( Abc_Frame_t * pAbc, int argc, char ** argv )
return 1;
}
// modify the current network
Abc_NtkCleanup( pNtk, 0 );
Abc_NtkCleanup( pNtk, 1 );
return 0;
usage:
......@@ -5132,7 +5134,7 @@ int Abc_CommandRetime( Abc_Frame_t * pAbc, int argc, char ** argv )
if ( pNtkRes == NULL )
{
fprintf( pErr, "Retiming has failed.\n" );
return 1;
return 0;
}
// replace the current network
Abc_FrameReplaceCurrentNetwork( pAbc, pNtkRes );
......@@ -5208,12 +5210,14 @@ int Abc_CommandSeqFpga( Abc_Frame_t * pAbc, int argc, char ** argv )
if ( Abc_NtkHasAig(pNtk) )
{
/*
// quit if there are choice nodes
if ( Abc_NtkGetChoiceNum(pNtk) )
{
fprintf( pErr, "Currently cannot map/retime networks with choice nodes.\n" );
return 0;
}
*/
if ( Abc_NtkIsStrash(pNtk) )
pNtkNew = Abc_NtkAigToSeq(pNtk);
else
......@@ -5330,12 +5334,14 @@ int Abc_CommandSeqMap( Abc_Frame_t * pAbc, int argc, char ** argv )
if ( Abc_NtkHasAig(pNtk) )
{
/*
// quit if there are choice nodes
if ( Abc_NtkGetChoiceNum(pNtk) )
{
fprintf( pErr, "Currently cannot map/retime networks with choice nodes.\n" );
return 0;
}
*/
if ( Abc_NtkIsStrash(pNtk) )
pNtkNew = Abc_NtkAigToSeq(pNtk);
else
......@@ -5377,7 +5383,7 @@ int Abc_CommandSeqMap( Abc_Frame_t * pAbc, int argc, char ** argv )
{
fprintf( pErr, "Sequential FPGA mapping has failed.\n" );
Abc_NtkDelete( pNtkNew );
return 1;
return 0;
}
Abc_NtkDelete( pNtkNew );
......@@ -5497,7 +5503,7 @@ int Abc_CommandSeqSweep( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
usage:
fprintf( pErr, "usage: seq_sweep [-F num] [-eivh]\n" );
fprintf( pErr, "usage: ssweep [-F num] [-eivh]\n" );
fprintf( pErr, "\t performs sequential sweep using van Eijk's method\n" );
fprintf( pErr, "\t-F num : number of time frames in the base case [default = %d]\n", nFrames );
fprintf( pErr, "\t-e : toggle writing EXDC network [default = %s]\n", fExdc? "yes": "no" );
......@@ -5507,6 +5513,60 @@ usage:
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_CommandSeqCleanup( Abc_Frame_t * pAbc, int argc, char ** argv )
{
FILE * pOut, * pErr;
Abc_Ntk_t * pNtk;
int c;
pNtk = Abc_FrameReadNet(pAbc);
pOut = Abc_FrameReadOut(pAbc);
pErr = Abc_FrameReadErr(pAbc);
// set defaults
util_getopt_reset();
while ( ( c = util_getopt( argc, argv, "h" ) ) != EOF )
{
switch ( c )
{
case 'h':
goto usage;
default:
goto usage;
}
}
if ( pNtk == NULL )
{
fprintf( pErr, "Empty network.\n" );
return 1;
}
if ( !Abc_NtkIsSeq(pNtk) )
{
fprintf( pErr, "Only works for sequential AIGs.\n" );
return 1;
}
// modify the current network
Seq_NtkCleanup( pNtk, 1 );
return 0;
usage:
fprintf( pErr, "usage: scleanup [-h]\n" );
fprintf( pErr, "\t performs sequential cleanup\n" );
fprintf( pErr, "\t-h : print the command usage\n");
return 1;
}
/**Function*************************************************************
......
src/base/abci/abcPrint.c
......@@ -96,6 +96,57 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
fprintf( pFile, " lev = %3d", Abc_NtkGetLevelNum(pNtk) );
fprintf( pFile, "\n" );
// print the statistic into a file
/*
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%4d ", Abc_NtkPiNum(pNtk) );
fprintf( pTable, "%4d ", Abc_NtkPoNum(pNtk) );
// fprintf( pTable, "%4d ", Abc_NtkLatchNum(pNtk) );
fprintf( pTable, "%6d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%6d ", Abc_AigGetLevelNum(pNtk) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
// print the statistic into a file
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pSpec );
fprintf( pTable, "%.0f ", Abc_NtkGetMappedArea(pNtk) );
fprintf( pTable, "%.2f ", Abc_NtkDelayTrace(pNtk) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
// print the statistic into a file
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%d ", Abc_AigGetLevelNum(pNtk) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
// print the statistic into a file
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", Abc_NtkLatchNum(pNtk) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
}
/**Function*************************************************************
......
src/base/abci/abcSweep.c
......@@ -447,17 +447,40 @@ int Abc_NodeDroppingCost( Abc_Obj_t * pNode )
int Abc_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose )
{
Vec_Ptr_t * vNodes;
Abc_Obj_t * pNode;
int i, Counter;
int Counter;
assert( !Abc_NtkHasAig(pNtk) );
// mark the nodes reachable from the POs
vNodes = Abc_NtkDfs( pNtk, 0 );
Counter = Abc_NtkReduceNodes( pNtk, vNodes );
if ( fVerbose )
printf( "Cleanup removed %d dangling nodes.\n", Counter );
Vec_PtrFree( vNodes );
return Counter;
}
/**Function*************************************************************
Synopsis [Preserves the nodes collected in the array.]
Description [Returns the number of nodes removed.]
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkReduceNodes( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes )
{
Abc_Obj_t * pNode;
int i, Counter;
assert( !Abc_NtkIsStrash(pNtk) );
// mark the nodes reachable from the POs
for ( i = 0; i < vNodes->nSize; i++ )
{
pNode = vNodes->pArray[i];
assert( Abc_ObjIsNode(pNode) );
pNode->fMarkA = 1;
}
Vec_PtrFree( vNodes );
// if it is an AIG, also mark the constant 1 node
if ( Abc_NtkConst1(pNtk) )
Abc_NtkConst1(pNtk)->fMarkA = 1;
......@@ -472,14 +495,9 @@ int Abc_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose )
// unmark the remaining nodes
Abc_NtkForEachNode( pNtk, pNode, i )
pNode->fMarkA = 0;
if ( fVerbose )
printf( "Cleanup removed %d dangling nodes.\n", Counter );
// check
if ( !Abc_NtkCheck( pNtk ) )
{
printf( "Abc_NtkCleanup: The network check has failed.\n" );
return -1;
}
return Counter;
}
......
src/base/seq/seq.h
......@@ -79,6 +79,8 @@ extern void Seq_NtkLatchGetInitNums( Abc_Ntk_t * pNtk, int * pInits )
extern int Seq_NtkLatchGetEqualFaninNum( Abc_Ntk_t * pNtk );
extern int Seq_NtkCountNodesAboveLimit( Abc_Ntk_t * pNtk, int Limit );
extern int Seq_MapComputeAreaFlows( Abc_Ntk_t * pNtk, int fVerbose );
extern Vec_Ptr_t * Seq_NtkReachNodes( Abc_Ntk_t * pNtk, int fFromPos );
extern int Seq_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose );
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
......
src/base/seq/seqAigCore.c
......@@ -73,7 +73,8 @@ void Seq_NtkSeqRetimeDelay( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int f
Seq_NtkLatchSetValues( pNtk, ABC_INIT_DC );
// get the retiming lags
p->nMaxIters = nMaxIters;
Seq_AigRetimeDelayLags( pNtk, fVerbose );
if ( !Seq_AigRetimeDelayLags( pNtk, fVerbose ) )
return;
// implement this retiming
RetValue = Seq_NtkImplementRetiming( pNtk, p->vLags, fVerbose );
if ( RetValue == 0 )
......
src/base/seq/seqAigIter.c
......@@ -44,11 +44,11 @@ static int Seq_RetimeNodeUpdateLValue( Abc_Obj_t * pObj, int Fi );
SeeAlso []
***********************************************************************/
void Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
{
Abc_Seq_t * p = pNtk->pManFunc;
Abc_Obj_t * pNode;
int i, FiMax, FiBest, RetValue;
int i, FiMax, FiBest, RetValue, clk, clkIter;
char NodeLag;
assert( Abc_NtkIsSeq( pNtk ) );
......@@ -57,15 +57,29 @@ void Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
FiMax = 2 + Seq_NtkLevelMax(pNtk);
// make sure this clock period is feasible
assert( Seq_RetimeForPeriod( pNtk, FiMax, fVerbose ) );
if ( !Seq_RetimeForPeriod( pNtk, FiMax, fVerbose ) )
{
Vec_StrFill( p->vLags, p->nSize, 0 );
printf( "Error: The upper bound on the clock period cannot be computed.\n" );
printf( "The reason for this error may be the presence in the circuit of logic\n" );
printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" );
return 0;
}
// search for the optimal clock period between 0 and nLevelMax
clk = clock();
FiBest = Seq_RetimeSearch_rec( pNtk, 0, FiMax, fVerbose );
clkIter = clock() - clk;
// recompute the best l-values
RetValue = Seq_RetimeForPeriod( pNtk, FiBest, fVerbose );
assert( RetValue );
// fix the problem with non-converged delays
Abc_AigForEachAnd( pNtk, pNode, i )
if ( Seq_NodeGetLValue(pNode) < -ABC_INFINITY/2 )
Seq_NodeSetLValue( pNode, 0 );
// write the retiming lags
Vec_StrFill( p->vLags, p->nSize, 0 );
Abc_AigForEachAnd( pNtk, pNode, i )
......@@ -73,39 +87,39 @@ void Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
NodeLag = Seq_NodeComputeLag( Seq_NodeGetLValue(pNode), FiBest );
Seq_NodeSetLag( pNode, NodeLag );
}
/*
{
Abc_Obj_t * pFanin, * pFanout;
pNode = Abc_NtkObj( pNtk, 823 );
printf( "Node %d. Lag = %d. LValue = %d. Latches = (%d,%d) (%d,%d).\n", pNode->Id, Seq_NodeGetLag(pNode), Seq_NodeGetLValue(pNode),
Seq_ObjFaninL0(pNode), Seq_ObjFaninL1(pNode), Seq_ObjFanoutL(pNode, Abc_NtkObj(pNtk, 826)), Seq_ObjFanoutL(pNode, Abc_NtkObj(pNtk, 1210)) );
pFanin = Abc_ObjFanin0( pNode );
printf( "Fanin %d. Lag = %d. LValue = %d. Latches = (%d,%d)\n", pFanin->Id, Seq_NodeGetLag(pFanin), Seq_NodeGetLValue(pFanin),
Seq_ObjFaninL0(pFanin), Seq_ObjFaninL1(pFanin) );
pFanin = Abc_ObjFanin1( pNode );
printf( "Fanin %d. Lag = %d. LValue = %d.\n", pFanin->Id, Seq_NodeGetLag(pFanin), Seq_NodeGetLValue(pFanin) );
Abc_ObjForEachFanout( pNode, pFanout, i )
printf( "Fanout %d. Lag = %d. LValue = %d.\n", pFanout->Id, Seq_NodeGetLag(pFanout), Seq_NodeGetLValue(pFanout) );
Abc_ObjForEachFanout( Abc_ObjFanin0(pNode), pFanout, i )
printf( "Fanout %d. Lag = %d. LValue = %d.\n", pFanout->Id, Seq_NodeGetLag(pFanout), Seq_NodeGetLValue(pFanout) );
}
*/
// print the result
if ( fVerbose )
printf( "The best clock period is %3d.\n", FiBest );
/*
printf( "LValues : " );
printf( "lvalues and lags : " );
Abc_AigForEachAnd( pNtk, pNode, i )
printf( "%d=%d ", i, Seq_NodeGetLValue(pNode) );
printf( "\n" );
printf( "Lags : " );
Abc_AigForEachAnd( pNtk, pNode, i )
if ( Vec_StrEntry(p->vLags,i) != 0 )
printf( "%d=%d(%d)(%d) ", i, Vec_StrEntry(p->vLags,i), Seq_NodeGetLValue(pNode), Seq_NodeGetLValue(pNode) - FiBest * Vec_StrEntry(p->vLags,i) );
printf( "%d=%d(%d) ", pNode->Id, Seq_NodeGetLValue(pNode), Seq_NodeGetLag(pNode) );
printf( "\n" );
*/
/*
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", FiBest );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%.2f ", (float)(p->timeCuts)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "%.2f ", (float)(clkIter)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
return 1;
}
/**Function*************************************************************
......@@ -203,6 +217,14 @@ int Seq_RetimeForPeriod( Abc_Ntk_t * pNtk, int Fi, int fVerbose )
else
printf( "Period = %3d. Iterations = %3d. Updates = %10d. Feasible\n", Fi, c, Counter );
}
/*
// check if any AND gates have infinite delay
Counter = 0;
Abc_AigForEachAnd( pNtk, pObj, i )
Counter += (Seq_NodeGetLValue(pObj) < -ABC_INFINITY/2);
if ( Counter > 0 )
printf( "Warning: %d internal nodes have wrong l-values!\n", Counter );
*/
return RetValue != SEQ_UPDATE_FAIL;
}
......
src/base/seq/seqFpgaCore.c
......@@ -62,7 +62,8 @@ Abc_Ntk_t * Seq_NtkFpgaMapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose
p->nMaxIters = nMaxIters;
// find the best mapping and retiming for all nodes (p->vLValues, p->vBestCuts, p->vLags)
Seq_FpgaMappingDelays( pNtk, fVerbose );
if ( !Seq_FpgaMappingDelays( pNtk, fVerbose ) )
return NULL;
if ( RetValue = Abc_NtkGetChoiceNum(pNtk) )
{
printf( "The network has %d choices. Deriving the resulting network is skipped.\n", RetValue );
......
src/base/seq/seqFpgaIter.c
......@@ -47,7 +47,7 @@ extern Cut_Man_t * Abc_NtkCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams );
SeeAlso []
***********************************************************************/
void Seq_FpgaMappingDelays( Abc_Ntk_t * pNtk, int fVerbose )
int Seq_FpgaMappingDelays( Abc_Ntk_t * pNtk, int fVerbose )
{
Abc_Seq_t * p = pNtk->pManFunc;
Cut_Params_t Params, * pParams = &Params;
......@@ -78,8 +78,9 @@ p->timeCuts = clock() - clk;
// compute the delays
clk = clock();
Seq_AigRetimeDelayLags( pNtk, fVerbose );
p->timeDelay = clock() - clk;
if ( !Seq_AigRetimeDelayLags( pNtk, fVerbose ) )
return 0;
p->timeDelay = clock() - clk;
// collect the nodes and cuts used in the mapping
p->vMapAnds = Vec_PtrAlloc( 1000 );
......@@ -94,6 +95,7 @@ p->timeDelay = clock() - clk;
// remove the cuts
Cut_ManStop( p->pCutMan );
p->pCutMan = NULL;
return 1;
}
/**Function*************************************************************
......@@ -161,7 +163,7 @@ Cut_Cut_t * Seq_FpgaMappingSelectCut( Abc_Obj_t * pAnd )
for ( pCut = pList->pNext; pCut; pCut = pCut->pNext )
{
ArrivalCut = *((int *)&pCut->uSign);
assert( ArrivalCut >= ArrivalMin );
// assert( ArrivalCut >= ArrivalMin );
if ( ArrivalCut > ArrivalMin )
continue;
CostCur = 0.0;
......
src/base/seq/seqInt.h
......@@ -217,15 +217,15 @@ static inline void Seq_NodeSetInitOne( Abc_Obj_t * pObj, int Edge, int
////////////////////////////////////////////////////////////////////////
/*=== seqAigIter.c =============================================================*/
extern void Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose );
extern int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose );
extern int Seq_NtkImplementRetiming( Abc_Ntk_t * pNtk, Vec_Str_t * vLags, int fVerbose );
/*=== seqFpgaIter.c ============================================================*/
extern void Seq_FpgaMappingDelays( Abc_Ntk_t * pNtk, int fVerbose );
extern int Seq_FpgaMappingDelays( Abc_Ntk_t * pNtk, int fVerbose );
extern int Seq_FpgaNodeUpdateLValue( Abc_Obj_t * pObj, int Fi );
/*=== seqMapIter.c ============================================================*/
extern void Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose );
extern int Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose );
/*=== seqRetIter.c =============================================================*/
extern void Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose );
extern int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose );
/*=== seqLatch.c ===============================================================*/
extern void Seq_NodeInsertFirst( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init );
extern void Seq_NodeInsertLast( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init );
......
src/base/seq/seqMapCore.c
......@@ -74,12 +74,14 @@ Abc_Ntk_t * Seq_MapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose )
p->fStandCells = 1;
// find the best mapping and retiming for all nodes (p->vLValues, p->vBestCuts, p->vLags)
Seq_MapRetimeDelayLags( pNtk, fVerbose );
if ( !Seq_MapRetimeDelayLags( pNtk, fVerbose ) )
return NULL;
if ( RetValue = Abc_NtkGetChoiceNum(pNtk) )
{
printf( "The network has %d choices. Deriving the resulting network is skipped.\n", RetValue );
return NULL;
}
return NULL;
// duplicate the nodes contained in multiple cuts
pNtkNew = Seq_NtkMapDup( pNtk );
......
src/base/seq/seqMapIter.c
......@@ -48,7 +48,7 @@ extern Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams );
SeeAlso []
***********************************************************************/
void Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
int Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
{
Abc_Seq_t * p = pNtk->pManFunc;
Cut_Params_t Params, * pParams = &Params;
......@@ -81,8 +81,21 @@ p->timeCuts = clock() - clk;
// compute the delays
clk = clock();
FiBest = Seq_MapRetimeDelayLagsInternal( pNtk, fVerbose );
if ( FiBest == 0.0 )
return 0;
p->timeDelay = clock() - clk;
/*
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%.2f ", FiBest );
fprintf( pTable, "%.2f ", (float)(p->timeCuts)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "%.2f ", (float)(p->timeDelay)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
// clean the marks
Abc_NtkForEachObj( pNtk, pObj, i )
assert( !pObj->fMarkA && !pObj->fMarkB );
......@@ -104,6 +117,7 @@ p->timeDelay = clock() - clk;
// remove the cuts
Cut_ManStop( p->pCutMan );
p->pCutMan = NULL;
return 1;
}
/**Function*************************************************************
......@@ -144,7 +158,15 @@ float Seq_MapRetimeDelayLagsInternal( Abc_Ntk_t * pNtk, int fVerbose )
Delta /= 2;
// make sure this clock period is feasible
assert( Seq_MapRetimeForPeriod( pNtk, FiMax, fVerbose ) );
if ( !Seq_MapRetimeForPeriod( pNtk, FiMax, fVerbose ) )
{
Vec_StrFill( p->vLags, p->nSize, 0 );
Vec_StrFill( p->vLagsN, p->nSize, 0 );
printf( "Error: The upper bound on the clock period cannot be computed.\n" );
printf( "The reason for this error may be the presence in the circuit of logic\n" );
printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" );
return 0;
}
// search for the optimal clock period between 0 and nLevelMax
FiBest = Seq_MapRetimeSearch_rec( pNtk, 0.0, FiMax, Delta, fVerbose );
......@@ -153,6 +175,15 @@ float Seq_MapRetimeDelayLagsInternal( Abc_Ntk_t * pNtk, int fVerbose )
RetValue = Seq_MapRetimeForPeriod( pNtk, FiBest, fVerbose );
assert( RetValue );
// fix the problem with non-converged delays
Abc_AigForEachAnd( pNtk, pNode, i )
{
if ( Seq_NodeGetLValueP(pNode) < -ABC_INFINITY/2 )
Seq_NodeSetLValueP( pNode, 0 );
if ( Seq_NodeGetLValueN(pNode) < -ABC_INFINITY/2 )
Seq_NodeSetLValueN( pNode, 0 );
}
// write the retiming lags for both phases of each node
Vec_StrFill( p->vLags, p->nSize, 0 );
Vec_StrFill( p->vLagsN, p->nSize, 0 );
......@@ -579,6 +610,8 @@ void Seq_MapCanonicizeTruthTables( Abc_Ntk_t * pNtk )
Abc_AigForEachAnd( pNtk, pObj, i )
{
pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj );
if ( pList == NULL )
continue;
for ( pCut = pList->pNext; pCut; pCut = pCut->pNext )
Cut_TruthCanonicize( pCut );
}
......
src/base/seq/seqRetCore.c
......@@ -60,7 +60,11 @@ Abc_Ntk_t * Seq_NtkRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fV
if ( !fInitial )
Seq_NtkLatchSetValues( pNtkSeq, ABC_INIT_DC );
// find the best mapping and retiming
Seq_NtkRetimeDelayLags( pNtk, pNtkSeq, fVerbose );
if ( !Seq_NtkRetimeDelayLags( pNtk, pNtkSeq, fVerbose ) )
return NULL;
return NULL;
// implement the retiming
RetValue = Seq_NtkImplementRetiming( pNtkSeq, p->vLags, fVerbose );
if ( RetValue == 0 )
......
src/base/seq/seqRetIter.c
......@@ -49,7 +49,7 @@ static void Seq_NodePrintInfoPlus( Abc_Obj_t * pNode );
SeeAlso []
***********************************************************************/
void Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose )
int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose )
{
Abc_Seq_t * p = pNtk->pManFunc;
Abc_Obj_t * pNode;
......@@ -76,7 +76,7 @@ void Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose
if ( Delta == 0.0 )
{
printf( "Cannot retime/map if the library does not have NAND2 or AND2.\n" );
return;
return 0;
}
}
// get the upper bound on the clock period
......@@ -90,8 +90,14 @@ void Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose
}
// make sure this clock period is feasible
assert( Seq_NtkMappingForPeriod( pNtk, FiMax, fVerbose ) );
if ( !Seq_NtkMappingForPeriod( pNtk, FiMax, fVerbose ) )
{
printf( "Error: The upper bound on the clock period cannot be computed.\n" );
printf( "The reason for this error may be the presence in the circuit of logic\n" );
printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" );
return 0;
}
// search for the optimal clock period between 0 and nLevelMax
FiBest = Seq_NtkMappingSearch_rec( pNtk, 0.0, FiMax, Delta, fVerbose );
......@@ -99,6 +105,11 @@ void Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose
RetValue = Seq_NtkMappingForPeriod( pNtk, FiBest, fVerbose );
assert( RetValue );
// fix the problem with non-converged delays
Vec_PtrForEachEntry( p->vMapAnds, pNode, i )
if ( Seq_NodeGetLValueP(pNode) < -ABC_INFINITY/2 )
Seq_NodeSetLValueP( pNode, 0 );
// experiment by adding an epsilon to all LValues
// Vec_PtrForEachEntry( p->vMapAnds, pNode, i )
// Seq_NodeSetLValueP( pNode, Seq_NodeGetLValueP(pNode) - p->fEpsilon );
......@@ -126,8 +137,18 @@ void Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose
// print the result
if ( fVerbose )
printf( "The best clock period is %6.2f.\n", FiBest );
/*
{
FILE * pTable;
pTable = fopen( "stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%.2f ", FiBest );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
// Seq_NodePrintInfo( Abc_NtkObj(pNtk, 847) );
return 1;
}
/**Function*************************************************************
......
src/base/seq/seqUtil.c
......@@ -461,6 +461,134 @@ int Seq_MapComputeAreaFlows( Abc_Ntk_t * pNtk, int fVerbose )
return 1;
}
/**Function*************************************************************
Synopsis [Collects all the internal nodes reachable from POs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Seq_NtkReachNodesFromPos_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vNodes )
{
// skip if this is a non-PI node
if ( !Abc_NodeIsAigAnd(pAnd) )
return;
// skip a visited node
if ( Abc_NodeIsTravIdCurrent(pAnd) )
return;
Abc_NodeSetTravIdCurrent(pAnd);
// visit the fanin nodes
Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin0(pAnd), vNodes );
Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin1(pAnd), vNodes );
// add this node
Vec_PtrPush( vNodes, pAnd );
}
/**Function*************************************************************
Synopsis [Collects all the internal nodes reachable from POs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Seq_NtkReachNodesFromPis_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vNodes )
{
Abc_Obj_t * pFanout;
int k;
// skip if this is a non-PI node
if ( !Abc_NodeIsAigAnd(pAnd) )
return;
// skip a visited node
if ( Abc_NodeIsTravIdCurrent(pAnd) )
return;
Abc_NodeSetTravIdCurrent(pAnd);
// visit the fanin nodes
Abc_ObjForEachFanout( pAnd, pFanout, k )
Seq_NtkReachNodesFromPis_rec( pFanout, vNodes );
// add this node
Vec_PtrPush( vNodes, pAnd );
}
/**Function*************************************************************
Synopsis [Collects all the internal nodes reachable from POs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Seq_NtkReachNodes( Abc_Ntk_t * pNtk, int fFromPos )
{
Vec_Ptr_t * vNodes;
Abc_Obj_t * pObj, * pFanout;
int i, k;
assert( Abc_NtkIsSeq(pNtk) );
vNodes = Vec_PtrAlloc( 1000 );
Abc_NtkIncrementTravId( pNtk );
if ( fFromPos )
{
// traverse the cone of each PO
Abc_NtkForEachPo( pNtk, pObj, i )
Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin0(pObj), vNodes );
}
else
{
// tranvers the reverse cone of the constant node
pObj = Abc_NtkConst1( pNtk );
Abc_ObjForEachFanout( pObj, pFanout, k )
Seq_NtkReachNodesFromPis_rec( pFanout, vNodes );
// tranvers the reverse cone of the PIs
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_ObjForEachFanout( pObj, pFanout, k )
Seq_NtkReachNodesFromPis_rec( pFanout, vNodes );
}
return vNodes;
}
/**Function*************************************************************
Synopsis [Perform sequential cleanup.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Seq_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose )
{
Vec_Ptr_t * vNodesPo, * vNodesPi;
int Counter = 0;
assert( Abc_NtkIsSeq(pNtk) );
// collect the nodes reachable from POs and PIs
vNodesPo = Seq_NtkReachNodes( pNtk, 1 );
vNodesPi = Seq_NtkReachNodes( pNtk, 0 );
printf( "Total nodes = %6d. Reachable from POs = %6d. Reachable from PIs = %6d.\n",
Abc_NtkNodeNum(pNtk), Vec_PtrSize(vNodesPo), Vec_PtrSize(vNodesPi) );
if ( Abc_NtkNodeNum(pNtk) > Vec_PtrSize(vNodesPo) )
{
Counter = Abc_NtkReduceNodes( pNtk, vNodesPo );
if ( fVerbose )
printf( "Cleanup removed %d nodes that are not reachable from the POs.\n", Counter );
}
Vec_PtrFree( vNodesPo );
Vec_PtrFree( vNodesPi );
return Counter;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
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