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lvzhengyang
abc
Commits
889ed19c
Commit
889ed19c
authored
Aug 26, 2012
by
Alan Mishchenko
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Compiler warnings.
parent
137f0347
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3 changed files
with
3 additions
and
3 deletions
+3
-3
src/base/cmd/cmdHist.c
+1
-1
src/map/scl/sclTime.c
+1
-1
src/proof/fra/fraSim.c
+1
-1
No files found.
src/base/cmd/cmdHist.c
View file @
889ed19c
...
...
@@ -60,7 +60,7 @@ void Cmd_HistoryAddCommand( Abc_Frame_t * p, const char * command )
strncmp
(
Buffer
,
"source"
,
6
)
&&
strncmp
(
Buffer
,
"history"
,
7
)
&&
strncmp
(
Buffer
,
"hi "
,
3
)
&&
strcmp
(
Buffer
,
"hi"
)
)
{
char
*
pStr
;
char
*
pStr
=
NULL
;
int
i
,
Start
=
Abc_MaxInt
(
0
,
Vec_PtrSize
(
p
->
aHistory
)
-
nLastLooked
);
// do not enter if the same command appears among nLastLooked commands
Vec_PtrForEachEntryStart
(
char
*
,
p
->
aHistory
,
pStr
,
i
,
Start
)
...
...
src/map/scl/sclTime.c
View file @
889ed19c
...
...
@@ -132,7 +132,7 @@ float Abc_SclTotalArea( SC_Man * p, Vec_Ptr_t * vNodes )
Vec_Flt_t
*
Abc_SclFindWireCaps
(
SC_Man
*
p
,
Vec_Ptr_t
*
vNodes
)
{
Vec_Flt_t
*
vCaps
=
NULL
;
SC_WireLoad
*
pWL
;
SC_WireLoad
*
pWL
=
NULL
;
int
i
,
Entry
,
EntryPrev
,
EntryMax
;
p
->
pWireLoadUsed
=
NULL
;
if
(
p
->
pLib
->
default_wire_load_sel
)
...
...
src/proof/fra/fraSim.c
View file @
889ed19c
...
...
@@ -894,7 +894,7 @@ Vec_Str_t * Fra_SmlSimulateReadFile( char * pFileName )
Vec_StrPush
(
vRes
,
(
char
)(
c
-
'0'
)
);
else
if
(
c
!=
' '
&&
c
!=
'\r'
&&
c
!=
'\n'
&&
c
!=
'\t'
)
{
printf
(
"File
\"
%s
\"
contains symbol (%c) other than
\'
0
\'
or
\'
1
\'
.
\n
"
,
(
char
)
c
);
printf
(
"File
\"
%s
\"
contains symbol (%c) other than
\'
0
\'
or
\'
1
\'
.
\n
"
,
pFileName
,
(
char
)
c
);
Vec_StrFreeP
(
&
vRes
);
break
;
}
...
...
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