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lvzhengyang
abc
Commits
850d39fe
Commit
850d39fe
authored
Aug 12, 2020
by
Alan Mishchenko
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Plain Diff
Making &cec use precomputed simulation info.
parent
b74b7dfc
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4 changed files
with
42 additions
and
12 deletions
+42
-12
src/base/abci/abc.c
+5
-0
src/proof/cec/cecCec.c
+5
-0
src/proof/cec/cecClass.c
+24
-9
src/proof/cec/cecCore.c
+8
-3
No files found.
src/base/abci/abc.c
View file @
850d39fe
...
...
@@ -37156,6 +37156,11 @@ int Abc_CommandAbc9Cec( Abc_Frame_t * pAbc, int argc, char ** argv )
Abc_Print
(
0
,
"The verification miter is written into file
\"
%s
\"
.
\n
"
,
"cec_miter.aig"
);
Gia_AigerWrite
(
pMiter
,
"cec_miter.aig"
,
0
,
0
,
0
);
}
if
(
pGias
[
0
]
->
vSimsPi
)
{
pMiter
->
vSimsPi
=
Vec_WrdDup
(
pGias
[
0
]
->
vSimsPi
);
pMiter
->
nSimWords
=
pGias
[
0
]
->
nSimWords
;
}
pAbc
->
Status
=
Cec_ManVerify
(
pMiter
,
pPars
);
Abc_FrameReplaceCex
(
pAbc
,
&
pGias
[
0
]
->
pCexComb
);
Gia_ManStop
(
pMiter
);
src/proof/cec/cecCec.c
View file @
850d39fe
...
...
@@ -349,6 +349,11 @@ int Cec_ManVerify( Gia_Man_t * pInit, Cec_ParCec_t * pPars )
Gia_ManStop
(
p
);
return
RetValue
;
}
if
(
pInit
->
vSimsPi
)
{
p
->
vSimsPi
=
Vec_WrdDup
(
pInit
->
vSimsPi
);
p
->
nSimWords
=
pInit
->
nSimWords
;
}
// sweep for equivalences
Cec_ManFraSetDefaultParams
(
pParsFra
);
pParsFra
->
nItersMax
=
1000
;
...
...
src/proof/cec/cecClass.c
View file @
850d39fe
...
...
@@ -878,19 +878,34 @@ int Cec_ManSimClassesPrepare( Cec_ManSim_t * p, int LevelMax )
if
(
pObj
->
Value
)
Gia_ObjSetRepr
(
p
->
pAig
,
Gia_ObjId
(
p
->
pAig
,
pObj
),
0
);
// perform simulation
p
->
nWords
=
1
;
do
{
if
(
p
->
pAig
->
nSimWords
)
{
p
->
nWords
=
2
*
p
->
pAig
->
nSimWords
;
assert
(
Vec_WrdSize
(
p
->
pAig
->
vSimsPi
)
==
Gia_ManCiNum
(
p
->
pAig
)
*
p
->
pAig
->
nSimWords
);
//Cec_ManSimCreateInfo( p, p->vCiSimInfo, p->vCoSimInfo );
for
(
i
=
0
;
i
<
Gia_ManCiNum
(
p
->
pAig
);
i
++
)
memmove
(
Vec_PtrEntry
(
p
->
vCiSimInfo
,
i
),
Vec_WrdEntryP
(
p
->
pAig
->
vSimsPi
,
i
*
p
->
pAig
->
nSimWords
),
sizeof
(
word
)
*
p
->
pAig
->
nSimWords
);
if
(
Cec_ManSimSimulateRound
(
p
,
p
->
vCiSimInfo
,
p
->
vCoSimInfo
)
)
return
1
;
if
(
p
->
pPars
->
fVerbose
)
Gia_ManEquivPrintClasses
(
p
->
pAig
,
0
,
Cec_MemUsage
(
p
)
);
for
(
i
=
0
;
i
<
4
;
i
++
)
{
Cec_ManSimCreateInfo
(
p
,
p
->
vCiSimInfo
,
p
->
vCoSimInfo
);
if
(
Cec_ManSimSimulateRound
(
p
,
p
->
vCiSimInfo
,
p
->
vCoSimInfo
)
)
return
1
;
}
else
{
p
->
nWords
=
1
;
do
{
if
(
p
->
pPars
->
fVerbose
)
Gia_ManEquivPrintClasses
(
p
->
pAig
,
0
,
Cec_MemUsage
(
p
)
);
for
(
i
=
0
;
i
<
4
;
i
++
)
{
Cec_ManSimCreateInfo
(
p
,
p
->
vCiSimInfo
,
p
->
vCoSimInfo
);
if
(
Cec_ManSimSimulateRound
(
p
,
p
->
vCiSimInfo
,
p
->
vCoSimInfo
)
)
return
1
;
}
p
->
nWords
=
2
*
p
->
nWords
+
1
;
}
p
->
nWords
=
2
*
p
->
nWords
+
1
;
while
(
p
->
nWords
<=
p
->
pPars
->
nWords
)
;
}
while
(
p
->
nWords
<=
p
->
pPars
->
nWords
);
return
0
;
}
...
...
src/proof/cec/cecCore.c
View file @
850d39fe
...
...
@@ -360,6 +360,11 @@ Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars, int fSil
Vec_IntFreeP
(
&
pAig
->
vIdsEquiv
);
pAig
->
vIdsEquiv
=
Vec_IntAlloc
(
1000
);
}
if
(
pAig
->
vSimsPi
)
{
pIni
->
vSimsPi
=
Vec_WrdDup
(
pAig
->
vSimsPi
);
pIni
->
nSimWords
=
pAig
->
nSimWords
;
}
// prepare the managers
// SAT sweeping
...
...
@@ -368,12 +373,12 @@ Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars, int fSil
pPars
->
fColorDiff
=
1
;
// simulation
Cec_ManSimSetDefaultParams
(
pParsSim
);
pParsSim
->
nWords
=
pPars
->
nWords
;
pParsSim
->
nWords
=
Abc_MaxInt
(
2
*
pAig
->
nSimWords
,
pPars
->
nWords
)
;
pParsSim
->
nFrames
=
pPars
->
nRounds
;
pParsSim
->
fCheckMiter
=
pPars
->
fCheckMiter
;
pParsSim
->
fDualOut
=
pPars
->
fDualOut
;
pParsSim
->
fVerbose
=
pPars
->
fVerbose
;
pSim
=
Cec_ManSimStart
(
p
->
pAig
,
pParsSim
);
pSim
=
Cec_ManSimStart
(
p
Ini
,
pParsSim
);
// SAT solving
Cec_ManSatSetDefaultParams
(
pParsSat
);
pParsSat
->
nBTLimit
=
pPars
->
nBTLimit
;
...
...
@@ -386,7 +391,7 @@ Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars, int fSil
clk
=
Abc_Clock
();
if
(
p
->
pAig
->
pReprs
==
NULL
)
{
if
(
Cec_ManSimClassesPrepare
(
pSim
,
-
1
)
||
Cec_ManSimClassesRefine
(
pSim
)
)
if
(
Cec_ManSimClassesPrepare
(
pSim
,
-
1
)
||
(
!
p
->
pAig
->
nSimWords
&&
Cec_ManSimClassesRefine
(
pSim
)
)
)
{
Gia_ManStop
(
p
->
pAig
);
p
->
pAig
=
NULL
;
...
...
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