Commit 6e74c46b by Alan Mishchenko

Enabled new BDD-based reachability engine 'reachy'.

parent 8b22fd28
......@@ -4163,6 +4163,18 @@ SOURCE=.\src\aig\llb\llb3Nonlin.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\llb\llb4Image.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\llb\llb4Map.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\llb\llb4Nonlin.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\llb\llbInt.h
# End Source File
# End Group
......@@ -4305,6 +4317,54 @@ SOURCE=.\src\aig\au\auUtil.c
# Begin Group "ssm"
# PROP Default_Filter ""
# Begin Source File
SOURCE=.\src\aig\ssm\ssm.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssm.h
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmApi.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmClock.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmInt.h
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmRandom.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmRead.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmReset.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmSchedule.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmSimple.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmSimulate.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\ssm\ssmWrite.c
# End Source File
# End Group
# End Group
# End Group
......
......@@ -207,9 +207,9 @@ void Aig_ManDomPrint( Aig_Sto_t * pSto )
{
Aig_Obj_t * pObj;
int i;
Saig_ManForEachLo( pSto->pAig, pObj, i )
Saig_ManForEachPi( pSto->pAig, pObj, i )
{
printf( "*** LO %4d %4d :\n", i, pObj->Id );
printf( "*** PI %4d %4d :\n", i, pObj->Id );
Aig_ObjDomVecPrint( pSto, (Vec_Ptr_t *)Vec_PtrEntry(pSto->vDoms, pObj->Id) );
}
}
......@@ -647,6 +647,45 @@ Aig_Sto_t * Aig_ManComputeDomsFlops( Aig_Man_t * pAig, int Limit )
return pSto;
}
/**Function*************************************************************
Synopsis [Computes multi-node dominators.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Sto_t * Aig_ManComputeDomsPis( Aig_Man_t * pAig, int Limit )
{
Aig_Sto_t * pSto;
Vec_Ptr_t * vNodes;
Aig_Obj_t * pObj;
int i, clk = clock();
pSto = Aig_ManDomStart( pAig, Limit );
// initialize flop inputs
Aig_ManForEachPo( pAig, pObj, i )
Aig_ObjAddTriv( pSto, pObj->Id, Vec_PtrAlloc(1) );
// compute internal nodes
vNodes = Aig_ManDfsReverse( pAig );
Aig_ManMarkFlopTfi( pAig );
Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
if ( Aig_ObjIsTravIdCurrent(pSto->pAig, pObj) )
Aig_ObjDomCompute( pSto, pObj );
Vec_PtrFree( vNodes );
// compute combinational inputs
Saig_ManForEachPi( pAig, pObj, i )
Aig_ObjDomCompute( pSto, pObj );
// print statistics
printf( "Nodes =%4d. PIs =%4d. Doms =%9d. Ave =%8.2f. ",
pSto->nDomNodes, Saig_ManPiNum(pSto->pAig), pSto->nDomsTotal,
// pSto->nDomsFilter1, pSto->nDomsFilter2,
1.0 * pSto->nDomsTotal / (pSto->nDomNodes + Saig_ManPiNum(pSto->pAig)) );
Abc_PrintTime( 1, "Time", clock() - clk );
return pSto;
}
/**Function*************************************************************
......@@ -971,7 +1010,7 @@ void Aig_ObjDomFindGood( Aig_Sto_t * pSto )
SeeAlso []
***********************************************************************/
void Aig_ManComputeDomsTest( Aig_Man_t * pAig, int Num )
void Aig_ManComputeDomsTest2( Aig_Man_t * pAig, int Num )
{
Aig_Sto_t * pSto;
// int i;
......@@ -988,6 +1027,27 @@ void Aig_ManComputeDomsTest( Aig_Man_t * pAig, int Num )
Aig_ManFanoutStop( pAig );
}
/**Function*************************************************************
Synopsis [Computes multi-node dominators.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Aig_ManComputeDomsTest( Aig_Man_t * pAig )
{
Aig_Sto_t * pSto;
Aig_ManFanoutStart( pAig );
pSto = Aig_ManComputeDomsPis( pAig, 1 );
Aig_ManDomPrint( pSto );
Aig_ManDomStop( pSto );
Aig_ManFanoutStop( pAig );
}
......
......@@ -113,10 +113,10 @@ void Aig_ManPackPrintCare( Aig_ManPack_t * p )
Aig_ManForEachPi( p->pAig, pObj, i )
{
Sign = Vec_WrdEntry( p->vPiCare, i );
Extra_PrintBinary( stdout, (unsigned *)&Sign, 64 );
printf( "\n" );
// Extra_PrintBinary( stdout, (unsigned *)&Sign, 64 );
// printf( "\n" );
}
printf( "\n" );
// printf( "\n" );
}
......
......@@ -316,6 +316,10 @@ static inline void Gia_ObjSetValue( Gia_Obj_t * pObj, int i ) {
static inline int Gia_ObjPhase( Gia_Obj_t * pObj ) { return pObj->fPhase; }
static inline int Gia_ObjPhaseReal( Gia_Obj_t * pObj ) { return Gia_Regular(pObj)->fPhase ^ Gia_IsComplement(pObj); }
static inline int Gia_ManIdToCioId( Gia_Man_t * p, int Id ) { return Gia_ObjCioId( Gia_ManObj(p, Id) ); }
static inline int Gia_ManCiIdToId( Gia_Man_t * p, int CiId ) { return Gia_ObjId( p, Gia_ManCi(p, CiId) ); }
static inline int Gia_ManCoIdToId( Gia_Man_t * p, int CoId ) { return Gia_ObjId( p, Gia_ManCo(p, CoId) ); }
static inline int Gia_ObjIsPi( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ObjIsCi(pObj) && Gia_ObjCioId(pObj) < Gia_ManPiNum(p); }
static inline int Gia_ObjIsPo( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ObjIsCo(pObj) && Gia_ObjCioId(pObj) < Gia_ManPoNum(p); }
static inline int Gia_ObjIsRo( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ObjIsCi(pObj) && Gia_ObjCioId(pObj) >= Gia_ManPiNum(p); }
......
/**CFile****************************************************************
FileName [llb2Map.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [BDD based reachability.]
Synopsis [Non-linear quantification scheduling.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: llb2Map.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "llbInt.h"
#include "abc.h"
#include "if.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Returns internal nodes used in the mapping.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Llb_AigMap( Aig_Man_t * pAig, int nLutSize, int nLutMin )
{
extern Abc_Ntk_t * Abc_NtkFromAigPhase( Aig_Man_t * pMan );
extern If_Man_t * Abc_NtkToIf( Abc_Ntk_t * pNtk, If_Par_t * pPars );
extern void Gia_ManSetIfParsDefault( If_Par_t * pPars );
If_Par_t Pars, * pPars = &Pars;
If_Man_t * pIfMan;
If_Obj_t * pAnd;
Abc_Ntk_t * pNtk;
Abc_Obj_t * pNode;
Vec_Int_t * vNodes;
Aig_Obj_t * pObj;
int i;
// create ABC network
pNtk = Abc_NtkFromAigPhase( pAig );
assert( Abc_NtkIsStrash(pNtk) );
// derive mapping parameters
Gia_ManSetIfParsDefault( pPars );
pPars->nLutSize = nLutSize;
// get timing information
pPars->pTimesArr = Abc_NtkGetCiArrivalFloats(pNtk);
pPars->pTimesReq = NULL;
// perform LUT mapping
pIfMan = Abc_NtkToIf( pNtk, pPars );
if ( pIfMan == NULL )
{
Abc_NtkDelete( pNtk );
return NULL;
}
if ( !If_ManPerformMapping( pIfMan ) )
{
Abc_NtkDelete( pNtk );
If_ManStop( pIfMan );
return NULL;
}
// mark nodes in the AIG used in the mapping
Aig_ManCleanMarkA( pAig );
Aig_ManForEachNode( pAig, pObj, i )
{
pNode = (Abc_Obj_t *)pObj->pData;
if ( pNode == NULL )
continue;
pAnd = (If_Obj_t *)pNode->pCopy;
if ( pAnd == NULL )
continue;
if ( pAnd->nRefs > 0 && (int)If_ObjCutBest(pAnd)->nLeaves >= nLutMin )
pObj->fMarkA = 1;
}
Abc_NtkDelete( pNtk );
If_ManStop( pIfMan );
// unmark flop drivers
Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjFanin0(pObj)->fMarkA = 0;
// collect mapping
vNodes = Vec_IntAlloc( 100 );
Aig_ManForEachNode( pAig, pObj, i )
if ( pObj->fMarkA )
Vec_IntPush( vNodes, Aig_ObjId(pObj) );
Aig_ManCleanMarkA( pAig );
return vNodes;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
......@@ -176,12 +176,20 @@ extern DdManager * Llb_NonlinImageStart( Aig_Man_t * pAig, Vec_Ptr_t * vLeav
extern DdNode * Llb_NonlinImageCompute( DdNode * bCurrent, int fReorder, int fDrop, int fVerbose, int * pOrder );
extern void Llb_NonlinImageQuit();
/*=== llb3Image.c ======================================================*/
/*=== llb3Image.c =======================================================*/
extern DdNode * Llb_NonlinImage( Aig_Man_t * pAig, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vRoots, int * pVars2Q,
DdManager * dd, DdNode * bCurrent, int fReorder, int fVerbose, int * pOrder, int Limit, int TimeTarget );
/*=== llb3Nonlin.c ======================================================*/
extern DdNode * Llb_NonlinComputeInitState( Aig_Man_t * pAig, DdManager * dd );
/*=== llb4Image.c =======================================================*/
extern DdNode * Llb_Nonlin4Image( DdManager * dd, Vec_Ptr_t * vParts, DdNode * bCurrent, Vec_Int_t * vVars2Q );
/*=== llb4Map.c =========================================================*/
//extern Vec_Int_t * Llb_AigMap( Aig_Man_t * pAig, int nLutSize, int nLutMin );
/*=== llb4Nonlin.c ======================================================*/
extern int Llb_Nonlin4CoreReach( Aig_Man_t * pAig, Gia_ParLlb_t * pPars );
ABC_NAMESPACE_HEADER_END
......
......@@ -16,4 +16,6 @@ SRC += src/aig/llb/llb.c \
src/aig/llb/llb2Flow.c \
src/aig/llb/llb2Image.c \
src/aig/llb/llb3Image.c \
src/aig/llb/llb3Nonlin.c
src/aig/llb/llb3Nonlin.c \
src/aig/llb/llb4Image.c \
src/aig/llb/llb4Nonlin.c
......@@ -373,6 +373,7 @@ static int Abc_CommandAbc9Posplit ( Abc_Frame_t * pAbc, int argc, cha
static int Abc_CommandAbc9ReachM ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9ReachP ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9ReachN ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9ReachY ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9Undo ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9Test ( Abc_Frame_t * pAbc, int argc, char ** argv );
......@@ -784,6 +785,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "ABC9", "&reachm", Abc_CommandAbc9ReachM, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&reachp", Abc_CommandAbc9ReachP, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&reachn", Abc_CommandAbc9ReachN, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&reachy", Abc_CommandAbc9ReachY, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&undo", Abc_CommandAbc9Undo, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&test", Abc_CommandAbc9Test, 0 );
......@@ -8529,6 +8531,12 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
Aig_ManStop( pAig );
}
*/
/*
{
extern void Ssm_ManExperiment( char * pFileIn, char * pFileOut );
Ssm_ManExperiment( "m\\big1.ssim", "m\\big1_.ssim" );
}
*/
return 0;
usage:
Abc_Print( -2, "usage: test [-CKDN] [-vwh] <file_name>\n" );
......@@ -27968,6 +27976,137 @@ usage:
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9ReachY( Abc_Frame_t * pAbc, int argc, char ** argv )
{
Gia_ParLlb_t Pars, * pPars = &Pars;
Abc_Ntk_t * pNtk = Abc_FrameReadNtk(pAbc);
Aig_Man_t * pMan;
char * pLogFileName = NULL;
int c;
extern int Llb_Nonlin4CoreReach( Aig_Man_t * pAig, Gia_ParLlb_t * pPars );
// set defaults
Llb_ManSetDefaultParams( pPars );
pPars->fReorder = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "BFTLryzvwh" ) ) != EOF )
{
switch ( c )
{
case 'B':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-B\" should be followed by an integer.\n" );
goto usage;
}
pPars->nBddMax = atoi(argv[globalUtilOptind]);
globalUtilOptind++;
if ( pPars->nBddMax < 0 )
goto usage;
break;
case 'F':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" );
goto usage;
}
pPars->nIterMax = atoi(argv[globalUtilOptind]);
globalUtilOptind++;
if ( pPars->nIterMax < 0 )
goto usage;
break;
case 'T':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-T\" should be followed by an integer.\n" );
goto usage;
}
pPars->TimeLimit = atoi(argv[globalUtilOptind]);
globalUtilOptind++;
if ( pPars->TimeLimit < 0 )
goto usage;
break;
case 'L':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-L\" should be followed by a file name.\n" );
goto usage;
}
pLogFileName = argv[globalUtilOptind];
globalUtilOptind++;
break;
case 'r':
pPars->fReorder ^= 1;
break;
case 'y':
pPars->fSkipOutCheck ^= 1;
break;
case 'z':
pPars->fSkipReach ^= 1;
break;
case 'v':
pPars->fVerbose ^= 1;
break;
case 'w':
pPars->fVeryVerbose ^= 1;
break;
case 'h':
goto usage;
default:
goto usage;
}
}
if ( pAbc->pGia == NULL )
{
Abc_Print( -1, "Abc_CommandAbc9ReachN(): There is no AIG.\n" );
return 1;
}
if ( Gia_ManRegNum(pAbc->pGia) == 0 )
{
Abc_Print( -1, "Abc_CommandAbc9ReachN(): The current AIG has no latches.\n" );
return 0;
}
if ( Gia_ManObjNum(pAbc->pGia) >= (1<<16) )
{
Abc_Print( -1, "Abc_CommandAbc9ReachN(): Currently cannot handle AIGs with more than %d objects.\n", (1<<16) );
return 0;
}
pMan = Gia_ManToAigSimple( pAbc->pGia );
pAbc->Status = Llb_Nonlin4CoreReach( pMan, pPars );
pAbc->nFrames = pPars->iFrame;
Abc_FrameReplaceCex( pAbc, &pMan->pSeqModel );
if ( pLogFileName )
Abc_NtkWriteLogFile( pLogFileName, pAbc->pCex, pAbc->Status, pAbc->nFrames, "&reachn" );
Aig_ManStop( pMan );
return 0;
usage:
Abc_Print( -2, "usage: &reachy [-BFT num] [-L file] [-ryzvh]\n" );
Abc_Print( -2, "\t model checking via BDD-based reachability (non-linear-QS-based)\n" );
Abc_Print( -2, "\t-B num : the BDD node increase when hints kick in [default = %d]\n", pPars->nBddMax );
Abc_Print( -2, "\t-F num : max number of reachability iterations [default = %d]\n", pPars->nIterMax );
Abc_Print( -2, "\t-T num : approximate time limit in seconds (0=infinite) [default = %d]\n", pPars->TimeLimit );
Abc_Print( -2, "\t-L file: the log file name [default = %s]\n", pLogFileName ? pLogFileName : "no logging" );
Abc_Print( -2, "\t-r : enable additional BDD var reordering before image [default = %s]\n", pPars->fReorder? "yes": "no" );
Abc_Print( -2, "\t-y : skip checking property outputs [default = %s]\n", pPars->fSkipOutCheck? "yes": "no" );
Abc_Print( -2, "\t-z : skip reachability (run preparation phase only) [default = %s]\n", pPars->fSkipReach? "yes": "no" );
Abc_Print( -2, "\t-v : prints verbose information [default = %s]\n", pPars->fVerbose? "yes": "no" );
// Abc_Print( -2, "\t-w : prints additional information [default = %s]\n", pPars->fVeryVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9Undo( Abc_Frame_t * pAbc, int argc, char ** argv )
{
int c;
......
......@@ -30,7 +30,7 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static If_Man_t * Abc_NtkToIf( Abc_Ntk_t * pNtk, If_Par_t * pPars );
extern If_Man_t * Abc_NtkToIf( Abc_Ntk_t * pNtk, If_Par_t * pPars );
static Abc_Ntk_t * Abc_NtkFromIf( If_Man_t * pIfMan, Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_NodeFromIf_rec( Abc_Ntk_t * pNtkNew, If_Man_t * pIfMan, If_Obj_t * pIfObj, Vec_Int_t * vCover );
static Hop_Obj_t * Abc_NodeIfToHop( Hop_Man_t * pHopMan, If_Man_t * pIfMan, If_Obj_t * pIfObj );
......
......@@ -1251,6 +1251,9 @@ cuddBddVarMapRecur(
return(Cudd_NotCond(res,F != f));
}
if ( manager->TimeStop && manager->TimeStop < clock() )
return NULL;
/* Split and recur on children of this node. */
T = cuddBddVarMapRecur(manager,cuddT(F));
if (T == NULL) return(NULL);
......
......@@ -64,6 +64,8 @@ struct Vec_Vec_t_
for ( i = Vec_VecSize(vGlob)-1; (i >= 0) && (((vVec) = (Vec_Ptr_t*)Vec_VecEntry(vGlob, i)), 1); i-- )
#define Vec_VecForEachLevelReverseStartStop( vGlob, vVec, i, LevelStart, LevelStop ) \
for ( i = LevelStart-1; (i >= LevelStop) && (((vVec) = (Vec_Ptr_t*)Vec_VecEntry(vGlob, i)), 1); i-- )
#define Vec_VecForEachLevelTwo( vGlob1, vGlob2, vVec1, vVec2, i ) \
for ( i = 0; (i < Vec_VecSize(vGlob1)) && (((vVec1) = (Vec_Ptr_t*)Vec_VecEntry(vGlob1, i)), 1) && (((vVec2) = (Vec_Ptr_t*)Vec_VecEntry(vGlob2, i)), 1); i++ )
// iterators through levels
#define Vec_VecForEachLevelInt( vGlob, vVec, i ) \
......@@ -78,6 +80,8 @@ struct Vec_Vec_t_
for ( i = Vec_VecSize(vGlob)-1; (i >= 0) && (((vVec) = (Vec_Int_t*)Vec_VecEntry(vGlob, i)), 1); i-- )
#define Vec_VecForEachLevelIntReverseStartStop( vGlob, vVec, i, LevelStart, LevelStop ) \
for ( i = LevelStart-1; (i >= LevelStop) && (((vVec) = (Vec_Int_t*)Vec_VecEntry(vGlob, i)), 1); i-- )
#define Vec_VecForEachLevelIntTwo( vGlob1, vGlob2, vVec1, vVec2, i ) \
for ( i = 0; (i < Vec_VecSize(vGlob1)) && (((vVec1) = (Vec_Int_t*)Vec_VecEntry(vGlob1, i)), 1) && (((vVec2) = (Vec_Int_t*)Vec_VecEntry(vGlob2, i)), 1); i++ )
// iteratores through entries
#define Vec_VecForEachEntry( Type, vGlob, pEntry, i, k ) \
......
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