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abc
Commit 6c68b76b by Alan Mishchenko
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Version abc80123

parent d4fecf91
Showing with 350 additions and 75 deletions
abc.dsp
......@@ -1850,10 +1850,6 @@ SOURCE=.\src\map\if\ifReduce.c
# End Source File
# Begin Source File
SOURCE=.\src\map\if\ifSeq.c
# End Source File
# Begin Source File
SOURCE=.\src\map\if\ifTime.c
# End Source File
# Begin Source File
......
src/aig/aig/aig.h
......@@ -254,10 +254,11 @@ static inline Aig_Obj_t * Aig_ObjChild0( Aig_Obj_t * pObj ) { return pObj-
static inline Aig_Obj_t * Aig_ObjChild1( Aig_Obj_t * pObj ) { return pObj->pFanin1; }
static inline Aig_Obj_t * Aig_ObjChild0Copy( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj)) : NULL; }
static inline Aig_Obj_t * Aig_ObjChild1Copy( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj)) : NULL; }
static inline void Aig_ObjChild0Flip( Aig_Obj_t * pObj ) { pObj->pFanin0 = Aig_Not(pObj->pFanin0); }
static inline void Aig_ObjChild1Flip( Aig_Obj_t * pObj ) { pObj->pFanin1 = Aig_Not(pObj->pFanin1); }
static inline int Aig_ObjLevel( Aig_Obj_t * pObj ) { return pObj->Level; }
static inline int Aig_ObjLevelNew( Aig_Obj_t * pObj ) { return Aig_ObjFanin1(pObj)? 1 + Aig_ObjIsExor(pObj) + AIG_MAX(Aig_ObjFanin0(pObj)->Level, Aig_ObjFanin1(pObj)->Level) : Aig_ObjFanin0(pObj)->Level; }
static inline void Aig_ObjChild0Flip( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); pObj->pFanin0 = Aig_Not(pObj->pFanin0); }
static inline void Aig_ObjChild1Flip( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); pObj->pFanin1 = Aig_Not(pObj->pFanin1); }
static inline int Aig_ObjLevel( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return pObj->Level; }
static inline int Aig_ObjLevelNew( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? 1 + Aig_ObjIsExor(pObj) + AIG_MAX(Aig_ObjFanin0(pObj)->Level, Aig_ObjFanin1(pObj)->Level) : Aig_ObjFanin0(pObj)->Level; }
static inline int Aig_ObjSetLevel( Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return pObj->Level = i; }
static inline void Aig_ObjClean( Aig_Obj_t * pObj ) { memset( pObj, 0, sizeof(Aig_Obj_t) ); }
static inline Aig_Obj_t * Aig_ObjFanout0( Aig_Man_t * p, Aig_Obj_t * pObj ) { assert(p->pFanData && pObj->Id < p->nFansAlloc); return Aig_ManObj(p, p->pFanData[5*pObj->Id] >> 1); }
static inline Aig_Obj_t * Aig_ObjEquiv( Aig_Man_t * p, Aig_Obj_t * pObj ) { return p->pEquivs? p->pEquivs[pObj->Id] : NULL; }
......
src/aig/aig/aigMan.c
......@@ -158,6 +158,7 @@ Aig_Man_t * Aig_ManDup( Aig_Man_t * p, int fOrdered )
{
pObjNew = Aig_ObjCreatePi( pNew );
pObjNew->pHaig = pObj->pHaig;
pObjNew->Level = pObj->Level;
pObj->pData = pObjNew;
}
// duplicate internal nodes
......
src/aig/ntl/ntl.h
......@@ -70,6 +70,7 @@ struct Ntl_Man_t_
Vec_Ptr_t * vCis; // the primary inputs of the extracted part
Vec_Ptr_t * vCos; // the primary outputs of the extracted part
Vec_Ptr_t * vNodes; // the nodes of the abstracted part
Vec_Int_t * vBox1Cos; // the first COs of the boxes
Aig_Man_t * pAig; // the extracted AIG
Tim_Man_t * pManTime; // the timing manager
};
......@@ -143,6 +144,8 @@ static inline int Ntl_ModelPoNum( Ntl_Mod_t * p ) { return p->nO
static inline int Ntl_ModelNodeNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_NODE]; }
static inline int Ntl_ModelLatchNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_LATCH]; }
static inline int Ntl_ModelBoxNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_BOX]; }
static inline int Ntl_ModelCiNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_PI] + p->nObjs[NTL_OBJ_LATCH]; }
static inline int Ntl_ModelCoNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_PO] + p->nObjs[NTL_OBJ_LATCH]; }
static inline Ntl_Obj_t * Ntl_ModelPi( Ntl_Mod_t * p, int i ) { return Vec_PtrEntry(p->vPis, i); }
static inline Ntl_Obj_t * Ntl_ModelPo( Ntl_Mod_t * p, int i ) { return Vec_PtrEntry(p->vPos, i); }
......@@ -217,6 +220,7 @@ static inline void Ntl_ObjSetFanout( Ntl_Obj_t * p, Ntl_Net_t * pNet, int
////////////////////////////////////////////////////////////////////////
/*=== ntlAig.c ==========================================================*/
extern Aig_Obj_t * Ntl_ManExtractAigNode( Ntl_Obj_t * pNode );
extern int Ntl_ManExtract( Ntl_Man_t * p );
extern int Ntl_ManInsert( Ntl_Man_t * p, Vec_Ptr_t * vMapping );
extern int Ntl_ManInsertTest( Ntl_Man_t * p );
......@@ -239,7 +243,7 @@ extern void Ntl_ModelFree( Ntl_Mod_t * p );
extern Vec_Ptr_t * Ntl_MappingAlloc( int nLuts, int nVars );
extern Vec_Ptr_t * Ntl_MappingFromAig( Aig_Man_t * p );
extern Vec_Ptr_t * Ntl_MappingFpga( Aig_Man_t * p );
extern Vec_Ptr_t * Ntl_MappingIf( Aig_Man_t * p );
extern Vec_Ptr_t * Ntl_MappingIf( Ntl_Man_t * pMan, Aig_Man_t * p );
/*=== ntlObj.c ============================================================*/
extern Ntl_Obj_t * Ntl_ModelCreatePi( Ntl_Mod_t * pModel );
extern Ntl_Obj_t * Ntl_ModelCreatePo( Ntl_Mod_t * pModel, Ntl_Net_t * pNet );
......@@ -254,6 +258,8 @@ extern Ntl_Net_t * Ntl_ModelFindNet( Ntl_Mod_t * p, char * pName );
extern Ntl_Net_t * Ntl_ModelFindOrCreateNet( Ntl_Mod_t * p, char * pName );
extern int Ntl_ModelSetNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet );
extern int Ntl_ModelFindPioNumber( Ntl_Mod_t * p, char * pName, int * pNumber );
/*=== ntlTime.c ==========================================================*/
extern Tim_Man_t * Ntl_ManCreateTiming( Ntl_Man_t * p );
/*=== ntlReadBlif.c ==========================================================*/
extern Ntl_Man_t * Ioa_ReadBlif( char * pFileName, int fCheck );
/*=== ntlWriteBlif.c ==========================================================*/
......
src/aig/ntl/ntlAig.c
......@@ -367,7 +367,7 @@ Aig_Obj_t * Ntl_ManExtractAigNode( Ntl_Obj_t * pNode )
SeeAlso []
***********************************************************************/
int Ntl_ManExtract( Ntl_Man_t * p )
int Ntl_ManExtract_old( Ntl_Man_t * p )
{
Ntl_Obj_t * pNode;
Ntl_Net_t * pNet;
......@@ -394,6 +394,30 @@ int Ntl_ManExtract( Ntl_Man_t * p )
/**Function*************************************************************
Synopsis [Extracts AIG from the netlist.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Ntl_ManExtract( Ntl_Man_t * p )
{
// start the AIG manager
assert( p->pAig == NULL );
p->pAig = Aig_ManStart( 10000 );
// check the DFS traversal
if ( !Ntl_ManDfs( p ) )
return 0;
// cleanup the AIG
Aig_ManCleanup( p->pAig );
return 1;
}
/**Function*************************************************************
Synopsis [Inserts the given mapping into the netlist.]
Description []
......@@ -557,8 +581,8 @@ int Ntl_ManInsertTestIf( Ntl_Man_t * p )
if ( !Ntl_ManExtract( p ) )
return 0;
assert( p->pAig != NULL );
Ntl_ManPerformSynthesis( p );
vMapping = Ntl_MappingIf( p->pAig );
// Ntl_ManPerformSynthesis( p );
vMapping = Ntl_MappingIf( p, p->pAig );
RetValue = Ntl_ManInsert( p, vMapping );
Vec_PtrFree( vMapping );
return RetValue;
......
src/aig/ntl/ntlDfs.c
......@@ -63,13 +63,27 @@ int Ntl_ManDfs_rec( Ntl_Man_t * p, Ntl_Net_t * pNet )
// add box inputs/outputs to COs/CIs
if ( Ntl_ObjIsBox(pObj) )
{
int LevelCur, LevelMax = -AIG_INFINITY;
Vec_IntPush( p->vBox1Cos, Aig_ManPoNum(p->pAig) );
Ntl_ObjForEachFanin( pObj, pNetFanin, i )
{
LevelCur = Aig_ObjLevel( Aig_Regular(pNetFanin->pFunc) );
LevelMax = AIG_MAX( LevelMax, LevelCur );
Vec_PtrPush( p->vCos, pNetFanin );
Aig_ObjCreatePo( p->pAig, pNetFanin->pFunc );
}
Ntl_ObjForEachFanout( pObj, pNetFanin, i )
{
Vec_PtrPush( p->vCis, pNetFanin );
pNetFanin->pFunc = Aig_ObjCreatePi( p->pAig );
Aig_ObjSetLevel( pNetFanin->pFunc, LevelMax + 1 );
}
//printf( "Creating fake PO with ID = %d.\n", Aig_ManPo(p->pAig, Vec_IntEntryLast(p->vBox1Cos))->Id );
}
// store the node
Vec_PtrPush( p->vNodes, pObj );
if ( Ntl_ObjIsNode(pObj) )
pNet->pFunc = Ntl_ManExtractAigNode( pObj );
pNet->nVisits = 2;
return 1;
}
......@@ -95,6 +109,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
assert( Vec_PtrSize(p->vCis) == 0 );
assert( Vec_PtrSize(p->vCos) == 0 );
assert( Vec_PtrSize(p->vNodes) == 0 );
assert( Vec_IntSize(p->vBox1Cos) == 0 );
// get the root model
pRoot = Vec_PtrEntry( p->vModels, 0 );
// collect primary inputs
......@@ -103,6 +118,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
assert( Ntl_ObjFanoutNum(pObj) == 1 );
pNet = Ntl_ObjFanout0(pObj);
Vec_PtrPush( p->vCis, pNet );
pNet->pFunc = Aig_ObjCreatePi( p->pAig );
if ( pNet->nVisits )
{
printf( "Ntl_ManDfs(): Primary input appears twice in the list.\n" );
......@@ -116,6 +132,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
assert( Ntl_ObjFanoutNum(pObj) == 1 );
pNet = Ntl_ObjFanout0(pObj);
Vec_PtrPush( p->vCis, pNet );
pNet->pFunc = Aig_ObjCreatePi( p->pAig );
if ( pNet->nVisits )
{
printf( "Ntl_ManDfs(): Latch output is duplicated or defined as a primary input.\n" );
......@@ -136,6 +153,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
return 0;
}
Vec_PtrPush( p->vCos, pNet );
Aig_ObjCreatePo( p->pAig, pNet->pFunc );
}
// visit the nodes starting from latch inputs outputs
Ntl_ModelForEachLatch( pRoot, pObj, i )
......@@ -150,6 +168,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
return 0;
}
Vec_PtrPush( p->vCos, pNet );
Aig_ObjCreatePo( p->pAig, pNet->pFunc );
}
// report the number of dangling objects
nUselessObjects = Ntl_ModelNodeNum(pRoot) + Ntl_ModelBoxNum(pRoot) - Vec_PtrSize(p->vNodes);
......
src/aig/ntl/ntlMan.c
......@@ -49,6 +49,7 @@ Ntl_Man_t * Ntl_ManAlloc( char * pFileName )
p->vCis = Vec_PtrAlloc( 1000 );
p->vCos = Vec_PtrAlloc( 1000 );
p->vNodes = Vec_PtrAlloc( 1000 );
p->vBox1Cos = Vec_IntAlloc( 1000 );
// start the manager
p->pMemObjs = Aig_MmFlexStart();
p->pMemSops = Aig_MmFlexStart();
......@@ -82,6 +83,7 @@ void Ntl_ManFree( Ntl_Man_t * p )
if ( p->vCis ) Vec_PtrFree( p->vCis );
if ( p->vCos ) Vec_PtrFree( p->vCos );
if ( p->vNodes ) Vec_PtrFree( p->vNodes );
if ( p->vBox1Cos ) Vec_IntFree( p->vBox1Cos );
if ( p->pMemObjs ) Aig_MmFlexStop( p->pMemObjs, 0 );
if ( p->pMemSops ) Aig_MmFlexStop( p->pMemSops, 0 );
if ( p->pAig ) Aig_ManStop( p->pAig );
......
src/aig/ntl/ntlMap.c
......@@ -412,7 +412,7 @@ void Ntk_ManSetIfParsDefault( If_Par_t * pPars )
SeeAlso []
***********************************************************************/
If_Man_t * Ntk_ManToIf( Aig_Man_t * p, If_Par_t * pPars )
If_Man_t * Ntk_ManToIf_old( Aig_Man_t * p, If_Par_t * pPars )
{
If_Man_t * pIfMan;
Aig_Obj_t * pNode;//, * pFanin, * pPrev;
......@@ -455,6 +455,58 @@ If_Man_t * Ntk_ManToIf( Aig_Man_t * p, If_Par_t * pPars )
/**Function*************************************************************
Synopsis [Load the network into FPGA manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
If_Man_t * Ntk_ManToIf( Aig_Man_t * p, If_Par_t * pPars )
{
If_Man_t * pIfMan;
Aig_Obj_t * pNode;//, * pFanin, * pPrev;
int i;
// start the mapping manager and set its parameters
pIfMan = If_ManStart( pPars );
// print warning about excessive memory usage
if ( 1.0 * Aig_ManObjNum(p) * pIfMan->nObjBytes / (1<<30) > 1.0 )
printf( "Warning: The mapper will allocate %.1f Gb for to represent the subject graph with %d AIG nodes.\n",
1.0 * Aig_ManObjNum(p) * pIfMan->nObjBytes / (1<<30), Aig_ManObjNum(p) );
// load the AIG into the mapper
Aig_ManForEachObj( p, pNode, i )
{
if ( Aig_ObjIsAnd(pNode) )
pNode->pData = (Aig_Obj_t *)If_ManCreateAnd( pIfMan,
If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ),
If_NotCond( (If_Obj_t *)Aig_ObjFanin1(pNode)->pData, Aig_ObjFaninC1(pNode) ) );
else if ( Aig_ObjIsPi(pNode) )
{
pNode->pData = If_ManCreateCi( pIfMan );
((If_Obj_t *)pNode->pData)->Level = pNode->Level;
}
else if ( Aig_ObjIsPo(pNode) )
If_ManCreateCo( pIfMan, If_NotCond( Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ) );
else if ( Aig_ObjIsConst1(pNode) )
Aig_ManConst1(p)->pData = If_ManConst1( pIfMan );
else // add the node to the mapper
assert( 0 );
// set up the choice node
// if ( Aig_AigNodeIsChoice( pNode ) )
// {
// pIfMan->nChoices++;
// for ( pPrev = pNode, pFanin = pNode->pData; pFanin; pPrev = pFanin, pFanin = pFanin->pData )
// If_ObjSetChoice( (If_Obj_t *)pPrev->pData, (If_Obj_t *)pFanin->pData );
// If_ManCreateChoice( pIfMan, (If_Obj_t *)pNode->pData );
// }
}
return pIfMan;
}
/**Function*************************************************************
Synopsis [Creates the mapped network.]
Description []
......@@ -491,10 +543,9 @@ Vec_Ptr_t * Ntk_ManFromIf( Aig_Man_t * p, If_Man_t * pMan )
Vec_IntWriteEntry( vIfToAig, pNode->Id, pObj->Id );
}
// create the mapping
If_ManScanMappingDirect( pMan );
vIfMap = If_ManCollectMappingDirect( pMan );
nVarsMax = pMan->pPars->nLutSize;
nWords = Aig_TruthWordNum( nVarsMax );
vIfMap = pMan->vMapped;
vMapping = Ntl_MappingAlloc( Vec_PtrSize(vIfMap) + (int)(Aig_ManConst1(p)->nRefs > 0), nVarsMax );
nLuts = 0;
if ( Aig_ManConst1(p)->nRefs > 0 )
......@@ -521,6 +572,7 @@ Vec_Ptr_t * Ntk_ManFromIf( Aig_Man_t * p, If_Man_t * pMan )
}
assert( nLuts == Vec_PtrSize(vMapping) );
Vec_IntFree( vIfToAig );
Vec_PtrFree( vIfMap );
return vMapping;
}
......@@ -535,7 +587,7 @@ Vec_Ptr_t * Ntk_ManFromIf( Aig_Man_t * p, If_Man_t * pMan )
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Ntl_MappingIf( Aig_Man_t * p )
Vec_Ptr_t * Ntl_MappingIf( Ntl_Man_t * pMan, Aig_Man_t * p )
{
Vec_Ptr_t * vMapping;
If_Par_t Pars, * pPars = &Pars;
......@@ -549,6 +601,7 @@ Vec_Ptr_t * Ntl_MappingIf( Aig_Man_t * p )
pIfMan = Ntk_ManToIf( p, pPars );
if ( pIfMan == NULL )
return NULL;
pIfMan->pManTim = Ntl_ManCreateTiming( pMan );
if ( !If_ManPerformMapping( pIfMan ) )
{
If_ManStop( pIfMan );
......
src/aig/ntl/ntlTime.c
......@@ -82,26 +82,19 @@ Tim_Man_t * Ntl_ManCreateTiming( Ntl_Man_t * p )
Vec_Ptr_t * vDelayTables;
Ntl_Mod_t * pRoot, * pModel;
Ntl_Obj_t * pObj;
int i, curPi, curPo, Entry;
int i, curPi, iBox, Entry;
assert( p->pAig != NULL );
pRoot = Vec_PtrEntry( p->vModels, 0 );
// start the timing manager
pMan = Tim_ManStart( Aig_ManPiNum(p->pAig), Aig_ManPoNum(p->pAig) );
// add arrival time info for the true PIs
pRoot = Vec_PtrEntry( p->vModels, 0 );
Ntl_ModelForEachPi( pRoot, pObj, i )
Tim_ManInitPiArrival( pMan, i, 0.0 );
// unpack the data in the arrival times
if ( pRoot->vArrivals )
Vec_IntForEachEntry( pRoot->vArrivals, Entry, i )
Tim_ManInitPiArrival( pMan, Entry, Vec_IntEntry(pRoot->vArrivals,++i) );
// add the required time into for the true POs
pRoot = Vec_PtrEntry( p->vModels, 0 );
Ntl_ModelForEachPo( pRoot, pObj, i )
Tim_ManInitPoRequired( pMan, i, AIG_INFINITY );
Tim_ManInitPiArrival( pMan, Entry, Aig_Int2Float(Vec_IntEntry(pRoot->vArrivals,++i)) );
// unpack the data in the required times
if ( pRoot->vRequireds )
Vec_IntForEachEntry( pRoot->vRequireds, Entry, i )
Tim_ManInitPoRequired( pMan, Entry, Vec_IntEntry(pRoot->vRequireds,++i) );
Tim_ManInitPoRequired( pMan, Entry, Aig_Int2Float(Vec_IntEntry(pRoot->vRequireds,++i)) );
// derive timing tables
vDelayTables = Vec_PtrAlloc( Vec_PtrSize(p->vModels) );
Ntl_ManForEachModel( p, pModel, i )
......@@ -112,17 +105,18 @@ Tim_Man_t * Ntl_ManCreateTiming( Ntl_Man_t * p )
}
Tim_ManSetDelayTables( pMan, vDelayTables );
// set up the boxes
curPi = Ntl_ModelPiNum(pRoot);
curPo = Ntl_ModelPoNum(pRoot);
iBox = 0;
curPi = Ntl_ModelCiNum(pRoot);
Ntl_ManForEachBox( p, pObj, i )
{
Tim_ManCreateBoxFirst( pMan, curPo, Ntl_ObjFanoutNum(pObj), curPi, Ntl_ObjFaninNum(pObj), pObj->pImplem->pDelayTable );
curPo += Ntl_ObjFanoutNum(pObj);
curPi += Ntl_ObjFaninNum(pObj);
Tim_ManCreateBoxFirst( pMan, Vec_IntEntry(p->vBox1Cos, iBox), Ntl_ObjFaninNum(pObj), curPi, Ntl_ObjFanoutNum(pObj), pObj->pImplem->pDelayTable );
curPi += Ntl_ObjFanoutNum(pObj);
iBox++;
}
// forget refs to the delay tables in the network
Ntl_ManForEachModel( p, pModel, i )
pModel->pDelayTable = NULL;
// Tim_ManPrint( pMan );
return pMan;
}
......
src/aig/tim/tim.h
......@@ -59,6 +59,7 @@ typedef struct Tim_Man_t_ Tim_Man_t;
/*=== time.c ===========================================================*/
extern Tim_Man_t * Tim_ManStart( int nPis, int nPos );
extern void Tim_ManStop( Tim_Man_t * p );
extern void Tim_ManPrint( Tim_Man_t * p );
extern void Tim_ManSetDelayTables( Tim_Man_t * p, Vec_Ptr_t * vDelayTables );
extern void Tim_ManCreateBox( Tim_Man_t * p, int * pIns, int nIns, int * pOuts, int nOuts, float * pDelayTable );
extern void Tim_ManCreateBoxFirst( Tim_Man_t * p, int firstIn, int nIns, int firstOut, int nOuts, float * pDelayTable );
......@@ -67,6 +68,8 @@ extern void Tim_ManInitPiArrival( Tim_Man_t * p, int iPi, float Delay
extern void Tim_ManInitPoRequired( Tim_Man_t * p, int iPo, float Delay );
extern void Tim_ManSetPoArrival( Tim_Man_t * p, int iPo, float Delay );
extern void Tim_ManSetPiRequired( Tim_Man_t * p, int iPi, float Delay );
extern void Tim_ManSetPoRequired( Tim_Man_t * p, int iPo, float Delay );
extern void Tim_ManSetPoRequiredAll( Tim_Man_t * p, float Delay );
extern float Tim_ManGetPiArrival( Tim_Man_t * p, int iPi );
extern float Tim_ManGetPoRequired( Tim_Man_t * p, int iPo );
......
src/base/abci/abc.c
......@@ -6367,7 +6367,7 @@ usage:
int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
{
FILE * pOut, * pErr;
Abc_Ntk_t * pNtk, * pNtkRes;
Abc_Ntk_t * pNtk;//, * pNtkRes;
int c;
int fBmc;
int nFrames;
......@@ -6544,7 +6544,7 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
}
*/
/*
// pNtkRes = Abc_NtkDar( pNtk );
// pNtkRes = Abc_NtkDarRetime( pNtk, nLevels, 1 );
pNtkRes = Abc_NtkPcmTest( pNtk, fVerbose );
......@@ -6556,18 +6556,18 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
}
// replace the current network
Abc_FrameReplaceCurrentNetwork( pAbc, pNtkRes );
*/
// Abc_NtkDarHaigRecord( pNtk );
// Abc_NtkDarClau( pNtk, nFrames, nLevels, fBmc, fVerbose, fVeryVerbose );
/*
if ( globalUtilOptind != 1 )
{
fprintf( pErr, "Command has failed.\n" );
return 1;
}
Abc_NtkDarTestBlif( argv[globalUtilOptind] );
*/
return 0;
usage:
fprintf( pErr, "usage: test [-vwh]\n" );
......
src/map/if/if.h
......@@ -36,6 +36,7 @@ extern "C" {
#include <time.h>
#include "vec.h"
#include "mem.h"
#include "tim.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
......@@ -127,7 +128,8 @@ struct If_Man_t_
Vec_Ptr_t * vCis; // the primary inputs
Vec_Ptr_t * vCos; // the primary outputs
Vec_Ptr_t * vObjs; // all objects
Vec_Ptr_t * vMapped; // objects used in the mapping
Vec_Ptr_t * vObjsRev; // reverse topological order of objects
// Vec_Ptr_t * vMapped; // objects used in the mapping
Vec_Ptr_t * vTemp; // temporary array
int nObjs[IF_VOID];// the number of objects by type
// various data
......@@ -161,6 +163,8 @@ struct If_Man_t_
If_Set_t * pMemAnd; // memory for AND cutsets
If_Set_t * pFreeList; // the list of free cutsets
int nSmallSupp; // the small support
// timing manager
Tim_Man_t * pManTim;
};
// priority cut
......@@ -202,6 +206,7 @@ struct If_Obj_t_
unsigned fVisit : 1; // multipurpose mark
unsigned Level : 22; // logic level of the node
int Id; // integer ID
int IdPio; // integer ID of PIs/POs
int nRefs; // the number of references
int nVisits; // the number of visits to this node
int nVisitsCopy; // the number of visits to this node
......@@ -236,7 +241,7 @@ static inline If_Obj_t * If_ManObj( If_Man_t * p, int i ) { r
static inline int If_ObjIsConst1( If_Obj_t * pObj ) { return pObj->Type == IF_CONST1; }
static inline int If_ObjIsCi( If_Obj_t * pObj ) { return pObj->Type == IF_CI; }
static inline int If_ObjIsCo( If_Obj_t * pObj ) { return pObj->Type == IF_CO; }
static inline int If_ObjIsPi( If_Obj_t * pObj ) { return If_ObjIsCi(pObj) && pObj->pFanin0 == NULL; }
//static inline int If_ObjIsPi( If_Obj_t * pObj ) { return If_ObjIsCi(pObj) && pObj->pFanin0 == NULL; }
static inline int If_ObjIsLatch( If_Obj_t * pObj ) { return If_ObjIsCi(pObj) && pObj->pFanin0 != NULL; }
static inline int If_ObjIsAnd( If_Obj_t * pObj ) { return pObj->Type == IF_AND; }
......@@ -298,9 +303,12 @@ static inline float If_CutLutArea( If_Man_t * p, If_Cut_t * pCut ) { r
Vec_PtrForEachEntryStart( p->vCos, pObj, i, If_ManCoNum(p) - p->pPars->nLatches )
#define If_ManForEachLatchOutput( p, pObj, i ) \
Vec_PtrForEachEntryStart( p->vCis, pObj, i, If_ManCiNum(p) - p->pPars->nLatches )
// iterator over all objects, including those currently not used
// iterator over all objects in topological order
#define If_ManForEachObj( p, pObj, i ) \
Vec_PtrForEachEntry( p->vObjs, pObj, i )
// iterator over all objects in reverse topological order
#define If_ManForEachObjReverse( p, pObj, i ) \
Vec_PtrForEachEntry( p->vObjsRev, pObj, i )
// iterator over logic nodes
#define If_ManForEachNode( p, pObj, i ) \
If_ManForEachObj( p, pObj, i ) if ( pObj->Type != IF_AND ) {} else
......@@ -385,6 +393,11 @@ extern float If_ManScanMappingSeq( If_Man_t * p );
extern void If_ManResetOriginalRefs( If_Man_t * p );
extern int If_ManCrossCut( If_Man_t * p );
extern Vec_Ptr_t * If_ManReverseOrder( If_Man_t * p );
extern void If_ManMarkMapping( If_Man_t * p );
extern Vec_Ptr_t * If_ManCollectMappingDirect( If_Man_t * p );
#ifdef __cplusplus
}
#endif
......
src/map/if/ifCore.c
......@@ -49,13 +49,15 @@ int If_ManPerformMapping( If_Man_t * p )
If_ManSetupCiCutSets( p );
// allocate memory for other cutsets
If_ManSetupSetAll( p, If_ManCrossCut(p) );
// derive reverse top order
p->vObjsRev = If_ManReverseOrder( p );
// try sequential mapping
if ( p->pPars->fSeqMap )
{
int RetValue;
// printf( "Currently sequential mapping is not performed.\n" );
RetValue = If_ManPerformMappingSeq( p );
int RetValue = 1;
printf( "Currently sequential mapping is not performed.\n" );
// RetValue = If_ManPerformMappingSeq( p );
return RetValue;
// return 1;
}
......
src/map/if/ifMan.c
......@@ -56,7 +56,7 @@ If_Man_t * If_ManStart( If_Par_t * pPars )
p->vCis = Vec_PtrAlloc( 100 );
p->vCos = Vec_PtrAlloc( 100 );
p->vObjs = Vec_PtrAlloc( 100 );
p->vMapped = Vec_PtrAlloc( 100 );
// p->vMapped = Vec_PtrAlloc( 100 );
p->vTemp = Vec_PtrAlloc( 100 );
// prepare the memory manager
p->nTruthWords = p->pPars->fTruth? If_CutTruthWords( p->pPars->nLutSize ) : 0;
......@@ -100,7 +100,7 @@ void If_ManRestart( If_Man_t * p )
Vec_PtrClear( p->vCis );
Vec_PtrClear( p->vCos );
Vec_PtrClear( p->vObjs );
Vec_PtrClear( p->vMapped );
// Vec_PtrClear( p->vMapped );
Vec_PtrClear( p->vTemp );
Mem_FixedRestart( p->pMemObj );
// create the constant node
......@@ -128,10 +128,11 @@ void If_ManStop( If_Man_t * p )
Vec_PtrFree( p->vCis );
Vec_PtrFree( p->vCos );
Vec_PtrFree( p->vObjs );
Vec_PtrFree( p->vMapped );
// Vec_PtrFree( p->vMapped );
Vec_PtrFree( p->vTemp );
if ( p->vObjsRev ) Vec_PtrFree( p->vObjsRev );
if ( p->vLatchOrder ) Vec_PtrFree( p->vLatchOrder );
if ( p->vLags ) Vec_IntFree( p->vLags );
if ( p->vLags ) Vec_IntFree( p->vLags );
Mem_FixedStop( p->pMemObj, 0 );
FREE( p->pMemCi );
FREE( p->pMemAnd );
......@@ -141,6 +142,8 @@ void If_ManStop( If_Man_t * p )
FREE( p->pPars->pTimesArr );
if ( p->pPars->pTimesReq )
FREE( p->pPars->pTimesReq );
if ( p->pManTim )
Tim_ManStop( p->pManTim );
free( p );
}
......@@ -160,6 +163,7 @@ If_Obj_t * If_ManCreateCi( If_Man_t * p )
If_Obj_t * pObj;
pObj = If_ManSetupObj( p );
pObj->Type = IF_CI;
pObj->IdPio = Vec_PtrSize( p->vCis );
Vec_PtrPush( p->vCis, pObj );
p->nObjs[IF_CI]++;
return pObj;
......@@ -180,10 +184,12 @@ If_Obj_t * If_ManCreateCo( If_Man_t * p, If_Obj_t * pDriver )
{
If_Obj_t * pObj;
pObj = If_ManSetupObj( p );
pObj->IdPio = Vec_PtrSize( p->vCos );
Vec_PtrPush( p->vCos, pObj );
pObj->Type = IF_CO;
pObj->fCompl0 = If_IsComplement(pDriver); pDriver = If_Regular(pDriver);
pObj->pFanin0 = pDriver; pDriver->nRefs++;
pObj->Level = pDriver->Level;
p->nObjs[IF_CO]++;
return pObj;
}
......
src/map/if/ifMap.c
......@@ -260,6 +260,7 @@ int If_ManPerformMappingRound( If_Man_t * p, int nCutsUsed, int Mode, int fPrepr
// ProgressBar * pProgress;
If_Obj_t * pObj;
int i, clk = clock();
float arrTime;
assert( Mode >= 0 && Mode <= 2 );
// set the sorting function
if ( Mode || p->pPars->fArea ) // area
......@@ -271,14 +272,56 @@ int If_ManPerformMappingRound( If_Man_t * p, int nCutsUsed, int Mode, int fPrepr
// set the cut number
p->nCutsUsed = nCutsUsed;
p->nCutsMerged = 0;
// map the internal nodes
// pProgress = Extra_ProgressBarStart( stdout, If_ManObjNum(p) );
// make sure the visit counters are all zero
If_ManForEachNode( p, pObj, i )
assert( pObj->nVisits == pObj->nVisitsCopy );
// map the internal nodes
if ( p->pManTim != NULL )
{
Tim_ManIncrementTravId( p->pManTim );
If_ManForEachObj( p, pObj, i )
{
if ( If_ObjIsAnd(pObj) )
{
If_ObjPerformMappingAnd( p, pObj, Mode, fPreprocess );
if ( pObj->fRepr )
If_ObjPerformMappingChoice( p, pObj, Mode, fPreprocess );
}
else if ( If_ObjIsCi(pObj) )
{
arrTime = Tim_ManGetPiArrival( p->pManTim, pObj->IdPio );
If_ObjSetArrTime( pObj, arrTime );
/*
if ( pObj->IdPio >= 2000 )
{
int x = 0;
printf( "+%d %6.3f ", pObj->IdPio, arrTime );
}
*/
}
else if ( If_ObjIsCo(pObj) )
{
arrTime = If_ObjArrTime( If_ObjFanin0(pObj) );
Tim_ManSetPoArrival( p->pManTim, pObj->IdPio, arrTime );
}
else if ( If_ObjIsConst1(pObj) )
{
}
else
assert( 0 );
}
// Tim_ManPrint( p->pManTim );
}
else
{
// Extra_ProgressBarUpdate( pProgress, i, pLabel );
If_ObjPerformMappingAnd( p, pObj, Mode, fPreprocess );
if ( pObj->fRepr )
If_ObjPerformMappingChoice( p, pObj, Mode, fPreprocess );
// pProgress = Extra_ProgressBarStart( stdout, If_ManObjNum(p) );
If_ManForEachNode( p, pObj, i )
{
// Extra_ProgressBarUpdate( pProgress, i, pLabel );
If_ObjPerformMappingAnd( p, pObj, Mode, fPreprocess );
if ( pObj->fRepr )
If_ObjPerformMappingChoice( p, pObj, Mode, fPreprocess );
}
}
// Extra_ProgressBarStop( pProgress );
// make sure the visit counters are all zero
......@@ -286,6 +329,7 @@ int If_ManPerformMappingRound( If_Man_t * p, int nCutsUsed, int Mode, int fPrepr
assert( pObj->nVisits == 0 );
// compute required times and stats
If_ManComputeRequired( p );
// Tim_ManPrint( p->pManTim );
if ( p->pPars->fVerbose )
{
char Symb = fPreprocess? 'P' : ((Mode == 0)? 'D' : ((Mode == 1)? 'F' : 'A'));
......
src/map/if/ifTime.c
......@@ -99,6 +99,13 @@ float If_CutDelay( If_Man_t * p, If_Cut_t * pCut )
{
If_CutForEachLeaf( p, pCut, pLeaf, i )
{
/*
if ( pLeaf->IdPio > 2000 )
{
int x = 0;
printf( "-%d %6.3f ", pLeaf->IdPio, If_ObjCutBest(pLeaf)->Delay );
}
*/
DelayCur = If_ObjCutBest(pLeaf)->Delay;
Delay = IF_MAX( Delay, DelayCur );
}
......
src/map/if/module.make
......@@ -3,7 +3,6 @@ SRC += src/map/if/ifCore.c \
src/map/if/ifMan.c \
src/map/if/ifMap.c \
src/map/if/ifReduce.c \
src/map/if/ifSeq.c \
src/map/if/ifTime.c \
src/map/if/ifTruth.c \
src/map/if/ifUtil.c
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