Commit 6ad22b4d by Alan Mishchenko

Version abc61122

parent da5e0785
......@@ -6,13 +6,13 @@ CP := cp
PROG := abc
MODULES := src/base/abc src/base/abci src/base/cmd src/base/io src/base/main \
MODULES := src/base/abc src/base/abci src/base/cmd src/base/io src/base/main src/base/ver \
src/aig/ivy src/aig/hop src/aig/rwt src/aig/deco src/mem/deco src/aig/ec \
src/bdd/cudd src/bdd/dsd src/bdd/epd src/bdd/mtr src/bdd/parse src/bdd/reo \
src/map/fpga src/map/pga src/map/mapper src/map/mio src/map/super \
src/map/fpga src/map/pga src/map/mapper src/map/mio src/map/super src/map/if \
src/misc/extra src/misc/mvc src/misc/st src/misc/util src/misc/espresso src/misc/nm src/misc/vec src/misc/hash \
src/opt/cut src/opt/dec src/opt/fxu src/opt/rwr src/opt/sim src/opt/ret \
src/sat/asat src/sat/bsat src/sat/csat src/sat/msat src/sat/fraig \
src/temp/ivy src/temp/aig src/temp/rwt src/temp/deco src/temp/mem src/temp/ver
src/sat/asat src/sat/bsat src/sat/csat src/sat/msat src/sat/fraig
default: $(PROG)
......
......@@ -43,6 +43,9 @@ alias psy print_symm
alias pun print_unate
alias q quit
alias r read
alias r3 retime -M 3
alias r3f retime -M 3 -f
alias r3b retime -M 3 -b
alias ren renode
alias rl read_blif
alias rb read_bench
......
......@@ -18,7 +18,7 @@
***********************************************************************/
#include "aig.h"
#include "hop.h"
#include "st.h"
////////////////////////////////////////////////////////////////////////
......
/**CFile****************************************************************
FileName [aigCheck.c]
FileName [hopCheck.c]
SystemName [ABC: Logic synthesis and verification system.]
......@@ -14,11 +14,11 @@
Date [Ver. 1.0. Started - May 11, 2006.]
Revision [$Id: aigCheck.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
Revision [$Id: hopCheck.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
***********************************************************************/
#include "aig.h"
#include "hop.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -39,66 +39,66 @@
SeeAlso []
***********************************************************************/
int Aig_ManCheck( Aig_Man_t * p )
int Hop_ManCheck( Hop_Man_t * p )
{
Aig_Obj_t * pObj, * pObj2;
Hop_Obj_t * pObj, * pObj2;
int i;
// check primary inputs
Aig_ManForEachPi( p, pObj, i )
Hop_ManForEachPi( p, pObj, i )
{
if ( Aig_ObjFanin0(pObj) || Aig_ObjFanin1(pObj) )
if ( Hop_ObjFanin0(pObj) || Hop_ObjFanin1(pObj) )
{
printf( "Aig_ManCheck: The PI node \"%p\" has fanins.\n", pObj );
printf( "Hop_ManCheck: The PI node \"%p\" has fanins.\n", pObj );
return 0;
}
}
// check primary outputs
Aig_ManForEachPo( p, pObj, i )
Hop_ManForEachPo( p, pObj, i )
{
if ( !Aig_ObjFanin0(pObj) )
if ( !Hop_ObjFanin0(pObj) )
{
printf( "Aig_ManCheck: The PO node \"%p\" has NULL fanin.\n", pObj );
printf( "Hop_ManCheck: The PO node \"%p\" has NULL fanin.\n", pObj );
return 0;
}
if ( Aig_ObjFanin1(pObj) )
if ( Hop_ObjFanin1(pObj) )
{
printf( "Aig_ManCheck: The PO node \"%p\" has second fanin.\n", pObj );
printf( "Hop_ManCheck: The PO node \"%p\" has second fanin.\n", pObj );
return 0;
}
}
// check internal nodes
Aig_ManForEachNode( p, pObj, i )
Hop_ManForEachNode( p, pObj, i )
{
if ( !Aig_ObjFanin0(pObj) || !Aig_ObjFanin1(pObj) )
if ( !Hop_ObjFanin0(pObj) || !Hop_ObjFanin1(pObj) )
{
printf( "Aig_ManCheck: The AIG has internal node \"%p\" with a NULL fanin.\n", pObj );
printf( "Hop_ManCheck: The AIG has internal node \"%p\" with a NULL fanin.\n", pObj );
return 0;
}
if ( Aig_ObjFanin0(pObj) >= Aig_ObjFanin1(pObj) )
if ( Hop_ObjFanin0(pObj) >= Hop_ObjFanin1(pObj) )
{
printf( "Aig_ManCheck: The AIG has node \"%p\" with a wrong ordering of fanins.\n", pObj );
printf( "Hop_ManCheck: The AIG has node \"%p\" with a wrong ordering of fanins.\n", pObj );
return 0;
}
pObj2 = Aig_TableLookup( p, pObj );
pObj2 = Hop_TableLookup( p, pObj );
if ( pObj2 != pObj )
{
printf( "Aig_ManCheck: Node \"%p\" is not in the structural hashing table.\n", pObj );
printf( "Hop_ManCheck: Node \"%p\" is not in the structural hashing table.\n", pObj );
return 0;
}
}
// count the total number of nodes
if ( Aig_ManObjNum(p) != 1 + Aig_ManPiNum(p) + Aig_ManPoNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) )
if ( Hop_ManObjNum(p) != 1 + Hop_ManPiNum(p) + Hop_ManPoNum(p) + Hop_ManAndNum(p) + Hop_ManExorNum(p) )
{
printf( "Aig_ManCheck: The number of created nodes is wrong.\n" );
printf( "Hop_ManCheck: The number of created nodes is wrong.\n" );
return 0;
}
// count the number of nodes in the table
if ( Aig_TableCountEntries(p) != Aig_ManAndNum(p) + Aig_ManExorNum(p) )
if ( Hop_TableCountEntries(p) != Hop_ManAndNum(p) + Hop_ManExorNum(p) )
{
printf( "Aig_ManCheck: The number of nodes in the structural hashing table is wrong.\n" );
printf( "Hop_ManCheck: The number of nodes in the structural hashing table is wrong.\n" );
return 0;
}
// if ( !Aig_ManIsAcyclic(p) )
// if ( !Hop_ManIsAcyclic(p) )
// return 0;
return 1;
}
......
/**CFile****************************************************************
FileName [aigMan.c]
FileName [hopMan.c]
SystemName [ABC: Logic synthesis and verification system.]
......@@ -14,11 +14,11 @@
Date [Ver. 1.0. Started - May 11, 2006.]
Revision [$Id: aig_.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
Revision [$Id: hopMan.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
***********************************************************************/
#include "aig.h"
#include "hop.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -39,12 +39,12 @@
SeeAlso []
***********************************************************************/
Aig_Man_t * Aig_ManStart()
Hop_Man_t * Hop_ManStart()
{
Aig_Man_t * p;
Hop_Man_t * p;
// start the manager
p = ALLOC( Aig_Man_t, 1 );
memset( p, 0, sizeof(Aig_Man_t) );
p = ALLOC( Hop_Man_t, 1 );
memset( p, 0, sizeof(Hop_Man_t) );
// perform initializations
p->nTravIds = 1;
p->fRefCount = 1;
......@@ -53,16 +53,16 @@ Aig_Man_t * Aig_ManStart()
p->vPis = Vec_PtrAlloc( 100 );
p->vPos = Vec_PtrAlloc( 100 );
// prepare the internal memory manager
Aig_ManStartMemory( p );
Hop_ManStartMemory( p );
// create the constant node
p->pConst1 = Aig_ManFetchMemory( p );
p->pConst1 = Hop_ManFetchMemory( p );
p->pConst1->Type = AIG_CONST1;
p->pConst1->fPhase = 1;
p->nCreated = 1;
// start the table
p->nTableSize = 10007;
p->pTable = ALLOC( Aig_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
p->pTable = ALLOC( Hop_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Hop_Obj_t *) * p->nTableSize );
return p;
}
......@@ -77,24 +77,24 @@ Aig_Man_t * Aig_ManStart()
SeeAlso []
***********************************************************************/
void Aig_ManStop( Aig_Man_t * p )
void Hop_ManStop( Hop_Man_t * p )
{
Aig_Obj_t * pObj;
Hop_Obj_t * pObj;
int i;
// make sure the nodes have clean marks
pObj = Aig_ManConst1(p);
pObj = Hop_ManConst1(p);
assert( !pObj->fMarkA && !pObj->fMarkB );
Aig_ManForEachPi( p, pObj, i )
Hop_ManForEachPi( p, pObj, i )
assert( !pObj->fMarkA && !pObj->fMarkB );
Aig_ManForEachPo( p, pObj, i )
Hop_ManForEachPo( p, pObj, i )
assert( !pObj->fMarkA && !pObj->fMarkB );
Aig_ManForEachNode( p, pObj, i )
Hop_ManForEachNode( p, pObj, i )
assert( !pObj->fMarkA && !pObj->fMarkB );
// print time
if ( p->time1 ) { PRT( "time1", p->time1 ); }
if ( p->time2 ) { PRT( "time2", p->time2 ); }
// Aig_TableProfile( p );
if ( p->vChunks ) Aig_ManStopMemory( p );
// Hop_TableProfile( p );
if ( p->vChunks ) Hop_ManStopMemory( p );
if ( p->vPis ) Vec_PtrFree( p->vPis );
if ( p->vPos ) Vec_PtrFree( p->vPos );
free( p->pTable );
......@@ -112,23 +112,23 @@ void Aig_ManStop( Aig_Man_t * p )
SeeAlso []
***********************************************************************/
int Aig_ManCleanup( Aig_Man_t * p )
int Hop_ManCleanup( Hop_Man_t * p )
{
Vec_Ptr_t * vNodes;
Aig_Obj_t * pNode;
Hop_Obj_t * pNode;
int i, nNodesOld;
assert( p->fRefCount );
nNodesOld = Aig_ManNodeNum(p);
nNodesOld = Hop_ManNodeNum(p);
// collect roots of dangling nodes
vNodes = Vec_PtrAlloc( 100 );
Aig_ManForEachNode( p, pNode, i )
if ( Aig_ObjRefs(pNode) == 0 )
Hop_ManForEachNode( p, pNode, i )
if ( Hop_ObjRefs(pNode) == 0 )
Vec_PtrPush( vNodes, pNode );
// recursively remove dangling nodes
Vec_PtrForEachEntry( vNodes, pNode, i )
Aig_ObjDelete_rec( p, pNode );
Hop_ObjDelete_rec( p, pNode );
Vec_PtrFree( vNodes );
return nNodesOld - Aig_ManNodeNum(p);
return nNodesOld - Hop_ManNodeNum(p);
}
/**Function*************************************************************
......@@ -142,14 +142,14 @@ int Aig_ManCleanup( Aig_Man_t * p )
SeeAlso []
***********************************************************************/
void Aig_ManPrintStats( Aig_Man_t * p )
void Hop_ManPrintStats( Hop_Man_t * p )
{
printf( "PI/PO = %d/%d. ", Aig_ManPiNum(p), Aig_ManPoNum(p) );
printf( "A = %7d. ", Aig_ManAndNum(p) );
printf( "X = %5d. ", Aig_ManExorNum(p) );
printf( "PI/PO = %d/%d. ", Hop_ManPiNum(p), Hop_ManPoNum(p) );
printf( "A = %7d. ", Hop_ManAndNum(p) );
printf( "X = %5d. ", Hop_ManExorNum(p) );
printf( "Cre = %7d. ", p->nCreated );
printf( "Del = %7d. ", p->nDeleted );
printf( "Lev = %3d. ", Aig_ManCountLevels(p) );
printf( "Lev = %3d. ", Hop_ManCountLevels(p) );
printf( "\n" );
}
......
/**CFile****************************************************************
FileName [aigMem.c]
FileName [hopMem.c]
SystemName [ABC: Logic synthesis and verification system.]
......@@ -14,11 +14,11 @@
Date [Ver. 1.0. Started - May 11, 2006.]
Revision [$Id: aigMem.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
Revision [$Id: hopMem.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
***********************************************************************/
#include "aig.h"
#include "hop.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -43,7 +43,7 @@
SeeAlso []
***********************************************************************/
void Aig_ManStartMemory( Aig_Man_t * p )
void Hop_ManStartMemory( Hop_Man_t * p )
{
p->vChunks = Vec_PtrAlloc( 128 );
p->vPages = Vec_PtrAlloc( 128 );
......@@ -60,7 +60,7 @@ void Aig_ManStartMemory( Aig_Man_t * p )
SeeAlso []
***********************************************************************/
void Aig_ManStopMemory( Aig_Man_t * p )
void Hop_ManStopMemory( Hop_Man_t * p )
{
void * pMemory;
int i;
......@@ -83,15 +83,15 @@ void Aig_ManStopMemory( Aig_Man_t * p )
SeeAlso []
***********************************************************************/
void Aig_ManAddMemory( Aig_Man_t * p )
void Hop_ManAddMemory( Hop_Man_t * p )
{
char * pMemory;
int i, nBytes;
assert( sizeof(Aig_Obj_t) <= 64 );
assert( sizeof(Hop_Obj_t) <= 64 );
assert( p->pListFree == NULL );
// assert( (Aig_ManObjNum(p) & IVY_PAGE_MASK) == 0 );
// assert( (Hop_ManObjNum(p) & IVY_PAGE_MASK) == 0 );
// allocate new memory page
nBytes = sizeof(Aig_Obj_t) * (1<<IVY_PAGE_SIZE) + 64;
nBytes = sizeof(Hop_Obj_t) * (1<<IVY_PAGE_SIZE) + 64;
pMemory = ALLOC( char, nBytes );
Vec_PtrPush( p->vChunks, pMemory );
// align memory at the 32-byte boundary
......@@ -99,11 +99,11 @@ void Aig_ManAddMemory( Aig_Man_t * p )
// remember the manager in the first entry
Vec_PtrPush( p->vPages, pMemory );
// break the memory down into nodes
p->pListFree = (Aig_Obj_t *)pMemory;
p->pListFree = (Hop_Obj_t *)pMemory;
for ( i = 1; i <= IVY_PAGE_MASK; i++ )
{
*((char **)pMemory) = pMemory + sizeof(Aig_Obj_t);
pMemory += sizeof(Aig_Obj_t);
*((char **)pMemory) = pMemory + sizeof(Hop_Obj_t);
pMemory += sizeof(Hop_Obj_t);
}
*((char **)pMemory) = NULL;
}
......
/**CFile****************************************************************
FileName [aigObj.c]
FileName [hopObj.c]
SystemName [ABC: Logic synthesis and verification system.]
......@@ -14,11 +14,11 @@
Date [Ver. 1.0. Started - May 11, 2006.]
Revision [$Id: aigObj.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
Revision [$Id: hopObj.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
***********************************************************************/
#include "aig.h"
#include "hop.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -39,10 +39,10 @@
SeeAlso []
***********************************************************************/
Aig_Obj_t * Aig_ObjCreatePi( Aig_Man_t * p )
Hop_Obj_t * Hop_ObjCreatePi( Hop_Man_t * p )
{
Aig_Obj_t * pObj;
pObj = Aig_ManFetchMemory( p );
Hop_Obj_t * pObj;
pObj = Hop_ManFetchMemory( p );
pObj->Type = AIG_PI;
Vec_PtrPush( p->vPis, pObj );
p->nObjs[AIG_PI]++;
......@@ -61,18 +61,18 @@ Aig_Obj_t * Aig_ObjCreatePi( Aig_Man_t * p )
SeeAlso []
***********************************************************************/
Aig_Obj_t * Aig_ObjCreatePo( Aig_Man_t * p, Aig_Obj_t * pDriver )
Hop_Obj_t * Hop_ObjCreatePo( Hop_Man_t * p, Hop_Obj_t * pDriver )
{
Aig_Obj_t * pObj;
pObj = Aig_ManFetchMemory( p );
Hop_Obj_t * pObj;
pObj = Hop_ManFetchMemory( p );
pObj->Type = AIG_PO;
Vec_PtrPush( p->vPos, pObj );
// add connections
pObj->pFanin0 = pDriver;
if ( p->fRefCount )
Aig_ObjRef( Aig_Regular(pDriver) );
Hop_ObjRef( Hop_Regular(pDriver) );
else
pObj->nRefs = Aig_ObjLevel( Aig_Regular(pDriver) );
pObj->nRefs = Hop_ObjLevel( Hop_Regular(pDriver) );
// update node counters of the manager
p->nObjs[AIG_PO]++;
p->nCreated++;
......@@ -90,19 +90,19 @@ Aig_Obj_t * Aig_ObjCreatePo( Aig_Man_t * p, Aig_Obj_t * pDriver )
SeeAlso []
***********************************************************************/
Aig_Obj_t * Aig_ObjCreate( Aig_Man_t * p, Aig_Obj_t * pGhost )
Hop_Obj_t * Hop_ObjCreate( Hop_Man_t * p, Hop_Obj_t * pGhost )
{
Aig_Obj_t * pObj;
assert( !Aig_IsComplement(pGhost) );
assert( Aig_ObjIsNode(pGhost) );
Hop_Obj_t * pObj;
assert( !Hop_IsComplement(pGhost) );
assert( Hop_ObjIsNode(pGhost) );
assert( pGhost == &p->Ghost );
// get memory for the new object
pObj = Aig_ManFetchMemory( p );
pObj = Hop_ManFetchMemory( p );
pObj->Type = pGhost->Type;
// add connections
Aig_ObjConnect( p, pObj, pGhost->pFanin0, pGhost->pFanin1 );
Hop_ObjConnect( p, pObj, pGhost->pFanin0, pGhost->pFanin1 );
// update node counters of the manager
p->nObjs[Aig_ObjType(pObj)]++;
p->nObjs[Hop_ObjType(pObj)]++;
p->nCreated++;
return pObj;
}
......@@ -118,10 +118,10 @@ Aig_Obj_t * Aig_ObjCreate( Aig_Man_t * p, Aig_Obj_t * pGhost )
SeeAlso []
***********************************************************************/
void Aig_ObjConnect( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFan0, Aig_Obj_t * pFan1 )
void Hop_ObjConnect( Hop_Man_t * p, Hop_Obj_t * pObj, Hop_Obj_t * pFan0, Hop_Obj_t * pFan1 )
{
assert( !Aig_IsComplement(pObj) );
assert( Aig_ObjIsNode(pObj) );
assert( !Hop_IsComplement(pObj) );
assert( Hop_ObjIsNode(pObj) );
// add the first fanin
pObj->pFanin0 = pFan0;
pObj->pFanin1 = pFan1;
......@@ -129,14 +129,14 @@ void Aig_ObjConnect( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFan0, Aig_Obj
if ( p->fRefCount )
{
if ( pFan0 != NULL )
Aig_ObjRef( Aig_ObjFanin0(pObj) );
Hop_ObjRef( Hop_ObjFanin0(pObj) );
if ( pFan1 != NULL )
Aig_ObjRef( Aig_ObjFanin1(pObj) );
Hop_ObjRef( Hop_ObjFanin1(pObj) );
}
else
pObj->nRefs = Aig_ObjLevelNew( pObj );
pObj->nRefs = Hop_ObjLevelNew( pObj );
// add the node to the structural hash table
Aig_TableInsert( p, pObj );
Hop_TableInsert( p, pObj );
}
/**Function*************************************************************
......@@ -150,17 +150,17 @@ void Aig_ObjConnect( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFan0, Aig_Obj
SeeAlso []
***********************************************************************/
void Aig_ObjDisconnect( Aig_Man_t * p, Aig_Obj_t * pObj )
void Hop_ObjDisconnect( Hop_Man_t * p, Hop_Obj_t * pObj )
{
assert( !Aig_IsComplement(pObj) );
assert( Aig_ObjIsNode(pObj) );
assert( !Hop_IsComplement(pObj) );
assert( Hop_ObjIsNode(pObj) );
// remove connections
if ( pObj->pFanin0 != NULL )
Aig_ObjDeref(Aig_ObjFanin0(pObj));
Hop_ObjDeref(Hop_ObjFanin0(pObj));
if ( pObj->pFanin1 != NULL )
Aig_ObjDeref(Aig_ObjFanin1(pObj));
Hop_ObjDeref(Hop_ObjFanin1(pObj));
// remove the node from the structural hash table
Aig_TableDelete( p, pObj );
Hop_TableDelete( p, pObj );
// add the first fanin
pObj->pFanin0 = NULL;
pObj->pFanin1 = NULL;
......@@ -177,21 +177,21 @@ void Aig_ObjDisconnect( Aig_Man_t * p, Aig_Obj_t * pObj )
SeeAlso []
***********************************************************************/
void Aig_ObjDelete( Aig_Man_t * p, Aig_Obj_t * pObj )
void Hop_ObjDelete( Hop_Man_t * p, Hop_Obj_t * pObj )
{
assert( !Aig_IsComplement(pObj) );
assert( !Aig_ObjIsTerm(pObj) );
assert( Aig_ObjRefs(pObj) == 0 );
assert( !Hop_IsComplement(pObj) );
assert( !Hop_ObjIsTerm(pObj) );
assert( Hop_ObjRefs(pObj) == 0 );
// update node counters of the manager
p->nObjs[pObj->Type]--;
p->nDeleted++;
// remove connections
Aig_ObjDisconnect( p, pObj );
Hop_ObjDisconnect( p, pObj );
// remove PIs/POs from the arrays
if ( Aig_ObjIsPi(pObj) )
if ( Hop_ObjIsPi(pObj) )
Vec_PtrRemove( p->vPis, pObj );
// free the node
Aig_ManRecycleMemory( p, pObj );
Hop_ManRecycleMemory( p, pObj );
}
/**Function*************************************************************
......@@ -205,20 +205,20 @@ void Aig_ObjDelete( Aig_Man_t * p, Aig_Obj_t * pObj )
SeeAlso []
***********************************************************************/
void Aig_ObjDelete_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
void Hop_ObjDelete_rec( Hop_Man_t * p, Hop_Obj_t * pObj )
{
Aig_Obj_t * pFanin0, * pFanin1;
assert( !Aig_IsComplement(pObj) );
if ( Aig_ObjIsConst1(pObj) || Aig_ObjIsPi(pObj) )
Hop_Obj_t * pFanin0, * pFanin1;
assert( !Hop_IsComplement(pObj) );
if ( Hop_ObjIsConst1(pObj) || Hop_ObjIsPi(pObj) )
return;
assert( Aig_ObjIsNode(pObj) );
pFanin0 = Aig_ObjFanin0(pObj);
pFanin1 = Aig_ObjFanin1(pObj);
Aig_ObjDelete( p, pObj );
if ( pFanin0 && !Aig_ObjIsNone(pFanin0) && Aig_ObjRefs(pFanin0) == 0 )
Aig_ObjDelete_rec( p, pFanin0 );
if ( pFanin1 && !Aig_ObjIsNone(pFanin1) && Aig_ObjRefs(pFanin1) == 0 )
Aig_ObjDelete_rec( p, pFanin1 );
assert( Hop_ObjIsNode(pObj) );
pFanin0 = Hop_ObjFanin0(pObj);
pFanin1 = Hop_ObjFanin1(pObj);
Hop_ObjDelete( p, pObj );
if ( pFanin0 && !Hop_ObjIsNone(pFanin0) && Hop_ObjRefs(pFanin0) == 0 )
Hop_ObjDelete_rec( p, pFanin0 );
if ( pFanin1 && !Hop_ObjIsNone(pFanin1) && Hop_ObjRefs(pFanin1) == 0 )
Hop_ObjDelete_rec( p, pFanin1 );
}
////////////////////////////////////////////////////////////////////////
......
/**CFile****************************************************************
FileName [aigTable.c]
FileName [hopTable.c]
SystemName [ABC: Logic synthesis and verification system.]
......@@ -14,40 +14,40 @@
Date [Ver. 1.0. Started - May 11, 2006. ]
Revision [$Id: aigTable.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
Revision [$Id: hopTable.c,v 1.00 2006/05/11 00:00:00 alanmi Exp $]
***********************************************************************/
#include "aig.h"
#include "hop.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
// hashing the node
static unsigned long Aig_Hash( Aig_Obj_t * pObj, int TableSize )
static unsigned long Hop_Hash( Hop_Obj_t * pObj, int TableSize )
{
unsigned long Key = Aig_ObjIsExor(pObj) * 1699;
Key ^= (long)Aig_ObjFanin0(pObj) * 7937;
Key ^= (long)Aig_ObjFanin1(pObj) * 2971;
Key ^= Aig_ObjFaninC0(pObj) * 911;
Key ^= Aig_ObjFaninC1(pObj) * 353;
unsigned long Key = Hop_ObjIsExor(pObj) * 1699;
Key ^= (long)Hop_ObjFanin0(pObj) * 7937;
Key ^= (long)Hop_ObjFanin1(pObj) * 2971;
Key ^= Hop_ObjFaninC0(pObj) * 911;
Key ^= Hop_ObjFaninC1(pObj) * 353;
return Key % TableSize;
}
// returns the place where this node is stored (or should be stored)
static Aig_Obj_t ** Aig_TableFind( Aig_Man_t * p, Aig_Obj_t * pObj )
static Hop_Obj_t ** Hop_TableFind( Hop_Man_t * p, Hop_Obj_t * pObj )
{
int i;
assert( Aig_ObjChild0(pObj) && Aig_ObjChild1(pObj) );
assert( Aig_ObjChild0(pObj) < Aig_ObjChild1(pObj) );
for ( i = Aig_Hash(pObj, p->nTableSize); p->pTable[i]; i = (i+1) % p->nTableSize )
assert( Hop_ObjChild0(pObj) && Hop_ObjChild1(pObj) );
assert( Hop_ObjChild0(pObj) < Hop_ObjChild1(pObj) );
for ( i = Hop_Hash(pObj, p->nTableSize); p->pTable[i]; i = (i+1) % p->nTableSize )
if ( p->pTable[i] == pObj )
break;
return p->pTable + i;
}
static void Aig_TableResize( Aig_Man_t * p );
static void Hop_TableResize( Hop_Man_t * p );
static unsigned int Cudd_PrimeAig( unsigned int p );
////////////////////////////////////////////////////////////////////////
......@@ -65,19 +65,19 @@ static unsigned int Cudd_PrimeAig( unsigned int p );
SeeAlso []
***********************************************************************/
Aig_Obj_t * Aig_TableLookup( Aig_Man_t * p, Aig_Obj_t * pGhost )
Hop_Obj_t * Hop_TableLookup( Hop_Man_t * p, Hop_Obj_t * pGhost )
{
int i;
assert( !Aig_IsComplement(pGhost) );
assert( Aig_ObjChild0(pGhost) && Aig_ObjChild1(pGhost) );
assert( Aig_ObjChild0(pGhost) < Aig_ObjChild1(pGhost) );
if ( p->fRefCount && (!Aig_ObjRefs(Aig_ObjFanin0(pGhost)) || !Aig_ObjRefs(Aig_ObjFanin1(pGhost))) )
assert( !Hop_IsComplement(pGhost) );
assert( Hop_ObjChild0(pGhost) && Hop_ObjChild1(pGhost) );
assert( Hop_ObjChild0(pGhost) < Hop_ObjChild1(pGhost) );
if ( p->fRefCount && (!Hop_ObjRefs(Hop_ObjFanin0(pGhost)) || !Hop_ObjRefs(Hop_ObjFanin1(pGhost))) )
return NULL;
for ( i = Aig_Hash(pGhost, p->nTableSize); p->pTable[i]; i = (i+1) % p->nTableSize )
for ( i = Hop_Hash(pGhost, p->nTableSize); p->pTable[i]; i = (i+1) % p->nTableSize )
{
if ( Aig_ObjChild0(p->pTable[i]) == Aig_ObjChild0(pGhost) &&
Aig_ObjChild1(p->pTable[i]) == Aig_ObjChild1(pGhost) &&
Aig_ObjType(p->pTable[i]) == Aig_ObjType(pGhost) )
if ( Hop_ObjChild0(p->pTable[i]) == Hop_ObjChild0(pGhost) &&
Hop_ObjChild1(p->pTable[i]) == Hop_ObjChild1(pGhost) &&
Hop_ObjType(p->pTable[i]) == Hop_ObjType(pGhost) )
return p->pTable[i];
}
return NULL;
......@@ -94,14 +94,14 @@ Aig_Obj_t * Aig_TableLookup( Aig_Man_t * p, Aig_Obj_t * pGhost )
SeeAlso []
***********************************************************************/
void Aig_TableInsert( Aig_Man_t * p, Aig_Obj_t * pObj )
void Hop_TableInsert( Hop_Man_t * p, Hop_Obj_t * pObj )
{
Aig_Obj_t ** ppPlace;
assert( !Aig_IsComplement(pObj) );
assert( Aig_TableLookup(p, pObj) == NULL );
if ( p->nTableSize < 2 * Aig_ManNodeNum(p) )
Aig_TableResize( p );
ppPlace = Aig_TableFind( p, pObj );
Hop_Obj_t ** ppPlace;
assert( !Hop_IsComplement(pObj) );
assert( Hop_TableLookup(p, pObj) == NULL );
if ( p->nTableSize < 2 * Hop_ManNodeNum(p) )
Hop_TableResize( p );
ppPlace = Hop_TableFind( p, pObj );
assert( *ppPlace == NULL );
*ppPlace = pObj;
}
......@@ -117,12 +117,12 @@ void Aig_TableInsert( Aig_Man_t * p, Aig_Obj_t * pObj )
SeeAlso []
***********************************************************************/
void Aig_TableDelete( Aig_Man_t * p, Aig_Obj_t * pObj )
void Hop_TableDelete( Hop_Man_t * p, Hop_Obj_t * pObj )
{
Aig_Obj_t * pEntry, ** ppPlace;
Hop_Obj_t * pEntry, ** ppPlace;
int i;
assert( !Aig_IsComplement(pObj) );
ppPlace = Aig_TableFind( p, pObj );
assert( !Hop_IsComplement(pObj) );
ppPlace = Hop_TableFind( p, pObj );
assert( *ppPlace == pObj ); // node should be in the table
*ppPlace = NULL;
// rehash the adjacent entries
......@@ -131,7 +131,7 @@ void Aig_TableDelete( Aig_Man_t * p, Aig_Obj_t * pObj )
{
pEntry = p->pTable[i];
p->pTable[i] = 0;
Aig_TableInsert( p, pEntry );
Hop_TableInsert( p, pEntry );
}
}
......@@ -146,7 +146,7 @@ void Aig_TableDelete( Aig_Man_t * p, Aig_Obj_t * pObj )
SeeAlso []
***********************************************************************/
int Aig_TableCountEntries( Aig_Man_t * p )
int Hop_TableCountEntries( Hop_Man_t * p )
{
int i, Counter = 0;
for ( i = 0; i < p->nTableSize; i++ )
......@@ -165,18 +165,18 @@ int Aig_TableCountEntries( Aig_Man_t * p )
SeeAlso []
***********************************************************************/
void Aig_TableResize( Aig_Man_t * p )
void Hop_TableResize( Hop_Man_t * p )
{
Aig_Obj_t ** pTableOld, ** ppPlace;
Hop_Obj_t ** pTableOld, ** ppPlace;
int nTableSizeOld, Counter, nEntries, e, clk;
clk = clock();
// save the old table
pTableOld = p->pTable;
nTableSizeOld = p->nTableSize;
// get the new table
p->nTableSize = Cudd_PrimeAig( 5 * Aig_ManNodeNum(p) );
p->pTable = ALLOC( Aig_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
p->nTableSize = Cudd_PrimeAig( 5 * Hop_ManNodeNum(p) );
p->pTable = ALLOC( Hop_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Hop_Obj_t *) * p->nTableSize );
// rehash the entries from the old table
Counter = 0;
for ( e = 0; e < nTableSizeOld; e++ )
......@@ -185,11 +185,11 @@ clk = clock();
continue;
Counter++;
// get the place where this entry goes in the table table
ppPlace = Aig_TableFind( p, pTableOld[e] );
ppPlace = Hop_TableFind( p, pTableOld[e] );
assert( *ppPlace == NULL ); // should not be in the table
*ppPlace = pTableOld[e];
}
nEntries = Aig_ManNodeNum(p);
nEntries = Hop_ManNodeNum(p);
// assert( Counter == nEntries );
// printf( "Increasing the structural table size from %6d to %6d. ", nTableSizeOld, p->nTableSize );
// PRT( "Time", clock() - clk );
......@@ -208,7 +208,7 @@ clk = clock();
SeeAlso []
******************************************************************************/
void Aig_TableProfile( Aig_Man_t * p )
void Hop_TableProfile( Hop_Man_t * p )
{
int i, Counter = 0;
for ( i = 0; i < p->nTableSize; i++ )
......
SRC += src/aig/hop/hopBalance.c \
src/aig/hop/hopCheck.c \
src/aig/hop/hopDfs.c \
src/aig/hop/hopMan.c \
src/aig/hop/hopMem.c \
src/aig/hop/hopObj.c \
src/aig/hop/hopOper.c \
src/aig/hop/hopTable.c \
src/aig/hop/hopUtil.c
......@@ -139,10 +139,10 @@ struct Ivy_FraigParams_t_
int fDoSparse; // skip sparse functions
int nBTLimitNode; // conflict limit at a node
int nBTLimitMiter; // conflict limit at an output
int nBTLimitGlobal; // conflict limit global
int nInsLimitNode; // inspection limit at a node
int nInsLimitMiter; // inspection limit at an output
int nInsLimitGlobal; // inspection limit global
// int nBTLimitGlobal; // conflict limit global
// int nInsLimitNode; // inspection limit at a node
// int nInsLimitMiter; // inspection limit at an output
// int nInsLimitGlobal; // inspection limit global
};
......
......@@ -411,7 +411,7 @@ int Ivy_ManLatchIsSelfFeed( Ivy_Obj_t * pLatch )
int Ivy_ManPropagateBuffers( Ivy_Man_t * p, int fUpdateLevel )
{
Ivy_Obj_t * pNode;
int LimitFactor = 5;
int LimitFactor = 10;
int NodeBeg = Ivy_ManNodeNum(p);
int nSteps;
for ( nSteps = 0; Vec_PtrSize(p->vBufs) > 0; nSteps++ )
......@@ -435,7 +435,7 @@ int Ivy_ManPropagateBuffers( Ivy_Man_t * p, int fUpdateLevel )
break;
}
}
printf( "Number of steps = %d. Nodes beg = %d. Nodes end = %d.\n", nSteps, NodeBeg, Ivy_ManNodeNum(p) );
// printf( "Number of steps = %d. Nodes beg = %d. Nodes end = %d.\n", nSteps, NodeBeg, Ivy_ManNodeNum(p) );
return nSteps;
}
......
......@@ -53,7 +53,7 @@ static inline int Ivy_CutHashValue( int NodeId ) { return 1 << (NodeId % 31); }
***********************************************************************/
int Ivy_ManRewriteSeq( Ivy_Man_t * p, int fUseZeroCost, int fVerbose )
{
{
Rwt_Man_t * pManRwt;
Ivy_Obj_t * pNode;
int i, nNodes, nGain;
......
SRC += src/aig/ivy/ivyBalance.c \
src/aig/ivy/ivyCanon.c \
src/aig/ivy/ivyCheck.c \
src/aig/ivy/ivyCut.c \
src/aig/ivy/ivyCutTrav.c \
src/aig/ivy/ivyDfs.c \
src/aig/ivy/ivyDsd.c \
src/aig/ivy/ivyFanout.c \
src/aig/ivy/ivyFastMap.c \
src/aig/ivy/ivyFraig.c \
src/aig/ivy/ivyHaig.c \
src/aig/ivy/ivyIsop.c \
src/aig/ivy/ivyMan.c \
src/aig/ivy/ivyMem.c \
src/aig/ivy/ivyMulti.c \
src/aig/ivy/ivyObj.c \
src/aig/ivy/ivyOper.c \
src/aig/ivy/ivyResyn.c \
src/aig/ivy/ivyRwr.c \
src/aig/ivy/ivySeq.c \
src/aig/ivy/ivyShow.c \
src/aig/ivy/ivyTable.c \
src/aig/ivy/ivyUtil.c
SRC += src/aig/mem/mem.c
SRC += src/hop/rwt/rwtDec.c \
src/hop/rwt/rwtMan.c \
src/hop/rwt/rwtUtil.c
......@@ -36,7 +36,7 @@ extern "C" {
#include <time.h>
#include "cuddInt.h"
#include "aig.h"
#include "hop.h"
#include "extra.h"
#include "solver.h"
#include "vec.h"
......@@ -178,7 +178,6 @@ struct Abc_Ntk_t_
Vec_Ptr_t * vPios; // the array of PIOs
Vec_Ptr_t * vAsserts; // the array of assertions
Vec_Ptr_t * vBoxes; // the array of boxes
Vec_Ptr_t * vCutSet; // the array of cutset nodes (used in the sequential AIG)
// the number of living objects
int nObjs; // the number of live objs
int nObjCounts[ABC_OBJ_NUMBER]; // the number of objects by type
......@@ -196,8 +195,6 @@ struct Abc_Ntk_t_
Extra_MmStep_t * pMmStep; // memory manager for arrays
void * pManFunc; // functionality manager (AIG manager, BDD manager, or memory manager for SOPs)
// Abc_Lib_t * pVerLib; // for structural verilog designs
void * pManGlob; // the global BDD manager
Vec_Ptr_t * vFuncsGlob; // the global BDDs of CO functions
Abc_ManTime_t * pManTime; // the timing manager (for mapped networks) stores arrival/required times for all nodes
void * pManCut; // the cut manager (for AIGs) stores information about the cuts computed for the nodes
int LevelMax; // maximum number of levels
......@@ -206,10 +203,8 @@ struct Abc_Ntk_t_
int * pModel; // counter-example (for miters)
Abc_Ntk_t * pExdc; // the EXDC network (if given)
void * pData; // misc
// skew values (for latches)
float maxMeanCycle; // maximum mean cycle time
float globalSkew; // global skewing
Vec_Flt_t * vSkews; // endpoint skewing
// node attributes
Vec_Ptr_t * vAttrs; // managers of various node attributes (node functionality, global BDDs, etc)
};
struct Abc_Lib_t_
......@@ -282,7 +277,6 @@ static inline int Abc_NtkCiNum( Abc_Ntk_t * pNtk ) { return Ve
static inline int Abc_NtkCoNum( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vCos); }
static inline int Abc_NtkAssertNum( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vAsserts); }
static inline int Abc_NtkBoxNum( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vBoxes); }
static inline int Abc_NtkCutSetNodeNum( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vCutSet); }
static inline int Abc_NtkBiNum( Abc_Ntk_t * pNtk ) { return pNtk->nObjCounts[ABC_OBJ_BI]; }
static inline int Abc_NtkBoNum( Abc_Ntk_t * pNtk ) { return pNtk->nObjCounts[ABC_OBJ_BO]; }
static inline int Abc_NtkNetNum( Abc_Ntk_t * pNtk ) { return pNtk->nObjCounts[ABC_OBJ_NET]; }
......@@ -315,7 +309,6 @@ static inline Abc_Obj_t * Abc_NtkCi( Abc_Ntk_t * pNtk, int i ) { return (A
static inline Abc_Obj_t * Abc_NtkCo( Abc_Ntk_t * pNtk, int i ) { return (Abc_Obj_t *)Vec_PtrEntry( pNtk->vCos, i ); }
static inline Abc_Obj_t * Abc_NtkAssert( Abc_Ntk_t * pNtk, int i ) { return (Abc_Obj_t *)Vec_PtrEntry( pNtk->vAsserts, i );}
static inline Abc_Obj_t * Abc_NtkBox( Abc_Ntk_t * pNtk, int i ) { return (Abc_Obj_t *)Vec_PtrEntry( pNtk->vBoxes, i ); }
static inline Abc_Obj_t * Abc_NtkCutSetNode( Abc_Ntk_t * pNtk, int i){ return (Abc_Obj_t *)Vec_PtrEntry( pNtk->vCutSet, i ); }
// reading data members of the object
static inline unsigned Abc_ObjType( Abc_Obj_t * pObj ) { return pObj->Type; }
......@@ -409,9 +402,12 @@ static inline bool Abc_LatchIsInit1( Abc_Obj_t * pLatch ) { assert(Ab
static inline bool Abc_LatchIsInitDc( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return pLatch->pData == (void *)ABC_INIT_DC; }
static inline int Abc_LatchInit( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return (int)pLatch->pData; }
// skewing latches
static inline void Abc_NtkSetLatSkew ( Abc_Ntk_t * pNtk, int lat, float skew ) { Vec_FltWriteEntry( pNtk->vSkews, lat, skew ); }
static inline float Abc_NtkGetLatSkew ( Abc_Ntk_t * pNtk, int lat ) { if (lat >= Vec_FltSize( pNtk->vSkews )) return 0; else return Vec_FltEntry( pNtk->vSkews, lat ); }
// global BDDs of the nodes
static inline void * Abc_NtkGlobalBdds( Abc_Ntk_t * pNtk ) { return (void *)Vec_PtrEntry(pNtk->vAttrs, VEC_ATTR_GLOBAL_BDD); }
static inline DdManager * Abc_NtkGlobalBddMan( Abc_Ntk_t * pNtk ) { return (DdManager *)Vec_AttMan( Abc_NtkGlobalBdds(pNtk) ); }
static inline DdNode ** Abc_NtkGlobalBddArray( Abc_Ntk_t * pNtk ) { return (DdNode **)Vec_AttArray( Abc_NtkGlobalBdds(pNtk) ); }
static inline DdNode * Abc_ObjGlobalBdd( Abc_Obj_t * pObj ) { return (DdNode *)Vec_AttEntry( Abc_NtkGlobalBdds(pObj->pNtk), pObj->Id ); }
static inline void Abc_ObjSetGlobalBdd( Abc_Obj_t * pObj, DdNode * bF ) { Vec_AttWriteEntry( Abc_NtkGlobalBdds(pObj->pNtk), pObj->Id, bF ); }
// outputs the runtime in seconds
#define PRT(a,t) printf("%s = ", (a)); printf("%6.2f sec\n", (float)(t)/(float)(CLOCKS_PER_SEC))
......@@ -436,9 +432,6 @@ static inline float Abc_NtkGetLatSkew ( Abc_Ntk_t * pNtk, int lat )
#define Abc_AigForEachAnd( pNtk, pNode, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vObjs)) && (((pNode) = Abc_NtkObj(pNtk, i)), 1); i++ ) \
if ( (pNode) == NULL || !Abc_AigNodeIsAnd(pNode) ) {} else
#define Abc_SeqForEachCutsetNode( pNtk, pNode, i ) \
for ( i = 0; (i < Abc_NtkCutSetNodeNum(pNtk)) && (((pNode) = Abc_NtkCutSetNode(pNtk, i)), 1); i++ )\
if ( (pNode) == NULL ) {} else
// various boxes
#define Abc_NtkForEachBox( pNtk, pObj, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vBoxes)) && (((pObj) = Abc_NtkBox(pNtk, i)), 1); i++ )
......@@ -489,7 +482,7 @@ extern Abc_Aig_t * Abc_AigAlloc( Abc_Ntk_t * pNtk );
extern void Abc_AigFree( Abc_Aig_t * pMan );
extern int Abc_AigCleanup( Abc_Aig_t * pMan );
extern bool Abc_AigCheck( Abc_Aig_t * pMan );
extern int Abc_AigGetLevelNum( Abc_Ntk_t * pNtk );
extern int Abc_AigLevel( Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_AigConst1( Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_AigAnd( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 );
extern Abc_Obj_t * Abc_AigAndLookup( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 );
......@@ -536,7 +529,8 @@ extern Vec_Ptr_t * Abc_NtkSupport( Abc_Ntk_t * pNtk );
extern Vec_Ptr_t * Abc_NtkNodeSupport( Abc_Ntk_t * pNtk, Abc_Obj_t ** ppNodes, int nNodes );
extern Vec_Ptr_t * Abc_AigDfs( Abc_Ntk_t * pNtk, int fCollectAll, int fCollectCos );
extern Vec_Vec_t * Abc_DfsLevelized( Abc_Obj_t * pNode, bool fTfi );
extern int Abc_NtkGetLevelNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkLevel( Abc_Ntk_t * pNtk );
extern int Abc_NtkLevelReverse( Abc_Ntk_t * pNtk );
extern bool Abc_NtkIsAcyclic( Abc_Ntk_t * pNtk );
extern Vec_Ptr_t * Abc_AigGetLevelizedOrder( Abc_Ntk_t * pNtk, int fCollectCis );
/*=== abcFanio.c ==========================================================*/
......@@ -652,8 +646,8 @@ extern Abc_Ntk_t * Abc_NtkAigToLogicSopBench( Abc_Ntk_t * pNtk );
/*=== abcNtbdd.c ==========================================================*/
extern Abc_Ntk_t * Abc_NtkDeriveFromBdd( DdManager * dd, DdNode * bFunc, char * pNamePo, Vec_Ptr_t * vNamesPi );
extern Abc_Ntk_t * Abc_NtkBddToMuxes( Abc_Ntk_t * pNtk );
extern DdManager * Abc_NtkGlobalBdds( Abc_Ntk_t * pNtk, int fBddSizeMax, int fLatchOnly, int fReorder, int fVerbose );
extern void Abc_NtkFreeGlobalBdds( Abc_Ntk_t * pNtk );
extern DdManager * Abc_NtkBuildGlobalBdds( Abc_Ntk_t * pNtk, int fBddSizeMax, int fDropInternal, int fReorder, int fVerbose );
extern DdManager * Abc_NtkFreeGlobalBdds( Abc_Ntk_t * pNtk, int fFreeMan );
/*=== abcNtk.c ==========================================================*/
extern Abc_Ntk_t * Abc_NtkAlloc( Abc_NtkType_t Type, Abc_NtkFunc_t Func, int fUseMemMan );
extern Abc_Ntk_t * Abc_NtkStartFrom( Abc_Ntk_t * pNtk, Abc_NtkType_t Type, Abc_NtkFunc_t Func );
......@@ -759,7 +753,7 @@ extern Abc_Ntk_t * Abc_NtkTopmost( Abc_Ntk_t * pNtk, int nLevels );
/*=== abcSweep.c ==========================================================*/
extern int Abc_NtkSweep( Abc_Ntk_t * pNtk, int fVerbose );
extern int Abc_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose );
extern int Abc_NtkCleanupSeq( Abc_Ntk_t * pNtk, int fVerbose );
extern int Abc_NtkCleanupSeq( Abc_Ntk_t * pNtk, int fLatchSweep, int fAutoSweep, int fVerbose );
/*=== abcTiming.c ==========================================================*/
extern Abc_Time_t * Abc_NodeReadArrival( Abc_Obj_t * pNode );
extern Abc_Time_t * Abc_NodeReadRequired( Abc_Obj_t * pNode );
......@@ -782,6 +776,7 @@ extern void Abc_NodeSetReverseLevel( Abc_Obj_t * pObj, int LevelR
extern int Abc_NodeReadReverseLevel( Abc_Obj_t * pObj );
extern int Abc_NodeReadRequiredLevel( Abc_Obj_t * pObj );
/*=== abcUtil.c ==========================================================*/
extern void * Abc_NtkAttrFree( Abc_Ntk_t * pNtk, int Attr, int fFreeMan );
extern void Abc_NtkIncrementTravId( Abc_Ntk_t * pNtk );
extern void Abc_NtkOrderCisCos( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetCubeNum( Abc_Ntk_t * pNtk );
......
......@@ -269,7 +269,7 @@ bool Abc_AigCheck( Abc_Aig_t * pMan )
SeeAlso []
***********************************************************************/
int Abc_AigGetLevelNum( Abc_Ntk_t * pNtk )
int Abc_AigLevel( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
int i, LevelsMax;
......
......@@ -580,12 +580,33 @@ bool Abc_NtkCheckLatch( Abc_Ntk_t * pNtk, Abc_Obj_t * pLatch )
fprintf( stdout, "NodeCheck: Latch \"%s\" has wrong number (%d) of fanins.\n", Abc_ObjName(pLatch), Abc_ObjFaninNum(pLatch) );
Value = 0;
}
// make sure the latch has only one fanin
// make sure the latch has only one fanout
if ( Abc_ObjFanoutNum(pLatch) != 1 )
{
fprintf( stdout, "NodeCheck: Latch \"%s\" has wrong number (%d) of fanouts.\n", Abc_ObjName(pLatch), Abc_ObjFanoutNum(pLatch) );
Value = 0;
}
// make sure the latch input has only one fanin
if ( Abc_ObjFaninNum(Abc_ObjFanin0(pLatch)) != 1 )
{
fprintf( stdout, "NodeCheck: Input of latch \"%s\" has wrong number (%d) of fanins.\n",
Abc_ObjName(Abc_ObjFanin0(pLatch)), Abc_ObjFaninNum(Abc_ObjFanin0(pLatch)) );
Value = 0;
}
// make sure the latch input has only one fanout
if ( Abc_ObjFanoutNum(Abc_ObjFanin0(pLatch)) != 1 )
{
fprintf( stdout, "NodeCheck: Input of latch \"%s\" has wrong number (%d) of fanouts.\n",
Abc_ObjName(Abc_ObjFanin0(pLatch)), Abc_ObjFanoutNum(Abc_ObjFanin0(pLatch)) );
Value = 0;
}
// make sure the latch output has only one fanin
if ( Abc_ObjFaninNum(Abc_ObjFanout0(pLatch)) != 1 )
{
fprintf( stdout, "NodeCheck: Output of latch \"%s\" has wrong number (%d) of fanins.\n",
Abc_ObjName(Abc_ObjFanout0(pLatch)), Abc_ObjFaninNum(Abc_ObjFanout0(pLatch)) );
Value = 0;
}
return Value;
}
......
......@@ -24,12 +24,12 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static void Abc_NtkDfs_iter( Vec_Ptr_t * vStack, Abc_Obj_t * pRoot, Vec_Ptr_t * vNodes );
static void Abc_NtkDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes );
static void Abc_AigDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes );
static void Abc_NtkDfsReverse_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes );
static void Abc_NtkNodeSupport_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes );
static void Abc_DfsLevelizedTfo_rec( Abc_Obj_t * pNode, Vec_Vec_t * vLevels );
static int Abc_NtkGetLevelNum_rec( Abc_Obj_t * pNode );
static bool Abc_NtkIsAcyclic_rec( Abc_Obj_t * pNode );
////////////////////////////////////////////////////////////////////////
......@@ -137,6 +137,101 @@ void Abc_NtkDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes )
Vec_PtrPush( vNodes, pNode );
}
/**Function*************************************************************
Synopsis [Returns the DFS ordered array of logic nodes.]
Description [Collects only the internal nodes, leaving CIs and CO.
However it marks with the current TravId both CIs and COs.]
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Abc_NtkDfsIter( Abc_Ntk_t * pNtk, int fCollectAll )
{
Vec_Ptr_t * vNodes, * vStack;
Abc_Obj_t * pObj;
int i;
// set the traversal ID
Abc_NtkIncrementTravId( pNtk );
// start the array of nodes
vNodes = Vec_PtrAlloc( 1000 );
vStack = Vec_PtrAlloc( 1000 );
Abc_NtkForEachCo( pNtk, pObj, i )
{
Abc_NodeSetTravIdCurrent( pObj );
Abc_NtkDfs_iter( vStack, Abc_ObjFanin0Ntk(Abc_ObjFanin0(pObj)), vNodes );
}
// collect dangling nodes if asked to
if ( fCollectAll )
{
Abc_NtkForEachNode( pNtk, pObj, i )
if ( !Abc_NodeIsTravIdCurrent(pObj) )
Abc_NtkDfs_iter( vStack, pObj, vNodes );
}
Vec_PtrFree( vStack );
return vNodes;
}
/**Function*************************************************************
Synopsis [Iterative version of the DFS procedure.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkDfs_iter( Vec_Ptr_t * vStack, Abc_Obj_t * pRoot, Vec_Ptr_t * vNodes )
{
Abc_Obj_t * pNode, * pFanin;
int iFanin;
// if this node is already visited, skip
if ( Abc_NodeIsTravIdCurrent( pRoot ) )
return;
// mark the node as visited
Abc_NodeSetTravIdCurrent( pRoot );
// skip the CI
if ( Abc_ObjIsCi(pRoot) || (Abc_NtkIsStrash(pRoot->pNtk) && Abc_AigNodeIsConst(pRoot)) )
return;
// add the CI
Vec_PtrClear( vStack );
Vec_PtrPush( vStack, pRoot );
Vec_PtrPush( vStack, (void *)0 );
while ( Vec_PtrSize(vStack) > 0 )
{
// get the node and its fanin
iFanin = (int)Vec_PtrPop(vStack);
pNode = Vec_PtrPop(vStack);
assert( !Abc_ObjIsNet(pNode) );
// add it to the array of nodes if we finished
if ( iFanin == Abc_ObjFaninNum(pNode) )
{
Vec_PtrPush( vNodes, pNode );
continue;
}
// explore the next fanin
Vec_PtrPush( vStack, pNode );
Vec_PtrPush( vStack, (void *)(iFanin+1) );
// get the fanin
pFanin = Abc_ObjFanin0Ntk( Abc_ObjFanin(pNode,iFanin) );
// if this node is already visited, skip
if ( Abc_NodeIsTravIdCurrent( pFanin ) )
continue;
// mark the node as visited
Abc_NodeSetTravIdCurrent( pFanin );
// skip the CI
if ( Abc_ObjIsCi(pFanin) || (Abc_NtkIsStrash(pFanin->pNtk) && Abc_AigNodeIsConst(pFanin)) )
continue;
Vec_PtrPush( vStack, pFanin );
Vec_PtrPush( vStack, (void *)0 );
}
}
/**Function*************************************************************
......@@ -593,7 +688,7 @@ void Abc_DfsLevelizedTfo_rec( Abc_Obj_t * pNode, Vec_Vec_t * vLevels )
/**Function*************************************************************
Synopsis [Computes the number of logic levels not counting PIs/POs.]
Synopsis [Recursively counts the number of logic levels of one node.]
Description []
......@@ -602,24 +697,31 @@ void Abc_DfsLevelizedTfo_rec( Abc_Obj_t * pNode, Vec_Vec_t * vLevels )
SeeAlso []
***********************************************************************/
int Abc_NtkGetLevelNum( Abc_Ntk_t * pNtk )
int Abc_NtkLevel_rec( Abc_Obj_t * pNode )
{
Abc_Obj_t * pNode;
int i, LevelsMax;
// set the traversal ID for this traversal
Abc_NtkIncrementTravId( pNtk );
// set the CI levels to zero
Abc_NtkForEachCi( pNtk, pNode, i )
pNode->Level = 0;
// perform the traversal
LevelsMax = 0;
Abc_NtkForEachNode( pNtk, pNode, i )
Abc_Obj_t * pNext;
int i, Level;
assert( !Abc_ObjIsNet(pNode) );
// skip the PI
if ( Abc_ObjIsCi(pNode) )
return pNode->Level;
assert( Abc_ObjIsNode( pNode ) );
// if this node is already visited, return
if ( Abc_NodeIsTravIdCurrent( pNode ) )
return pNode->Level;
// mark the node as visited
Abc_NodeSetTravIdCurrent( pNode );
// visit the transitive fanin
pNode->Level = 0;
Abc_ObjForEachFanin( pNode, pNext, i )
{
Abc_NtkGetLevelNum_rec( pNode );
if ( LevelsMax < (int)pNode->Level )
LevelsMax = (int)pNode->Level;
Level = Abc_NtkLevel_rec( Abc_ObjFanin0Ntk(pNext) );
if ( pNode->Level < (unsigned)Level )
pNode->Level = Level;
}
return LevelsMax;
if ( Abc_ObjFaninNum(pNode) > 0 )
pNode->Level++;
return pNode->Level;
}
/**Function*************************************************************
......@@ -633,18 +735,14 @@ int Abc_NtkGetLevelNum( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
int Abc_NtkGetLevelNum_rec( Abc_Obj_t * pNode )
int Abc_NtkLevelReverse_rec( Abc_Obj_t * pNode )
{
Abc_Obj_t * pFanin;
Abc_Obj_t * pNext;
int i, Level;
assert( !Abc_ObjIsNet(pNode) );
if ( pNode->Id == 27278 )
{
int x = 0;
}
// skip the PI
if ( Abc_ObjIsCi(pNode) )
return 0;
if ( Abc_ObjIsCo(pNode) )
return pNode->Level;
assert( Abc_ObjIsNode( pNode ) );
// if this node is already visited, return
if ( Abc_NodeIsTravIdCurrent( pNode ) )
......@@ -653,17 +751,76 @@ int Abc_NtkGetLevelNum_rec( Abc_Obj_t * pNode )
Abc_NodeSetTravIdCurrent( pNode );
// visit the transitive fanin
pNode->Level = 0;
Abc_ObjForEachFanin( pNode, pFanin, i )
Abc_ObjForEachFanout( pNode, pNext, i )
{
Level = Abc_NtkGetLevelNum_rec( Abc_ObjFanin0Ntk(pFanin) );
Level = Abc_NtkLevelReverse_rec( Abc_ObjFanout0Ntk(pNext) );
if ( pNode->Level < (unsigned)Level )
pNode->Level = Level;
}
if ( Abc_ObjFaninNum(pNode) > 0 )
pNode->Level++;
pNode->Level++;
return pNode->Level;
}
/**Function*************************************************************
Synopsis [Computes the number of logic levels not counting PIs/POs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkLevel( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
int i, LevelsMax;
// set the CI levels to zero
Abc_NtkForEachCi( pNtk, pNode, i )
pNode->Level = 0;
// perform the traversal
LevelsMax = 0;
Abc_NtkIncrementTravId( pNtk );
Abc_NtkForEachNode( pNtk, pNode, i )
{
Abc_NtkLevel_rec( pNode );
if ( LevelsMax < (int)pNode->Level )
LevelsMax = (int)pNode->Level;
}
return LevelsMax;
}
/**Function*************************************************************
Synopsis [Computes the number of logic levels not counting PIs/POs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkLevelReverse( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
int i, LevelsMax;
// set the CO levels to zero
Abc_NtkForEachCo( pNtk, pNode, i )
pNode->Level = 0;
// perform the traversal
LevelsMax = 0;
Abc_NtkIncrementTravId( pNtk );
Abc_NtkForEachNode( pNtk, pNode, i )
{
Abc_NtkLevelReverse_rec( pNode );
if ( LevelsMax < (int)pNode->Level )
LevelsMax = (int)pNode->Level;
}
return LevelsMax;
}
/**Function*************************************************************
......
......@@ -50,6 +50,10 @@ void Abc_ObjAddFanin( Abc_Obj_t * pObj, Abc_Obj_t * pFanin )
Vec_IntPushMem( pObj->pNtk->pMmStep, &pFaninR->vFanouts, pObj->Id );
if ( Abc_ObjIsComplement(pFanin) )
Abc_ObjSetFaninC( pObj, Abc_ObjFaninNum(pObj)-1 );
if ( Abc_ObjIsNet(pObj) && Abc_ObjFaninNum(pObj) > 1 )
{
int x = 0;
}
}
......
......@@ -29,8 +29,8 @@
#define ABC_MUX_CUBES 100000
static int Abc_ConvertZddToSop( DdManager * dd, DdNode * zCover, char * pSop, int nFanins, Vec_Str_t * vCube, int fPhase );
static DdNode * Abc_ConvertAigToBdd( DdManager * dd, Aig_Obj_t * pRoot);
static Aig_Obj_t * Abc_ConvertSopToAig( Aig_Man_t * pMan, char * pSop );
static DdNode * Abc_ConvertAigToBdd( DdManager * dd, Hop_Obj_t * pRoot);
static Hop_Obj_t * Abc_ConvertSopToAig( Hop_Man_t * pMan, char * pSop );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......@@ -533,13 +533,13 @@ int Abc_CountZddCubes( DdManager * dd, DdNode * zCover )
int Abc_NtkSopToAig( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
Aig_Man_t * pMan;
Hop_Man_t * pMan;
int i;
assert( Abc_NtkIsSopLogic(pNtk) || Abc_NtkIsSopNetlist(pNtk) );
// start the functionality manager
pMan = Aig_ManStart();
pMan = Hop_ManStart();
// convert each node from SOP to BDD
Abc_NtkForEachNode( pNtk, pNode, i )
......@@ -572,32 +572,32 @@ int Abc_NtkSopToAig( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
Aig_Obj_t * Abc_ConvertSopToAigInternal( Aig_Man_t * pMan, char * pSop )
Hop_Obj_t * Abc_ConvertSopToAigInternal( Hop_Man_t * pMan, char * pSop )
{
Aig_Obj_t * pAnd, * pSum;
Hop_Obj_t * pAnd, * pSum;
int i, Value, nFanins;
char * pCube;
// get the number of variables
nFanins = Abc_SopGetVarNum(pSop);
// go through the cubes of the node's SOP
pSum = Aig_ManConst0(pMan);
pSum = Hop_ManConst0(pMan);
Abc_SopForEachCube( pSop, nFanins, pCube )
{
// create the AND of literals
pAnd = Aig_ManConst1(pMan);
pAnd = Hop_ManConst1(pMan);
Abc_CubeForEachVar( pCube, Value, i )
{
if ( Value == '1' )
pAnd = Aig_And( pMan, pAnd, Aig_IthVar(pMan,i) );
pAnd = Hop_And( pMan, pAnd, Hop_IthVar(pMan,i) );
else if ( Value == '0' )
pAnd = Aig_And( pMan, pAnd, Aig_Not(Aig_IthVar(pMan,i)) );
pAnd = Hop_And( pMan, pAnd, Hop_Not(Hop_IthVar(pMan,i)) );
}
// add to the sum of cubes
pSum = Aig_Or( pMan, pSum, pAnd );
pSum = Hop_Or( pMan, pSum, pAnd );
}
// decide whether to complement the result
if ( Abc_SopIsComplement(pSop) )
pSum = Aig_Not(pSum);
pSum = Hop_Not(pSum);
return pSum;
}
......@@ -612,16 +612,16 @@ Aig_Obj_t * Abc_ConvertSopToAigInternal( Aig_Man_t * pMan, char * pSop )
SeeAlso []
***********************************************************************/
Aig_Obj_t * Abc_ConvertSopToAig( Aig_Man_t * pMan, char * pSop )
Hop_Obj_t * Abc_ConvertSopToAig( Hop_Man_t * pMan, char * pSop )
{
extern Aig_Obj_t * Dec_GraphFactorSop( Aig_Man_t * pMan, char * pSop );
extern Hop_Obj_t * Dec_GraphFactorSop( Hop_Man_t * pMan, char * pSop );
int fUseFactor = 1;
// consider the constant node
if ( Abc_SopGetVarNum(pSop) == 0 )
return Aig_NotCond( Aig_ManConst1(pMan), Abc_SopIsConst0(pSop) );
return Hop_NotCond( Hop_ManConst1(pMan), Abc_SopIsConst0(pSop) );
// consider the special case of EXOR function
if ( Abc_SopIsExorType(pSop) )
return Aig_NotCond( Aig_CreateExor(pMan, Abc_SopGetVarNum(pSop)), Abc_SopIsComplement(pSop) );
return Hop_NotCond( Hop_CreateExor(pMan, Abc_SopGetVarNum(pSop)), Abc_SopIsComplement(pSop) );
// decide when to use factoring
if ( fUseFactor && Abc_SopGetVarNum(pSop) > 2 && Abc_SopGetCubeNum(pSop) > 1 )
return Dec_GraphFactorSop( pMan, pSop );
......@@ -642,7 +642,7 @@ Aig_Obj_t * Abc_ConvertSopToAig( Aig_Man_t * pMan, char * pSop )
int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
Aig_Man_t * pMan;
Hop_Man_t * pMan;
DdManager * dd;
int nFaninsMax, i;
......@@ -657,9 +657,9 @@ int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk )
// set the mapping of AIG nodes into the BDD nodes
pMan = pNtk->pManFunc;
assert( Aig_ManPiNum(pMan) >= nFaninsMax );
assert( Hop_ManPiNum(pMan) >= nFaninsMax );
for ( i = 0; i < nFaninsMax; i++ )
Aig_ManPi(pMan, i)->pData = Cudd_bddIthVar(dd, i);
Hop_ManPi(pMan, i)->pData = Cudd_bddIthVar(dd, i);
// convert each node from SOP to BDD
Abc_NtkForEachNode( pNtk, pNode, i )
......@@ -674,7 +674,7 @@ int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk )
Cudd_Ref( pNode->pData );
}
Aig_ManStop( pNtk->pManFunc );
Hop_ManStop( pNtk->pManFunc );
pNtk->pManFunc = dd;
// update the network type
......@@ -693,17 +693,17 @@ int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
void Abc_ConvertAigToBdd_rec1( DdManager * dd, Aig_Obj_t * pObj )
void Abc_ConvertAigToBdd_rec1( DdManager * dd, Hop_Obj_t * pObj )
{
assert( !Aig_IsComplement(pObj) );
if ( !Aig_ObjIsNode(pObj) || Aig_ObjIsMarkA(pObj) )
assert( !Hop_IsComplement(pObj) );
if ( !Hop_ObjIsNode(pObj) || Hop_ObjIsMarkA(pObj) )
return;
Abc_ConvertAigToBdd_rec1( dd, Aig_ObjFanin0(pObj) );
Abc_ConvertAigToBdd_rec1( dd, Aig_ObjFanin1(pObj) );
pObj->pData = Cudd_bddAnd( dd, (DdNode *)Aig_ObjChild0Copy(pObj), (DdNode *)Aig_ObjChild1Copy(pObj) );
Abc_ConvertAigToBdd_rec1( dd, Hop_ObjFanin0(pObj) );
Abc_ConvertAigToBdd_rec1( dd, Hop_ObjFanin1(pObj) );
pObj->pData = Cudd_bddAnd( dd, (DdNode *)Hop_ObjChild0Copy(pObj), (DdNode *)Hop_ObjChild1Copy(pObj) );
Cudd_Ref( pObj->pData );
assert( !Aig_ObjIsMarkA(pObj) ); // loop detection
Aig_ObjSetMarkA( pObj );
assert( !Hop_ObjIsMarkA(pObj) ); // loop detection
Hop_ObjSetMarkA( pObj );
}
/**Function*************************************************************
......@@ -717,17 +717,17 @@ void Abc_ConvertAigToBdd_rec1( DdManager * dd, Aig_Obj_t * pObj )
SeeAlso []
***********************************************************************/
void Abc_ConvertAigToBdd_rec2( DdManager * dd, Aig_Obj_t * pObj )
void Abc_ConvertAigToBdd_rec2( DdManager * dd, Hop_Obj_t * pObj )
{
assert( !Aig_IsComplement(pObj) );
if ( !Aig_ObjIsNode(pObj) || !Aig_ObjIsMarkA(pObj) )
assert( !Hop_IsComplement(pObj) );
if ( !Hop_ObjIsNode(pObj) || !Hop_ObjIsMarkA(pObj) )
return;
Abc_ConvertAigToBdd_rec2( dd, Aig_ObjFanin0(pObj) );
Abc_ConvertAigToBdd_rec2( dd, Aig_ObjFanin1(pObj) );
Abc_ConvertAigToBdd_rec2( dd, Hop_ObjFanin0(pObj) );
Abc_ConvertAigToBdd_rec2( dd, Hop_ObjFanin1(pObj) );
Cudd_RecursiveDeref( dd, pObj->pData );
pObj->pData = NULL;
assert( Aig_ObjIsMarkA(pObj) ); // loop detection
Aig_ObjClearMarkA( pObj );
assert( Hop_ObjIsMarkA(pObj) ); // loop detection
Hop_ObjClearMarkA( pObj );
}
/**Function*************************************************************
......@@ -741,18 +741,18 @@ void Abc_ConvertAigToBdd_rec2( DdManager * dd, Aig_Obj_t * pObj )
SeeAlso []
***********************************************************************/
DdNode * Abc_ConvertAigToBdd( DdManager * dd, Aig_Obj_t * pRoot )
DdNode * Abc_ConvertAigToBdd( DdManager * dd, Hop_Obj_t * pRoot )
{
DdNode * bFunc;
// check the case of a constant
if ( Aig_ObjIsConst1( Aig_Regular(pRoot) ) )
return Cudd_NotCond( Cudd_ReadOne(dd), Aig_IsComplement(pRoot) );
if ( Hop_ObjIsConst1( Hop_Regular(pRoot) ) )
return Cudd_NotCond( Cudd_ReadOne(dd), Hop_IsComplement(pRoot) );
// construct BDD
Abc_ConvertAigToBdd_rec1( dd, Aig_Regular(pRoot) );
Abc_ConvertAigToBdd_rec1( dd, Hop_Regular(pRoot) );
// hold on to the result
bFunc = Cudd_NotCond( Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) ); Cudd_Ref( bFunc );
bFunc = Cudd_NotCond( Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) ); Cudd_Ref( bFunc );
// dereference BDD
Abc_ConvertAigToBdd_rec2( dd, Aig_Regular(pRoot) );
Abc_ConvertAigToBdd_rec2( dd, Hop_Regular(pRoot) );
// return the result
Cudd_Deref( bFunc );
return bFunc;
......
......@@ -117,11 +117,11 @@ int Abc_NtkRemoveSelfFeedLatches( Abc_Ntk_t * pNtk )
{
if ( Abc_NtkLatchIsSelfFeed( pLatch ) )
{
if ( Abc_NtkIsStrash(pNtk) || Abc_NtkIsSeq(pNtk) )
if ( Abc_NtkIsStrash(pNtk) )
pConst1 = Abc_AigConst1(pNtk);
else
pConst1 = Abc_NtkCreateNodeConst1(pNtk);
Abc_ObjPatchFanin( pLatch, Abc_ObjFanin0(Abc_ObjFanin0(pLatch)), pConst1 );
Abc_ObjPatchFanin( Abc_ObjFanin0(pLatch), Abc_ObjFanin0(Abc_ObjFanin0(pLatch)), pConst1 );
Counter++;
}
}
......
......@@ -47,7 +47,7 @@ Abc_Lib_t * Abc_LibCreate( char * pName )
p->pName = Extra_UtilStrsav( pName );
p->tModules = st_init_table( strcmp, st_strhash );
p->vModules = Vec_PtrAlloc( 100 );
p->pManFunc = Aig_ManStart();
p->pManFunc = Hop_ManStart();
p->pLibrary = NULL;
return p;
}
......@@ -70,7 +70,7 @@ void Abc_LibFree( Abc_Lib_t * pLib )
if ( pLib->pName )
free( pLib->pName );
if ( pLib->pManFunc )
Aig_ManStop( pLib->pManFunc );
Hop_ManStop( pLib->pManFunc );
if ( pLib->tModules )
st_free_table( pLib->tModules );
if ( pLib->vModules )
......
......@@ -251,15 +251,6 @@ Abc_Ntk_t * Abc_NtkLogicToNetlist( Abc_Ntk_t * pNtk, int fDirect )
pNtkNew = Abc_NtkLogicSopToNetlist( pNtkTemp );
Abc_NtkDelete( pNtkTemp );
}
else if ( Abc_NtkIsSeq(pNtk) )
{
assert( 0 );
/*
pNtkTemp = Abc_NtkSeqToLogicSop(pNtk);
pNtkNew = Abc_NtkLogicSopToNetlist( pNtkTemp );
Abc_NtkDelete( pNtkTemp );
*/
}
else if ( Abc_NtkIsBddLogic(pNtk) )
{
if ( !Abc_NtkBddToSop(pNtk, fDirect) )
......@@ -328,13 +319,22 @@ Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk )
Abc_NtkCleanup( pNtk, 0 );
assert( Abc_NtkIsLogic(pNtk) );
assert( Abc_NtkLogicHasSimpleCos(pNtk) );
// assert( Abc_NtkLogicHasSimpleCos(pNtk) );
if ( !Abc_NtkLogicHasSimpleCos(pNtk) )
{
printf( "Abc_NtkLogicSopToNetlist() warning: The network is converted to have simple COs.\n" );
Abc_NtkLogicMakeSimpleCos( pNtk, 0 );
}
if ( Abc_NtkIsBddLogic(pNtk) )
{
if ( !Abc_NtkBddToSop(pNtk,0) )
return NULL;
}
// Abc_NtkForEachCo(pNtk, pObj, i)
// Abc_ObjPrint( stdout, Abc_ObjFanin0(pObj) );
// start the netlist by creating PI/PO/Latch objects
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_NETLIST, pNtk->ntkFunc );
// create the CI nets and remember them in the new CI nodes
......@@ -358,7 +358,7 @@ Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk )
continue;
}
assert( Abc_ObjIsNode(pDriver) );
// if the CO drive has no net, create it
// if the CO driver has no net, create it
if ( pDriver->pCopy->pCopy == NULL )
{
// create the CO net and connect it to CO
......
......@@ -58,9 +58,7 @@ Abc_Ntk_t * Abc_NtkAlloc( Abc_NtkType_t Type, Abc_NtkFunc_t Func, int fUseMemMan
pNtk->vPos = Vec_PtrAlloc( 100 );
pNtk->vCis = Vec_PtrAlloc( 100 );
pNtk->vCos = Vec_PtrAlloc( 100 );
pNtk->vCutSet = Vec_PtrAlloc( 100 );
pNtk->vBoxes = Vec_PtrAlloc( 100 );
pNtk->vSkews = Vec_FltAlloc( 100 );
// start the memory managers
pNtk->pMmObj = fUseMemMan? Extra_MmFixedStart( sizeof(Abc_Obj_t) ) : NULL;
pNtk->pMmStep = fUseMemMan? Extra_MmStepStart( ABC_NUM_STEPS ) : NULL;
......@@ -76,13 +74,15 @@ Abc_Ntk_t * Abc_NtkAlloc( Abc_NtkType_t Type, Abc_NtkFunc_t Func, int fUseMemMan
else if ( Abc_NtkHasBdd(pNtk) )
pNtk->pManFunc = Cudd_Init( 20, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
else if ( Abc_NtkHasAig(pNtk) )
pNtk->pManFunc = Aig_ManStart();
pNtk->pManFunc = Hop_ManStart();
else if ( Abc_NtkHasMapping(pNtk) )
pNtk->pManFunc = Abc_FrameReadLibGen();
else if ( !Abc_NtkHasBlackbox(pNtk) )
assert( 0 );
// name manager
pNtk->pManName = Nm_ManCreate( 200 );
// attribute manager
pNtk->vAttrs = Vec_PtrStart( VEC_ATTR_TOTAL_NUM );
return pNtk;
}
......@@ -301,40 +301,6 @@ Abc_Ntk_t * Abc_NtkDup( Abc_Ntk_t * pNtk )
printf( "Warning: Structural hashing during duplication reduced %d nodes (this is a minor bug).\n",
Abc_NtkNodeNum(pNtk) - Abc_NtkNodeNum(pNtkNew) );
}
/*
else if ( Abc_NtkIsSeq(pNtk) )
{
// start the storage for initial states
Seq_Resize( pNtkNew->pManFunc, Abc_NtkObjNumMax(pNtk) );
// copy the nodes
Abc_NtkForEachObj( pNtk, pObj, i )
if ( pObj->pCopy == NULL )
{
Abc_NtkDupObj(pNtkNew, pObj, 0);
pObj->pCopy->Level = pObj->Level;
pObj->pCopy->fPhase = pObj->fPhase;
}
// connect the nodes
Abc_NtkForEachObj( pNtk, pObj, i )
{
Abc_ObjForEachFanin( pObj, pFanin, k )
{
Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
if ( Abc_ObjFaninC(pObj, k) )
Abc_ObjSetFaninC( pObj->pCopy, k );
if ( Seq_ObjFaninL(pObj, k) )
Seq_NodeDupLats( pObj->pCopy, pObj, k );
}
}
// relink the choice nodes
Abc_AigForEachAnd( pNtk, pObj, i )
if ( pObj->pData )
pObj->pCopy->pData = ((Abc_Obj_t *)pObj->pData)->pCopy;
// copy the cutset
Abc_SeqForEachCutsetNode( pNtk, pObj, i )
Vec_PtrPush( pNtkNew->vCutSet, pObj->pCopy );
}
*/
else
{
// duplicate the nets and nodes (CIs/COs/latches already dupped)
......@@ -795,6 +761,7 @@ Abc_Ntk_t * Abc_NtkCreateWithNode( char * pSop )
void Abc_NtkDelete( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
void * pAttrMan;
int TotalMemory, i;
int LargePiece = (4 << ABC_NUM_STEPS);
if ( pNtk == NULL )
......@@ -845,9 +812,7 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
Vec_PtrFree( pNtk->vCos );
Vec_PtrFree( pNtk->vAsserts );
Vec_PtrFree( pNtk->vObjs );
Vec_PtrFree( pNtk->vCutSet );
Vec_PtrFree( pNtk->vBoxes );
Vec_FltFree( pNtk->vSkews );
if ( pNtk->vLevelsR ) Vec_IntFree( pNtk->vLevelsR );
if ( pNtk->pModel ) free( pNtk->pModel );
TotalMemory = 0;
......@@ -874,7 +839,7 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
else if ( Abc_NtkHasBdd(pNtk) )
Extra_StopManager( pNtk->pManFunc );
else if ( Abc_NtkHasAig(pNtk) )
{ if ( pNtk->pManFunc ) Aig_ManStop( pNtk->pManFunc ); }
{ if ( pNtk->pManFunc ) Hop_ManStop( pNtk->pManFunc ); }
else if ( Abc_NtkHasMapping(pNtk) )
pNtk->pManFunc = NULL;
else if ( !Abc_NtkHasBlackbox(pNtk) )
......@@ -891,6 +856,11 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
}
if ( pNtk->pBlackBoxes )
Vec_IntFree( pNtk->pBlackBoxes );
// free node attributes
Vec_PtrForEachEntry( pNtk->vAttrs, pAttrMan, i )
if ( pAttrMan )
Vec_AttFree( pAttrMan, 1 );
Vec_PtrFree( pNtk->vAttrs );
free( pNtk );
}
......
......@@ -299,7 +299,7 @@ void Abc_NtkDeleteAll_rec( Abc_Obj_t * pObj )
Abc_NodeCollectFanins( pObj, vNodes );
Abc_NtkDeleteObj( pObj );
Vec_PtrForEachEntry( vNodes, pObj, i )
if ( Abc_ObjFanoutNum(pObj) == 0 )
if ( !Abc_ObjIsNode(pObj) && Abc_ObjFanoutNum(pObj) == 0 )
Abc_NtkDeleteAll_rec( pObj );
Vec_PtrFree( vNodes );
}
......@@ -342,7 +342,7 @@ Abc_Obj_t * Abc_NtkDupObj( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj, int fCopyName
else if ( Abc_NtkHasBdd(pNtkNew) )
pObjNew->pData = Cudd_bddTransfer(pObj->pNtk->pManFunc, pNtkNew->pManFunc, pObj->pData), Cudd_Ref(pObjNew->pData);
else if ( Abc_NtkHasAig(pNtkNew) )
pObjNew->pData = Aig_Transfer(pObj->pNtk->pManFunc, pNtkNew->pManFunc, pObj->pData, Abc_ObjFaninNum(pObj));
pObjNew->pData = Hop_Transfer(pObj->pNtk->pManFunc, pNtkNew->pManFunc, pObj->pData, Abc_ObjFaninNum(pObj));
else if ( Abc_NtkHasMapping(pNtkNew) )
pObjNew->pData = pObj->pData;
else assert( 0 );
......@@ -576,7 +576,7 @@ Abc_Obj_t * Abc_NtkCreateNodeConst0( Abc_Ntk_t * pNtk )
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_ReadLogicZero(pNtk->pManFunc), Cudd_Ref( pNode->pData );
else if ( Abc_NtkHasAig(pNtk) )
pNode->pData = Aig_ManConst0(pNtk->pManFunc);
pNode->pData = Hop_ManConst0(pNtk->pManFunc);
else if ( Abc_NtkHasMapping(pNtk) )
pNode->pData = Mio_LibraryReadConst0(Abc_FrameReadLibGen());
else if ( !Abc_NtkHasBlackbox(pNtk) )
......@@ -605,7 +605,7 @@ Abc_Obj_t * Abc_NtkCreateNodeConst1( Abc_Ntk_t * pNtk )
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_ReadOne(pNtk->pManFunc), Cudd_Ref( pNode->pData );
else if ( Abc_NtkHasAig(pNtk) )
pNode->pData = Aig_ManConst1(pNtk->pManFunc);
pNode->pData = Hop_ManConst1(pNtk->pManFunc);
else if ( Abc_NtkHasMapping(pNtk) )
pNode->pData = Mio_LibraryReadConst1(Abc_FrameReadLibGen());
else if ( !Abc_NtkHasBlackbox(pNtk) )
......@@ -635,7 +635,7 @@ Abc_Obj_t * Abc_NtkCreateNodeInv( Abc_Ntk_t * pNtk, Abc_Obj_t * pFanin )
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_Not(Cudd_bddIthVar(pNtk->pManFunc,0)), Cudd_Ref( pNode->pData );
else if ( Abc_NtkHasAig(pNtk) )
pNode->pData = Aig_Not(Aig_IthVar(pNtk->pManFunc,0));
pNode->pData = Hop_Not(Hop_IthVar(pNtk->pManFunc,0));
else if ( Abc_NtkHasMapping(pNtk) )
pNode->pData = Mio_LibraryReadInv(Abc_FrameReadLibGen());
else
......@@ -665,7 +665,7 @@ Abc_Obj_t * Abc_NtkCreateNodeBuf( Abc_Ntk_t * pNtk, Abc_Obj_t * pFanin )
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_bddIthVar(pNtk->pManFunc,0), Cudd_Ref( pNode->pData );
else if ( Abc_NtkHasAig(pNtk) )
pNode->pData = Aig_IthVar(pNtk->pManFunc,0);
pNode->pData = Hop_IthVar(pNtk->pManFunc,0);
else if ( Abc_NtkHasMapping(pNtk) )
pNode->pData = Mio_LibraryReadBuf(Abc_FrameReadLibGen());
else
......@@ -697,7 +697,7 @@ Abc_Obj_t * Abc_NtkCreateNodeAnd( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins )
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Extra_bddCreateAnd( pNtk->pManFunc, Vec_PtrSize(vFanins) ), Cudd_Ref(pNode->pData);
else if ( Abc_NtkHasAig(pNtk) )
pNode->pData = Aig_CreateAnd( pNtk->pManFunc, Vec_PtrSize(vFanins) );
pNode->pData = Hop_CreateAnd( pNtk->pManFunc, Vec_PtrSize(vFanins) );
else
assert( 0 );
return pNode;
......@@ -727,7 +727,7 @@ Abc_Obj_t * Abc_NtkCreateNodeOr( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins )
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Extra_bddCreateOr( pNtk->pManFunc, Vec_PtrSize(vFanins) ), Cudd_Ref(pNode->pData);
else if ( Abc_NtkHasAig(pNtk) )
pNode->pData = Aig_CreateOr( pNtk->pManFunc, Vec_PtrSize(vFanins) );
pNode->pData = Hop_CreateOr( pNtk->pManFunc, Vec_PtrSize(vFanins) );
else
assert( 0 );
return pNode;
......@@ -757,7 +757,7 @@ Abc_Obj_t * Abc_NtkCreateNodeExor( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins )
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Extra_bddCreateExor( pNtk->pManFunc, Vec_PtrSize(vFanins) ), Cudd_Ref(pNode->pData);
else if ( Abc_NtkHasAig(pNtk) )
pNode->pData = Aig_CreateExor( pNtk->pManFunc, Vec_PtrSize(vFanins) );
pNode->pData = Hop_CreateExor( pNtk->pManFunc, Vec_PtrSize(vFanins) );
else
assert( 0 );
return pNode;
......@@ -787,7 +787,7 @@ Abc_Obj_t * Abc_NtkCreateNodeMux( Abc_Ntk_t * pNtk, Abc_Obj_t * pNodeC, Abc_Obj_
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_bddIte(pNtk->pManFunc,Cudd_bddIthVar(pNtk->pManFunc,0),Cudd_bddIthVar(pNtk->pManFunc,1),Cudd_bddIthVar(pNtk->pManFunc,2)), Cudd_Ref( pNode->pData );
else if ( Abc_NtkHasAig(pNtk) )
pNode->pData = Aig_Mux(pNtk->pManFunc,Aig_IthVar(pNtk->pManFunc,0),Aig_IthVar(pNtk->pManFunc,1),Aig_IthVar(pNtk->pManFunc,2));
pNode->pData = Hop_Mux(pNtk->pManFunc,Hop_IthVar(pNtk->pManFunc,0),Hop_IthVar(pNtk->pManFunc,1),Hop_IthVar(pNtk->pManFunc,2));
else
assert( 0 );
return pNode;
......@@ -834,7 +834,7 @@ bool Abc_NodeIsConst0( Abc_Obj_t * pNode )
if ( Abc_NtkHasBdd(pNtk) )
return Cudd_IsComplement(pNode->pData);
if ( Abc_NtkHasAig(pNtk) )
return Aig_IsComplement(pNode->pData);
return Hop_IsComplement(pNode->pData);
if ( Abc_NtkHasMapping(pNtk) )
return pNode->pData == Mio_LibraryReadConst0(Abc_FrameReadLibGen());
assert( 0 );
......@@ -864,7 +864,7 @@ bool Abc_NodeIsConst1( Abc_Obj_t * pNode )
if ( Abc_NtkHasBdd(pNtk) )
return !Cudd_IsComplement(pNode->pData);
if ( Abc_NtkHasAig(pNtk) )
return !Aig_IsComplement(pNode->pData);
return !Hop_IsComplement(pNode->pData);
if ( Abc_NtkHasMapping(pNtk) )
return pNode->pData == Mio_LibraryReadConst1(Abc_FrameReadLibGen());
assert( 0 );
......@@ -894,7 +894,7 @@ bool Abc_NodeIsBuf( Abc_Obj_t * pNode )
if ( Abc_NtkHasBdd(pNtk) )
return !Cudd_IsComplement(pNode->pData);
if ( Abc_NtkHasAig(pNtk) )
return !Aig_IsComplement(pNode->pData);
return !Hop_IsComplement(pNode->pData);
if ( Abc_NtkHasMapping(pNtk) )
return pNode->pData == Mio_LibraryReadBuf(Abc_FrameReadLibGen());
assert( 0 );
......@@ -924,7 +924,7 @@ bool Abc_NodeIsInv( Abc_Obj_t * pNode )
if ( Abc_NtkHasBdd(pNtk) )
return Cudd_IsComplement(pNode->pData);
if ( Abc_NtkHasAig(pNtk) )
return Aig_IsComplement(pNode->pData);
return Hop_IsComplement(pNode->pData);
if ( Abc_NtkHasMapping(pNtk) )
return pNode->pData == Mio_LibraryReadInv(Abc_FrameReadLibGen());
assert( 0 );
......@@ -951,7 +951,7 @@ void Abc_NodeComplement( Abc_Obj_t * pNode )
else if ( Abc_NtkHasBdd(pNode->pNtk) )
pNode->pData = Cudd_Not( pNode->pData );
else if ( Abc_NtkHasAig(pNode->pNtk) )
pNode->pData = Aig_Not( pNode->pData );
pNode->pData = Hop_Not( pNode->pData );
else
assert( 0 );
}
......
......@@ -79,109 +79,6 @@ void Abc_NodeShowBdd( Abc_Obj_t * pNode )
/**Function*************************************************************
Synopsis [Visualizes AIG with choices.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkShowAig( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodesShow )
{
FILE * pFile;
Abc_Obj_t * pNode;
Vec_Ptr_t * vNodes;
char FileNameDot[200];
int i;
assert( Abc_NtkIsStrash(pNtk) );
// create the file name
Abc_ShowGetFileName( pNtk->pName, FileNameDot );
// check that the file can be opened
if ( (pFile = fopen( FileNameDot, "w" )) == NULL )
{
fprintf( stdout, "Cannot open the intermediate file \"%s\".\n", FileNameDot );
return;
}
fclose( pFile );
// collect all nodes in the network
vNodes = Vec_PtrAlloc( 100 );
Abc_NtkForEachObj( pNtk, pNode, i )
Vec_PtrPush( vNodes, pNode );
// write the DOT file
Io_WriteDotAig( pNtk, vNodes, vNodesShow, FileNameDot, 0 );
Vec_PtrFree( vNodes );
// visualize the file
Abc_ShowFile( FileNameDot );
}
/**Function*************************************************************
Synopsis [Visualizes AIG with choices.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkShowMulti( Abc_Ntk_t * pNtk )
{
FILE * pFile;
Abc_Obj_t * pNode;
Vec_Ptr_t * vNodes;
char FileNameDot[200];
int i;
extern void Abc_NtkBalanceAttach( Abc_Ntk_t * pNtk );
extern void Abc_NtkBalanceDetach( Abc_Ntk_t * pNtk );
extern void Abc_NtkBalanceLevel( Abc_Ntk_t * pNtk );
assert( Abc_NtkIsStrash(pNtk) );
// create the file name
Abc_ShowGetFileName( pNtk->pName, FileNameDot );
// check that the file can be opened
if ( (pFile = fopen( FileNameDot, "w" )) == NULL )
{
fprintf( stdout, "Cannot open the intermediate file \"%s\".\n", FileNameDot );
return;
}
fclose( pFile );
// get the implication supergates
Abc_NtkBalanceAttach( pNtk );
// set the levels based on the implication supergates
Abc_NtkBalanceLevel( pNtk );
// collect all nodes that are roots
vNodes = Vec_PtrAlloc( 100 );
Abc_NtkForEachCi( pNtk, pNode, i )
Vec_PtrPush( vNodes, pNode );
Abc_NtkForEachNode( pNtk, pNode, i )
if ( pNode->pCopy || Abc_ObjFaninNum(pNode) == 0 )
Vec_PtrPush( vNodes, pNode );
Abc_NtkForEachPo( pNtk, pNode, i )
Vec_PtrPush( vNodes, pNode );
// write the DOT file
Io_WriteDotAig( pNtk, vNodes, NULL, FileNameDot, 1 );
Vec_PtrFree( vNodes );
// undo the supergates
Abc_NtkBalanceDetach( pNtk );
// set the normal levels
Abc_NtkGetLevelNum( pNtk );
// visualize the file
Abc_ShowFile( FileNameDot );
}
/**Function*************************************************************
Synopsis [Visualizes a reconvergence driven cut at the node.]
Description []
......@@ -232,7 +129,7 @@ void Abc_NodeShowCut( Abc_Obj_t * pNode, int nNodeSizeMax, int nConeSizeMax )
// add the root node to the cone (for visualization)
Vec_PtrPush( vCutSmall, pNode );
// write the DOT file
Io_WriteDotAig( pNode->pNtk, vInside, vCutSmall, FileNameDot, 0 );
Io_WriteDotNtk( pNode->pNtk, vInside, vCutSmall, FileNameDot, 0, 0 );
// stop the cut computation manager
Abc_NtkManCutStop( p );
......@@ -251,7 +148,7 @@ void Abc_NodeShowCut( Abc_Obj_t * pNode, int nNodeSizeMax, int nConeSizeMax )
SeeAlso []
***********************************************************************/
void Abc_NtkShow( Abc_Ntk_t * pNtk, int fGateNames )
void Abc_NtkShow( Abc_Ntk_t * pNtk, int fGateNames, int fSeq, int fUseReverse )
{
FILE * pFile;
Abc_Obj_t * pNode;
......@@ -259,8 +156,15 @@ void Abc_NtkShow( Abc_Ntk_t * pNtk, int fGateNames )
char FileNameDot[200];
int i;
assert( !Abc_NtkIsStrash(pNtk) );
Abc_NtkLogicToSop( pNtk, 0 );
assert( Abc_NtkIsStrash(pNtk) || Abc_NtkIsLogic(pNtk) );
if ( Abc_NtkIsStrash(pNtk) && Abc_NtkGetChoiceNum(pNtk) )
{
printf( "Temporarily visualization of AIGs with choice nodes is disabled.\n" );
return;
}
// convert to logic SOP
if ( Abc_NtkIsLogic(pNtk) )
Abc_NtkLogicToSop( pNtk, 0 );
// create the file name
Abc_ShowGetFileName( pNtk->pName, FileNameDot );
// check that the file can be opened
......@@ -274,10 +178,12 @@ void Abc_NtkShow( Abc_Ntk_t * pNtk, int fGateNames )
// collect all nodes in the network
vNodes = Vec_PtrAlloc( 100 );
Abc_NtkForEachObj( pNtk, pNode, i )
// if ( !Abc_ObjIsBi(pNode) && !Abc_ObjIsBo(pNode) )
Vec_PtrPush( vNodes, pNode );
Vec_PtrPush( vNodes, pNode );
// write the DOT file
Io_WriteDotNtk( pNtk, vNodes, NULL, FileNameDot, fGateNames );
if ( fSeq )
Io_WriteDotSeq( pNtk, vNodes, NULL, FileNameDot, fGateNames, fUseReverse );
else
Io_WriteDotNtk( pNtk, vNodes, NULL, FileNameDot, fGateNames, fUseReverse );
Vec_PtrFree( vNodes );
// visualize the file
......
......@@ -768,7 +768,8 @@ bool Abc_SopCheck( char * pSop, int nFanins )
// compare the distance
if ( pCubes - pCubesOld != nFanins )
{
fprintf( stdout, "Abc_SopCheck: SOP has a mismatch between its cover and its fanins.\n" );
fprintf( stdout, "Abc_SopCheck: SOP has a mismatch between its cover size (%d) and its fanin number (%d).\n",
pCubes - pCubesOld, nFanins );
return 0;
}
// check the output values for this cube
......@@ -779,7 +780,7 @@ bool Abc_SopCheck( char * pSop, int nFanins )
fFound1 = 1;
else if ( *pCubes != 'x' && *pCubes != 'n' )
{
fprintf( stdout, "Abc_SopCheck: SOP has a strange character in the output part of its cube.\n" );
fprintf( stdout, "Abc_SopCheck: SOP has a strange character (%c) in the output part of its cube.\n", *pCubes );
return 0;
}
// check the last symbol (new line)
......
......@@ -34,6 +34,27 @@
/**Function*************************************************************
Synopsis [Frees one attribute manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void * Abc_NtkAttrFree( Abc_Ntk_t * pNtk, int Attr, int fFreeMan )
{
void * pUserMan;
Vec_Att_t * pAttrMan;
pAttrMan = Vec_PtrEntry( pNtk->vAttrs, Attr );
Vec_PtrWriteEntry( pNtk->vAttrs, Attr, NULL );
pUserMan = Vec_AttFree( pAttrMan, fFreeMan );
return pUserMan;
}
/**Function*************************************************************
Synopsis [Increments the current traversal ID of the network.]
Description []
......@@ -225,7 +246,7 @@ int Abc_NtkGetAigNodeNum( Abc_Ntk_t * pNtk )
assert( pNode->pData );
if ( Abc_NodeIsConst(pNode) )
continue;
nNodes += pNode->pData? Aig_DagSize( pNode->pData ) : 0;
nNodes += pNode->pData? Hop_DagSize( pNode->pData ) : 0;
}
return nNodes;
}
......@@ -356,7 +377,7 @@ int Abc_NtkGetChoiceNum( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
int i, Counter;
if ( !Abc_NtkHasAig(pNtk) )
if ( !Abc_NtkIsStrash(pNtk) )
return 0;
Counter = 0;
Abc_NtkForEachNode( pNtk, pNode, i )
......@@ -578,7 +599,7 @@ void Abc_NtkFixCoDriverProblem( Abc_Obj_t * pDriver, Abc_Obj_t * pNodeCo, int fD
Description [The COs of a logic network are simple under three conditions:
(1) The edge from CO to its driver is not complemented.
(2) If CI is a driver of a CO, they have the same name.]
(2) If two COs share the same driver, they have the same name.]
(3) If two COs share the same driver, they have the same name.]
SideEffects []
......@@ -621,7 +642,7 @@ bool Abc_NtkLogicHasSimpleCos( Abc_Ntk_t * pNtk )
Description [The COs of a logic network are simple under three conditions:
(1) The edge from CO to its driver is not complemented.
(2) If CI is a driver of a CO, they have the same name.]
(2) If two COs share the same driver, they have the same name.
(3) If two COs share the same driver, they have the same name.
In some cases, such as FPGA mapping, we prevent the increase in delay
by duplicating the driver nodes, rather than adding invs/bufs.]
......
......@@ -49,16 +49,24 @@ void Abc_NtkAutoPrint( Abc_Ntk_t * pNtk, int Output, int fNaive, int fVerbose )
char ** pInputNames; // pointers to the CI names
char ** pOutputNames; // pointers to the CO names
int nOutputs, nInputs, i;
Vec_Ptr_t * vFuncsGlob;
Abc_Obj_t * pObj;
// compute the global BDDs
if ( Abc_NtkGlobalBdds(pNtk, 10000000, 0, 1, fVerbose) == NULL )
if ( Abc_NtkBuildGlobalBdds(pNtk, 10000000, 1, 1, fVerbose) == NULL )
return;
// get information about the network
nInputs = Abc_NtkCiNum(pNtk);
nOutputs = Abc_NtkCoNum(pNtk);
dd = pNtk->pManGlob;
pbGlobal = (DdNode **)Vec_PtrArray( pNtk->vFuncsGlob );
// dd = pNtk->pManGlob;
dd = Abc_NtkGlobalBddMan( pNtk );
// complement the global functions
vFuncsGlob = Vec_PtrAlloc( Abc_NtkCoNum(pNtk) );
Abc_NtkForEachCo( pNtk, pObj, i )
Vec_PtrPush( vFuncsGlob, Abc_ObjGlobalBdd(pObj) );
pbGlobal = (DdNode **)Vec_PtrArray( vFuncsGlob );
// get the network names
pInputNames = Abc_NtkCollectCioNames( pNtk, 0 );
......@@ -83,12 +91,14 @@ void Abc_NtkAutoPrint( Abc_Ntk_t * pNtk, int Output, int fNaive, int fVerbose )
Abc_NtkAutoPrintOne( dd, nInputs, pbGlobal, Output, pInputNames, pOutputNames, fNaive );
// deref the PO functions
Abc_NtkFreeGlobalBdds( pNtk );
// Abc_NtkFreeGlobalBdds( pNtk );
// stop the global BDD manager
Extra_StopManager( pNtk->pManGlob );
pNtk->pManGlob = NULL;
// Extra_StopManager( pNtk->pManGlob );
// pNtk->pManGlob = NULL;
Abc_NtkFreeGlobalBdds( pNtk, 1 );
free( pInputNames );
free( pOutputNames );
Vec_PtrFree( vFuncsGlob );
}
/**Function*************************************************************
......
......@@ -49,25 +49,27 @@ Abc_Ntk_t * Abc_NtkCollapse( Abc_Ntk_t * pNtk, int fBddSizeMax, int fDualRail, i
assert( Abc_NtkIsStrash(pNtk) );
// compute the global BDDs
if ( Abc_NtkGlobalBdds(pNtk, fBddSizeMax, 0, fReorder, fVerbose) == NULL )
if ( Abc_NtkBuildGlobalBdds(pNtk, fBddSizeMax, 1, fReorder, fVerbose) == NULL )
return NULL;
if ( fVerbose )
{
printf( "The shared BDD size is %d nodes. ", Cudd_ReadKeys(pNtk->pManGlob) - Cudd_ReadDead(pNtk->pManGlob) );
DdManager * dd = Abc_NtkGlobalBddMan( pNtk );
printf( "The shared BDD size is %d nodes. ", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
PRT( "BDD construction time", clock() - clk );
}
// create the new network
pNtkNew = Abc_NtkFromGlobalBdds( pNtk );
Abc_NtkFreeGlobalBdds( pNtk );
// Abc_NtkFreeGlobalBdds( pNtk );
Abc_NtkFreeGlobalBdds( pNtk, 1 );
if ( pNtkNew == NULL )
{
Cudd_Quit( pNtk->pManGlob );
pNtk->pManGlob = NULL;
// Cudd_Quit( pNtk->pManGlob );
// pNtk->pManGlob = NULL;
return NULL;
}
Extra_StopManager( pNtk->pManGlob );
pNtk->pManGlob = NULL;
// Extra_StopManager( pNtk->pManGlob );
// pNtk->pManGlob = NULL;
// make the network minimum base
Abc_NtkMinimumBase( pNtkNew );
......@@ -100,8 +102,9 @@ Abc_Ntk_t * Abc_NtkFromGlobalBdds( Abc_Ntk_t * pNtk )
{
ProgressBar * pProgress;
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pNode, * pNodeNew;
DdManager * dd = pNtk->pManGlob;
Abc_Obj_t * pNode, * pDriver, * pNodeNew;
// DdManager * dd = pNtk->pManGlob;
DdManager * dd = Abc_NtkGlobalBddMan( pNtk );
int i;
// start the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
......@@ -112,7 +115,14 @@ Abc_Ntk_t * Abc_NtkFromGlobalBdds( Abc_Ntk_t * pNtk )
Abc_NtkForEachCo( pNtk, pNode, i )
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
pNodeNew = Abc_NodeFromGlobalBdds( pNtkNew, dd, Vec_PtrEntry(pNtk->vFuncsGlob, i) );
pDriver = Abc_ObjFanin0(pNode);
if ( Abc_ObjIsCi(pDriver) && !strcmp(Abc_ObjName(pNode), Abc_ObjName(pDriver)) )
{
Abc_ObjAddFanin( pNode->pCopy, pDriver->pCopy );
continue;
}
// pNodeNew = Abc_NodeFromGlobalBdds( pNtkNew, dd, Vec_PtrEntry(pNtk->vFuncsGlob, i) );
pNodeNew = Abc_NodeFromGlobalBdds( pNtkNew, dd, Abc_ObjGlobalBdd(pNode) );
Abc_ObjAddFanin( pNode->pCopy, pNodeNew );
}
Extra_ProgressBarStop( pProgress );
......
......@@ -202,6 +202,7 @@ void Abc_NtkCutsOracle( Abc_Ntk_t * pNtk, Cut_Oracle_t * p )
***********************************************************************/
Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams )
{
/*
Cut_Man_t * p;
Abc_Obj_t * pObj, * pNode;
int i, nIters, fStatus;
......@@ -288,6 +289,8 @@ printf( "Converged after %d iterations.\n", nIters );
}
//Abc_NtkPrintCuts( p, pNtk, 1 );
return p;
*/
return NULL;
}
/**Function*************************************************************
......
......@@ -86,7 +86,8 @@ void Abc_NtkAutoDebug( Abc_Ntk_t * pNtk, int (*pFuncError) (Abc_Ntk_t *) )
else // no bug
Abc_NtkDelete( pNtkMod );
}
printf( "Iteration %6d : Nodes = %6d. Steps = %6d. Error step = %3d. ", nIter, Abc_NtkObjNum(pNtk), nSteps, i );
printf( "Iter %6d : Latches = %6d. Nodes = %6d. Steps = %6d. Error step = %3d. ",
nIter, Abc_NtkLatchNum(pNtk), Abc_NtkNodeNum(pNtk), nSteps, i );
PRT( "Time", clock() - clk );
if ( i == nSteps ) // could not modify it while preserving the bug
break;
......@@ -116,7 +117,11 @@ int Abc_NtkCountFaninsTotal( Abc_Ntk_t * pNtk )
Abc_NtkForEachObj( pNtk, pObj, i )
Abc_ObjForEachFanin( pObj, pFanin, k )
{
if ( Abc_NodeIsConst(pFanin) )
if ( !Abc_ObjIsNode(pObj) && !Abc_ObjIsPo(pObj) )
continue;
if ( Abc_ObjIsPo(pObj) && Abc_NtkPoNum(pNtk) == 1 )
continue;
if ( Abc_ObjIsNode(pObj) && Abc_NodeIsConst(pFanin) )
continue;
Counter++;
}
......@@ -141,7 +146,11 @@ int Abc_NtkFindGivenFanin( Abc_Ntk_t * pNtk, int Step, Abc_Obj_t ** ppObj, Abc_O
Abc_NtkForEachObj( pNtk, pObj, i )
Abc_ObjForEachFanin( pObj, pFanin, k )
{
if ( Abc_NodeIsConst(pFanin) )
if ( !Abc_ObjIsNode(pObj) && !Abc_ObjIsPo(pObj) )
continue;
if ( Abc_ObjIsPo(pObj) && Abc_NtkPoNum(pNtk) == 1 )
continue;
if ( Abc_ObjIsNode(pObj) && Abc_NodeIsConst(pFanin) )
continue;
if ( Counter++ == Step )
{
......@@ -166,6 +175,7 @@ int Abc_NtkFindGivenFanin( Abc_Ntk_t * pNtk, int Step, Abc_Obj_t ** ppObj, Abc_O
***********************************************************************/
Abc_Ntk_t * Abc_NtkAutoDebugModify( Abc_Ntk_t * pNtkInit, int Step, int fConst1 )
{
extern void Abc_NtkCycleInitStateSop( Abc_Ntk_t * pNtk, int nFrames, int fVerbose );
Abc_Ntk_t * pNtk;
Abc_Obj_t * pObj, * pFanin, * pConst;
// copy the network
......@@ -185,9 +195,9 @@ Abc_Ntk_t * Abc_NtkAutoDebugModify( Abc_Ntk_t * pNtkInit, int Step, int fConst1
Abc_NtkDeleteAll_rec( pFanin );
Abc_NtkSweep( pNtk, 0 );
Abc_NtkCleanupSeq( pNtk, 0 );
Abc_NtkCleanupSeq( pNtk, 0, 0, 0 );
Abc_NtkLogicToSop( pNtk, 0 );
Abc_NtkCycleInitStateSop( pNtk, 20, 0 );
Abc_NtkCycleInitStateSop( pNtk, 50, 0 );
return pNtk;
}
......
......@@ -55,31 +55,22 @@ static int Abc_NodeFindMuxVar( DdManager * dd, DdNode * bFunc, int n
***********************************************************************/
Abc_Ntk_t * Abc_NtkDsdGlobal( Abc_Ntk_t * pNtk, bool fVerbose, bool fPrint, bool fShort )
{
DdManager * dd;
Abc_Ntk_t * pNtkNew;
assert( Abc_NtkIsStrash(pNtk) );
// perform FPGA mapping
if ( Abc_NtkGlobalBdds(pNtk, 10000000, 0, 1, fVerbose) == NULL )
dd = Abc_NtkBuildGlobalBdds( pNtk, 10000000, 1, 1, fVerbose );
if ( dd == NULL )
return NULL;
if ( fVerbose )
printf( "The shared BDD size is %d nodes.\n", Cudd_ReadKeys(pNtk->pManGlob) - Cudd_ReadDead(pNtk->pManGlob) );
printf( "The shared BDD size is %d nodes.\n", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
// transform the result of mapping into a BDD network
pNtkNew = Abc_NtkDsdInternal( pNtk, fVerbose, fPrint, fShort );
Extra_StopManager( dd );
if ( pNtkNew == NULL )
{
Cudd_Quit( pNtk->pManGlob );
pNtk->pManGlob = NULL;
return NULL;
}
Extra_StopManager( pNtk->pManGlob );
pNtk->pManGlob = NULL;
// copy EXDC network
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
printf( "Abc_NtkDsdGlobal: The network check has failed.\n" );
......@@ -102,26 +93,25 @@ Abc_Ntk_t * Abc_NtkDsdGlobal( Abc_Ntk_t * pNtk, bool fVerbose, bool fPrint, bool
***********************************************************************/
Abc_Ntk_t * Abc_NtkDsdInternal( Abc_Ntk_t * pNtk, bool fVerbose, bool fPrint, bool fShort )
{
DdManager * dd = pNtk->pManGlob;
char ** ppNamesCi, ** ppNamesCo;
Vec_Ptr_t * vFuncsGlob;
Dsd_Manager_t * pManDsd;
Abc_Ntk_t * pNtkNew;
DdNode * bFunc;
char ** ppNamesCi, ** ppNamesCo;
DdManager * dd;
Abc_Obj_t * pObj;
int i;
// complement the global functions
vFuncsGlob = Vec_PtrAlloc( Abc_NtkCoNum(pNtk) );
Abc_NtkForEachCo( pNtk, pObj, i )
{
bFunc = Vec_PtrEntry(pNtk->vFuncsGlob, i);
Vec_PtrWriteEntry(pNtk->vFuncsGlob, i, Cudd_NotCond(bFunc, Abc_ObjFaninC0(pObj)) );
}
Vec_PtrPush( vFuncsGlob, Cudd_NotCond(Abc_ObjGlobalBdd(pObj), Abc_ObjFaninC0(pObj)) );
// perform the decomposition
assert( Vec_PtrSize(pNtk->vFuncsGlob) == Abc_NtkCoNum(pNtk) );
dd = Abc_NtkGlobalBddMan(pNtk);
pManDsd = Dsd_ManagerStart( dd, Abc_NtkCiNum(pNtk), fVerbose );
Dsd_Decompose( pManDsd, (DdNode **)pNtk->vFuncsGlob->pArray, Abc_NtkCoNum(pNtk) );
Abc_NtkFreeGlobalBdds( pNtk );
Dsd_Decompose( pManDsd, (DdNode **)vFuncsGlob->pArray, Abc_NtkCoNum(pNtk) );
Vec_PtrFree( vFuncsGlob );
Abc_NtkFreeGlobalBdds( pNtk, 0 );
if ( pManDsd == NULL )
{
Cudd_Quit( dd );
......@@ -138,7 +128,6 @@ Abc_Ntk_t * Abc_NtkDsdInternal( Abc_Ntk_t * pNtk, bool fVerbose, bool fPrint, bo
Abc_NtkFinalize( pNtk, pNtkNew );
// fix the problem with complemented and duplicated CO edges
Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
if ( fPrint )
{
ppNamesCi = Abc_NtkCollectCioNames( pNtk, 0 );
......
......@@ -118,7 +118,7 @@ Abc_Ntk_t * Ivy_ManFpgaToAbc( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan )
// clone the node
pObj = Abc_NtkCloneObj( pObjAbc );
// set complemented functions
pObj->pData = Aig_Not( pObjAbc->pData );
pObj->pData = Hop_Not( pObjAbc->pData );
// return the new node
pObjAbc = pObj;
}
......@@ -172,9 +172,9 @@ Abc_Obj_t * Ivy_ManToAbcFast_rec( Abc_Ntk_t * pNtkNew, Ivy_Man_t * pMan, Ivy_Obj
Ivy_ManForEachNodeVec( pMan, vNodes, pNodeIvy, i )
{
if ( i < Vec_IntSize(vSupp) )
pNodeIvy->pEquiv = (Ivy_Obj_t *)Aig_IthVar( pNtkNew->pManFunc, i );
pNodeIvy->pEquiv = (Ivy_Obj_t *)Hop_IthVar( pNtkNew->pManFunc, i );
else
pNodeIvy->pEquiv = (Ivy_Obj_t *)Aig_And( pNtkNew->pManFunc, (Aig_Obj_t *)Ivy_ObjChild0Equiv(pNodeIvy), (Aig_Obj_t *)Ivy_ObjChild1Equiv(pNodeIvy) );
pNodeIvy->pEquiv = (Ivy_Obj_t *)Hop_And( pNtkNew->pManFunc, (Hop_Obj_t *)Ivy_ObjChild0Equiv(pNodeIvy), (Hop_Obj_t *)Ivy_ObjChild1Equiv(pNodeIvy) );
}
// set the local function
pObjAbc->pData = (Abc_Obj_t *)pObjIvy->pEquiv;
......
/**CFile****************************************************************
FileName [abcIf.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Network and node package.]
Synopsis [Interface with the FPGA mapping package.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 21, 2006.]
Revision [$Id: abcIf.c,v 1.00 2006/11/21 00:00:00 alanmi Exp $]
***********************************************************************/
#include "abc.h"
#include "if.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static If_Man_t * Abc_NtkToIf( Abc_Ntk_t * pNtk, If_Par_t * pPars );
static Abc_Ntk_t * Abc_NtkFromIf( If_Man_t * pIfMan, Abc_Ntk_t * pNtk );
static Abc_Obj_t * Abc_NodeFromIf_rec( Abc_Ntk_t * pNtkNew, If_Man_t * pIfMan, If_Obj_t * pIfObj );
static Hop_Obj_t * Abc_NodeIfToHop( Hop_Man_t * pHopMan, If_Man_t * pIfMan, If_Cut_t * pCut );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Interface with the FPGA mapping package.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIf( Abc_Ntk_t * pNtk, If_Par_t * pPars )
{
Abc_Ntk_t * pNtkNew;
If_Man_t * pIfMan;
assert( Abc_NtkIsStrash(pNtk) );
// print a warning about choice nodes
if ( Abc_NtkGetChoiceNum( pNtk ) )
printf( "Performing FPGA mapping with choices.\n" );
// perform FPGA mapping
pIfMan = Abc_NtkToIf( pNtk, pPars );
if ( pIfMan == NULL )
return NULL;
if ( !If_ManPerformMapping( pIfMan ) )
{
If_ManStop( pIfMan );
return NULL;
}
// transform the result of mapping into a BDD network
pNtkNew = Abc_NtkFromIf( pIfMan, pNtk );
if ( pNtkNew == NULL )
return NULL;
If_ManStop( pIfMan );
// duplicate EXDC
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
printf( "Abc_NtkIf: The network check has failed.\n" );
Abc_NtkDelete( pNtkNew );
return NULL;
}
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Load the network into FPGA manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
If_Man_t * Abc_NtkToIf( Abc_Ntk_t * pNtk, If_Par_t * pPars )
{
ProgressBar * pProgress;
If_Man_t * pIfMan;
Abc_Obj_t * pNode, * pFanin, * pPrev;
int i;
assert( Abc_NtkIsStrash(pNtk) );
// start the mapping manager and set its parameters
pIfMan = If_ManStart( pPars );
// create PIs and remember them in the old nodes
Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)If_ManConst1( pIfMan );
Abc_NtkForEachCi( pNtk, pNode, i )
pNode->pCopy = (Abc_Obj_t *)If_ManCreatePi( pIfMan );
// load the AIG into the mapper
pProgress = Extra_ProgressBarStart( stdout, Abc_NtkNodeNum(pNtk) );
Abc_AigForEachAnd( pNtk, pNode, i )
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
// add the node to the mapper
pNode->pCopy = (Abc_Obj_t *)If_ManCreateAnd( pIfMan,
(If_Obj_t *)Abc_ObjFanin0(pNode)->pCopy, Abc_ObjFaninC0(pNode),
(If_Obj_t *)Abc_ObjFanin1(pNode)->pCopy, Abc_ObjFaninC1(pNode) );
// set up the choice node
if ( Abc_AigNodeIsChoice( pNode ) )
for ( pPrev = pNode, pFanin = pNode->pData; pFanin; pPrev = pFanin, pFanin = pFanin->pData )
If_ObjSetChoice( (If_Obj_t *)pPrev->pCopy, (If_Obj_t *)pFanin->pCopy );
}
Extra_ProgressBarStop( pProgress );
// set the primary outputs without copying the phase
Abc_NtkForEachCo( pNtk, pNode, i )
If_ManCreatePo( pIfMan, (If_Obj_t *)Abc_ObjFanin0(pNode)->pCopy, Abc_ObjFaninC0(pNode) );
return pIfMan;
}
/**Function*************************************************************
Synopsis [Creates the mapped network.]
Description [Assuming the copy field of the mapped nodes are NULL.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkFromIf( If_Man_t * pIfMan, Abc_Ntk_t * pNtk )
{
ProgressBar * pProgress;
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pNode, * pNodeNew;
int i, nDupGates;
// create the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_AIG );
// prepare the mapping manager
If_ManCleanNodeCopy( pIfMan );
If_ManCleanCutData( pIfMan );
// make the mapper point to the new network
If_ObjSetCopy( If_ManConst1(pIfMan), Abc_NtkCreateNodeConst1(pNtkNew) );
Abc_NtkForEachCi( pNtk, pNode, i )
If_ObjSetCopy( If_ManPi(pIfMan, i), pNode->pCopy );
// process the nodes in topological order
pProgress = Extra_ProgressBarStart( stdout, Abc_NtkCoNum(pNtk) );
Abc_NtkForEachCo( pNtk, pNode, i )
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
pNodeNew = Abc_NodeFromIf_rec( pNtkNew, pIfMan, If_ObjFanin0(If_ManPo(pIfMan, i)) );
pNodeNew = Abc_ObjNotCond( pNodeNew, If_ObjFaninC0(If_ManPo(pIfMan, i)) );
Abc_ObjAddFanin( pNode->pCopy, pNodeNew );
}
Extra_ProgressBarStop( pProgress );
// remove the constant node if not used
pNodeNew = (Abc_Obj_t *)If_ObjCopy( If_ManConst1(pIfMan) );
if ( Abc_ObjFanoutNum(pNodeNew) == 0 )
Abc_NtkDeleteObj( pNodeNew );
// decouple the PO driver nodes to reduce the number of levels
nDupGates = Abc_NtkLogicMakeSimpleCos( pNtkNew, 1 );
// if ( nDupGates && If_ManReadVerbose(pIfMan) )
// printf( "Duplicated %d gates to decouple the CO drivers.\n", nDupGates );
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Derive one node after FPGA mapping.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Obj_t * Abc_NodeFromIf_rec( Abc_Ntk_t * pNtkNew, If_Man_t * pIfMan, If_Obj_t * pIfObj )
{
Abc_Obj_t * pNodeNew;
If_Cut_t * pCutBest;
If_Obj_t * pIfLeaf;
int i;
// return if the result if known
pNodeNew = (Abc_Obj_t *)If_ObjCopy( pIfObj );
if ( pNodeNew )
return pNodeNew;
assert( pIfObj->Type == IF_AND );
// get the parameters of the best cut
// create a new node
pNodeNew = Abc_NtkCreateNode( pNtkNew );
pCutBest = If_ObjCutBest( pIfObj );
If_CutForEachLeaf( pIfMan, pCutBest, pIfLeaf, i )
Abc_ObjAddFanin( pNodeNew, Abc_NodeFromIf_rec(pNtkNew, pIfMan, pIfLeaf) );
// derive the function of this node
pNodeNew->pData = Abc_NodeIfToHop( pNtkNew->pManFunc, pIfMan, pCutBest );
If_ObjSetCopy( pIfObj, pNodeNew );
return pNodeNew;
}
/**Function*************************************************************
Synopsis [Recursively derives the truth table for the cut.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Obj_t * Abc_NodeIfToHop_rec( Hop_Man_t * pHopMan, If_Man_t * pIfMan, If_Cut_t * pCut, Vec_Ptr_t * vVisited )
{
Hop_Obj_t * gFunc, * gFunc0, * gFunc1;
// if the cut is visited, return the result
if ( If_CutData(pCut) )
return If_CutData(pCut);
// compute the functions of the children
gFunc0 = Abc_NodeIfToHop_rec( pHopMan, pIfMan, pCut->pOne, vVisited );
gFunc1 = Abc_NodeIfToHop_rec( pHopMan, pIfMan, pCut->pTwo, vVisited );
// get the function of the cut
gFunc = Hop_And( pHopMan, Hop_NotCond(gFunc0, pCut->fCompl0), Hop_NotCond(gFunc1, pCut->fCompl1) );
gFunc = Hop_NotCond( gFunc, pCut->Phase );
assert( If_CutData(pCut) == NULL );
If_CutSetData( pCut, gFunc );
// add this cut to the visited list
Vec_PtrPush( vVisited, pCut );
return gFunc;
}
/**Function*************************************************************
Synopsis [Derives the truth table for one cut.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Obj_t * Abc_NodeIfToHop( Hop_Man_t * pHopMan, If_Man_t * pIfMan, If_Cut_t * pCut )
{
Hop_Obj_t * gFunc;
If_Obj_t * pLeaf;
int i;
assert( pCut->nLeaves > 1 );
// set the leaf variables
If_CutForEachLeaf( pIfMan, pCut, pLeaf, i )
If_CutSetData( If_ObjCutTriv(pLeaf), Hop_IthVar(pHopMan, i) );
// recursively compute the function while collecting visited cuts
Vec_PtrClear( pIfMan->vTemp );
gFunc = Abc_NodeIfToHop_rec( pHopMan, pIfMan, pCut, pIfMan->vTemp );
// printf( "%d ", Vec_PtrSize(p->vTemp) );
// clean the cuts
If_CutForEachLeaf( pIfMan, pCut, pLeaf, i )
If_CutSetData( If_ObjCutTriv(pLeaf), NULL );
Vec_PtrForEachEntry( pIfMan->vTemp, pCut, i )
If_CutSetData( pCut, NULL );
return gFunc;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......@@ -53,6 +53,8 @@ static inline Abc_Obj_t * Abc_ObjFanin1Ivy( Abc_Ntk_t * p, Ivy_Obj_t * pObj ) {
static Vec_Int_t * Abc_NtkCollectLatchValuesIvy( Abc_Ntk_t * pNtk, int fUseDcs );
extern int timeRetime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
......@@ -72,6 +74,7 @@ Ivy_Man_t * Abc_NtkIvyBefore( Abc_Ntk_t * pNtk, int fSeq, int fUseDc )
{
Ivy_Man_t * pMan;
int fCleanup = 1;
//timeRetime = clock();
assert( !Abc_NtkIsNetlist(pNtk) );
assert( !Abc_NtkIsSeq(pNtk) );
if ( Abc_NtkIsBddLogic(pNtk) )
......@@ -107,6 +110,7 @@ Ivy_Man_t * Abc_NtkIvyBefore( Abc_Ntk_t * pNtk, int fSeq, int fUseDc )
Vec_IntFree( vInit );
// Ivy_ManPrintStats( pMan );
}
//timeRetime = clock() - timeRetime;
return pMan;
}
......@@ -184,17 +188,22 @@ Abc_Ntk_t * Abc_NtkIvyHaig( Abc_Ntk_t * pNtk, int nIters, int fUseZeroCost, int
{
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan;
int i;
// int i;
pMan = Abc_NtkIvyBefore( pNtk, 1, 1 );
if ( pMan == NULL )
return NULL;
//timeRetime = clock();
Ivy_ManHaigStart( pMan, fVerbose );
// Ivy_ManRewriteSeq( pMan, 0, 0 );
for ( i = 0; i < nIters; i++ )
Ivy_ManRewriteSeq( pMan, fUseZeroCost, 0 );
Ivy_ManHaigPostprocess( pMan, fVerbose );
// for ( i = 0; i < nIters; i++ )
// Ivy_ManRewriteSeq( pMan, fUseZeroCost, 0 );
Ivy_ManRewriteSeq( pMan, 0, 0 );
Ivy_ManRewriteSeq( pMan, 1, 0 );
//printf( "Haig size = %d.\n", Ivy_ManNodeNum(pMan->pHaig) );
// Ivy_ManHaigPostprocess( pMan, fVerbose );
//timeRetime = clock() - timeRetime;
// write working AIG into the current network
// pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 1, 0 );
......@@ -246,7 +255,9 @@ Abc_Ntk_t * Abc_NtkIvyRewrite( Abc_Ntk_t * pNtk, int fUpdateLevel, int fUseZeroC
pMan = Abc_NtkIvyBefore( pNtk, 0, 0 );
if ( pMan == NULL )
return NULL;
//timeRetime = clock();
Ivy_ManRewritePre( pMan, fUpdateLevel, fUseZeroCost, fVerbose );
//timeRetime = clock() - timeRetime;
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 0, 0 );
Ivy_ManStop( pMan );
return pNtkAig;
......@@ -270,7 +281,9 @@ Abc_Ntk_t * Abc_NtkIvyRewriteSeq( Abc_Ntk_t * pNtk, int fUseZeroCost, int fVerbo
pMan = Abc_NtkIvyBefore( pNtk, 1, 1 );
if ( pMan == NULL )
return NULL;
//timeRetime = clock();
Ivy_ManRewriteSeq( pMan, fUseZeroCost, fVerbose );
//timeRetime = clock() - timeRetime;
// Ivy_ManRewriteSeq( pMan, 1, 0 );
// Ivy_ManRewriteSeq( pMan, 1, 0 );
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 1, 0 );
......
......@@ -104,7 +104,7 @@ int Abc_NtkSuperChoiceLut( Abc_Ntk_t * pNtk, int nLutSize, int nCutSizeMax, int
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->Level = 0;
//Abc_NtkGetLevelNum( pNtk );
//Abc_NtkLevel( pNtk );
// start the managers
pManScl = Abc_ManSclStart( nLutSize, nCutSizeMax, 1000 );
......
......@@ -24,8 +24,8 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static Aig_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk );
static Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan );
static Hop_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk );
static Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Hop_Man_t * pMan );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......@@ -45,29 +45,29 @@ static Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan );
Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk )
{
Abc_Ntk_t * pNtkAig;
Aig_Man_t * pMan, * pTemp;
Hop_Man_t * pMan, * pTemp;
assert( Abc_NtkIsStrash(pNtk) );
// convert to the AIG manager
pMan = Abc_NtkToAig( pNtk );
if ( pMan == NULL )
return NULL;
if ( !Aig_ManCheck( pMan ) )
if ( !Hop_ManCheck( pMan ) )
{
printf( "AIG check has failed.\n" );
Aig_ManStop( pMan );
Hop_ManStop( pMan );
return NULL;
}
// perform balance
Aig_ManPrintStats( pMan );
// Aig_ManDumpBlif( pMan, "aig_temp.blif" );
pMan = Aig_ManBalance( pTemp = pMan, 1 );
Aig_ManStop( pTemp );
Aig_ManPrintStats( pMan );
Hop_ManPrintStats( pMan );
// Hop_ManDumpBlif( pMan, "aig_temp.blif" );
pMan = Hop_ManBalance( pTemp = pMan, 1 );
Hop_ManStop( pTemp );
Hop_ManPrintStats( pMan );
// convert from the AIG manager
pNtkAig = Abc_NtkFromAig( pNtk, pMan );
if ( pNtkAig == NULL )
return NULL;
Aig_ManStop( pMan );
Hop_ManStop( pMan );
// make sure everything is okay
if ( !Abc_NtkCheck( pNtkAig ) )
{
......@@ -89,24 +89,24 @@ Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
Aig_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk )
Hop_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk )
{
Aig_Man_t * pMan;
Hop_Man_t * pMan;
Abc_Obj_t * pObj;
int i;
// create the manager
pMan = Aig_ManStart();
pMan = Hop_ManStart();
// transfer the pointers to the basic nodes
Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Aig_ManConst1(pMan);
Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Hop_ManConst1(pMan);
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->pCopy = (Abc_Obj_t *)Aig_ObjCreatePi(pMan);
pObj->pCopy = (Abc_Obj_t *)Hop_ObjCreatePi(pMan);
// perform the conversion of the internal nodes (assumes DFS ordering)
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = (Abc_Obj_t *)Aig_And( pMan, (Aig_Obj_t *)Abc_ObjChild0Copy(pObj), (Aig_Obj_t *)Abc_ObjChild1Copy(pObj) );
pObj->pCopy = (Abc_Obj_t *)Hop_And( pMan, (Hop_Obj_t *)Abc_ObjChild0Copy(pObj), (Hop_Obj_t *)Abc_ObjChild1Copy(pObj) );
// create the POs
Abc_NtkForEachCo( pNtk, pObj, i )
Aig_ObjCreatePo( pMan, (Aig_Obj_t *)Abc_ObjChild0Copy(pObj) );
Aig_ManCleanup( pMan );
Hop_ObjCreatePo( pMan, (Hop_Obj_t *)Abc_ObjChild0Copy(pObj) );
Hop_ManCleanup( pMan );
return pMan;
}
......@@ -121,26 +121,26 @@ Aig_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtk, Aig_Man_t * pMan )
Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtk, Hop_Man_t * pMan )
{
Vec_Ptr_t * vNodes;
Abc_Ntk_t * pNtkNew;
Aig_Obj_t * pObj;
Hop_Obj_t * pObj;
int i;
// perform strashing
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
// transfer the pointers to the basic nodes
Aig_ManConst1(pMan)->pData = Abc_AigConst1(pNtkNew);
Aig_ManForEachPi( pMan, pObj, i )
Hop_ManConst1(pMan)->pData = Abc_AigConst1(pNtkNew);
Hop_ManForEachPi( pMan, pObj, i )
pObj->pData = Abc_NtkCi(pNtkNew, i);
// rebuild the AIG
vNodes = Aig_ManDfs( pMan );
vNodes = Hop_ManDfs( pMan );
Vec_PtrForEachEntry( vNodes, pObj, i )
pObj->pData = Abc_AigAnd( pNtkNew->pManFunc, (Abc_Obj_t *)Aig_ObjChild0Copy(pObj), (Abc_Obj_t *)Aig_ObjChild1Copy(pObj) );
pObj->pData = Abc_AigAnd( pNtkNew->pManFunc, (Abc_Obj_t *)Hop_ObjChild0Copy(pObj), (Abc_Obj_t *)Hop_ObjChild1Copy(pObj) );
Vec_PtrFree( vNodes );
// connect the PO nodes
Aig_ManForEachPo( pMan, pObj, i )
Abc_ObjAddFanin( Abc_NtkCo(pNtkNew, i), (Abc_Obj_t *)Aig_ObjChild0Copy(pObj) );
Hop_ManForEachPo( pMan, pObj, i )
Abc_ObjAddFanin( Abc_NtkCo(pNtkNew, i), (Abc_Obj_t *)Hop_ObjChild0Copy(pObj) );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkFromAig(): Network check has failed.\n" );
return pNtkNew;
......
......@@ -113,9 +113,9 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
}
if ( Abc_NtkIsStrash(pNtk) )
fprintf( pFile, " lev = %3d", Abc_AigGetLevelNum(pNtk) );
fprintf( pFile, " lev = %3d", Abc_AigLevel(pNtk) );
else if ( !Abc_NtkIsSeq(pNtk) )
fprintf( pFile, " lev = %3d", Abc_NtkGetLevelNum(pNtk) );
fprintf( pFile, " lev = %3d", Abc_NtkLevel(pNtk) );
fprintf( pFile, "\n" );
// print the statistic into a file
......@@ -126,7 +126,7 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", Abc_NtkPiNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%d ", Abc_AigGetLevelNum(pNtk) );
fprintf( pTable, "%d ", Abc_AigLevel(pNtk) );
fprintf( pTable, "\n" );
fclose( pTable );
}
......@@ -150,7 +150,7 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
FILE * pTable;
pTable = fopen( "fpga/fpga_stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", Abc_NtkGetLevelNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkLevel(pNtk) );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%.2f ", (float)(s_MappingMem)/(float)(1<<20) );
fprintf( pTable, "%.2f", (float)(s_MappingTime)/(float)(CLOCKS_PER_SEC) );
......@@ -159,23 +159,41 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
}
*/
/*
// print the statistic into a file
{
static int Counter = 0;
extern int timeRetime;
FILE * pTable;
Counter++;
pTable = fopen( "sap/stats_retime.txt", "a+" );
pTable = fopen( "a/ret__stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkLatchNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkGetLevelNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkLevel(pNtk) );
fprintf( pTable, "%.2f ", (float)(timeRetime)/(float)(CLOCKS_PER_SEC) );
if ( Counter % 4 == 0 )
fprintf( pTable, "\n" );
fclose( pTable );
}
/*
// print the statistic into a file
{
static int Counter = 0;
extern int timeRetime;
FILE * pTable;
Counter++;
pTable = fopen( "d/stats.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
// fprintf( pTable, "%d ", Abc_NtkPiNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkPoNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkLatchNum(pNtk) );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
fprintf( pTable, "%.2f ", (float)(timeRetime)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
/*
......@@ -214,7 +232,8 @@ void Abc_NtkPrintIo( FILE * pFile, Abc_Ntk_t * pNtk )
fprintf( pFile, "Latches (%d): ", Abc_NtkLatchNum(pNtk) );
Abc_NtkForEachLatch( pNtk, pObj, i )
fprintf( pFile, " %s", Abc_ObjName(pObj) );
fprintf( pFile, " %s(%s=%s)", Abc_ObjName(pObj),
Abc_ObjName(Abc_ObjFanout0(pObj)), Abc_ObjName(Abc_ObjFanin0(pObj)) );
fprintf( pFile, "\n" );
}
......@@ -500,7 +519,7 @@ void Abc_NtkPrintLevel( FILE * pFile, Abc_Ntk_t * pNtk, int fProfile, int fListN
if ( fListNodes )
{
int nLevels;
nLevels = Abc_NtkGetLevelNum(pNtk);
nLevels = Abc_NtkLevel(pNtk);
printf( "Nodes by level:\n" );
for ( i = 0; i <= nLevels; i++ )
{
......@@ -553,7 +572,7 @@ void Abc_NtkPrintLevel( FILE * pFile, Abc_Ntk_t * pNtk, int fProfile, int fListN
int nOutsSum, nOutsTotal;
if ( !Abc_NtkIsStrash(pNtk) )
Abc_NtkGetLevelNum(pNtk);
Abc_NtkLevel(pNtk);
LevelMax = 0;
Abc_NtkForEachCo( pNtk, pNode, i )
......@@ -840,41 +859,6 @@ void Abc_NtkPrintStrSupports( Abc_Ntk_t * pNtk )
/**Function*************************************************************
Synopsis [Prints information about the clock skew schedule.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkPrintSkews( FILE * pFile, Abc_Ntk_t * pNtk, int fPrintAll ) {
Abc_Obj_t * pObj;
int i;
int nNonZero = 0;
float skew, sum = 0.0, avg;
if (fPrintAll) fprintf( pFile, "Full Clock Skew Schedule:\n\tGlobal Skew = %.2f\n", pNtk->globalSkew );
Abc_NtkForEachLatch( pNtk, pObj, i ) {
skew = Abc_NtkGetLatSkew( pNtk, i );
if ( skew != 0.0 ) {
nNonZero++;
sum += ABS( skew );
}
if (fPrintAll) fprintf( pFile, "\tLatch %d (Id = %d) \t Endpoint Skew = %.2f\n", i, pObj->Id, skew);
}
avg = sum / Abc_NtkLatchNum( pNtk );
fprintf( pFile, "Endpoint Skews : Total |Skew| = %.2f\t Avg |Skew| = %.2f\t Non-Zero Skews = %d\n",
sum, avg, nNonZero );
}
/**Function*************************************************************
Synopsis [Prints information about the object.]
Description []
......@@ -942,6 +926,12 @@ void Abc_ObjPrint( FILE * pFile, Abc_Obj_t * pObj )
Abc_ObjForEachFanin( pObj, pFanin, i )
fprintf( pFile, "%d ", pFanin->Id );
fprintf( pFile, ") " );
/*
fprintf( pFile, " Fanouts ( " );
Abc_ObjForEachFanout( pObj, pFanin, i )
fprintf( pFile, "%d(%c) ", pFanin->Id, Abc_NodeIsTravIdCurrent(pFanin)? '+' : '-' );
fprintf( pFile, ") " );
*/
// print the logic function
if ( Abc_ObjIsNode(pObj) && Abc_NtkIsSopLogic(pObj->pNtk) )
fprintf( pFile, " %s", pObj->pData );
......
......@@ -310,7 +310,7 @@ void Abc_NtkMiterPrint( Abc_Ntk_t * pNtk, char * pString, int clk, int fVerbose
if ( !fVerbose )
return;
printf( "Nodes = %7d. Levels = %4d. ", Abc_NtkNodeNum(pNtk),
Abc_NtkIsStrash(pNtk)? Abc_AigGetLevelNum(pNtk) : Abc_NtkGetLevelNum(pNtk) );
Abc_NtkIsStrash(pNtk)? Abc_AigLevel(pNtk) : Abc_NtkLevel(pNtk) );
PRT( pString, clock() - clk );
}
......
......@@ -156,7 +156,7 @@ pManRef->timeTotal = clock() - clkStart;
if ( fUpdateLevel )
Abc_NtkStopReverseLevels( pNtk );
else
Abc_NtkGetLevelNum( pNtk );
Abc_NtkLevel( pNtk );
// check
if ( !Abc_NtkCheck( pNtk ) )
{
......
......@@ -183,7 +183,7 @@ pManRst->timeTotal = clock() - clkStart;
if ( fUpdateLevel )
Abc_NtkStopReverseLevels( pNtk );
else
Abc_NtkGetLevelNum( pNtk );
Abc_NtkLevel( pNtk );
// check
if ( !Abc_NtkCheck( pNtk ) )
{
......
......@@ -232,7 +232,7 @@ pManRes->timeTotal = clock() - clkStart;
if ( fUpdateLevel )
Abc_NtkStopReverseLevels( pNtk );
else
Abc_NtkGetLevelNum( pNtk );
Abc_NtkLevel( pNtk );
// check
if ( !Abc_NtkCheck( pNtk ) )
{
......
......@@ -158,7 +158,7 @@ Rwr_ManAddTimeTotal( pManRwr, clock() - clkStart );
if ( fUpdateLevel )
Abc_NtkStopReverseLevels( pNtk );
else
Abc_NtkGetLevelNum( pNtk );
Abc_NtkLevel( pNtk );
// check
if ( !Abc_NtkCheck( pNtk ) )
{
......
......@@ -104,7 +104,7 @@ int Abc_NtkRR( Abc_Ntk_t * pNtk, int nFaninLevels, int nFanoutLevels, int fUseFa
p->nFaninLevels = nFaninLevels;
p->nFanoutLevels = nFanoutLevels;
p->nNodesOld = Abc_NtkNodeNum(pNtk);
p->nLevelsOld = Abc_AigGetLevelNum(pNtk);
p->nLevelsOld = Abc_AigLevel(pNtk);
// remember latch values
// Abc_NtkForEachLatch( pNtk, pNode, i )
// pNode->pNext = pNode->pData;
......@@ -220,7 +220,7 @@ int Abc_NtkRR( Abc_Ntk_t * pNtk, int nFaninLevels, int nFanoutLevels, int fUseFa
// pNode->pData = pNode->pNext, pNode->pNext = NULL;
// put the nodes into the DFS order and reassign their IDs
Abc_NtkReassignIds( pNtk );
Abc_NtkGetLevelNum( pNtk );
Abc_NtkLevel( pNtk );
// check
if ( !Abc_NtkCheck( pNtk ) )
{
......@@ -298,7 +298,7 @@ void Abc_RRManPrintStats( Abc_RRMan_t * p )
printf( "Edges tried = %6d.\n", p->nEdgesTried );
printf( "Edges removed = %6d. (%5.2f %%)\n", p->nEdgesRemoved, 100.0*p->nEdgesRemoved/p->nEdgesTried );
printf( "Node gain = %6d. (%5.2f %%)\n", p->nNodesOld - Abc_NtkNodeNum(p->pNtk), Ratio );
printf( "Level gain = %6d.\n", p->nLevelsOld - Abc_AigGetLevelNum(p->pNtk) );
printf( "Level gain = %6d.\n", p->nLevelsOld - Abc_AigLevel(p->pNtk) );
PRT( "Windowing ", p->timeWindow );
PRT( "Miter ", p->timeMiter );
PRT( " Construct ", p->timeMiter - p->timeProve );
......
......@@ -458,7 +458,7 @@ int Abc_NtkMiterSatCreateInt( solver * pSat, Abc_Ntk_t * pNtk, int fJFront )
int i, k, fUseMuxes = 1;
int clk1 = clock(), clk;
int fOrderCiVarsFirst = 0;
int nLevelsMax = Abc_AigGetLevelNum(pNtk);
int nLevelsMax = Abc_AigLevel(pNtk);
int RetValue = 0;
assert( Abc_NtkIsStrash(pNtk) );
......
/**CFile****************************************************************
FileName [aigStrash.c]
FileName [abcStrash.c]
SystemName [ABC: Logic synthesis and verification system.]
......@@ -14,7 +14,7 @@
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: aigStrash.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
Revision [$Id: abcStrash.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
......@@ -46,10 +46,12 @@ static void Abc_NtkStrashPerform( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew, bool fA
***********************************************************************/
Abc_Ntk_t * Abc_NtkRestrash( Abc_Ntk_t * pNtk, bool fCleanup )
{
extern int timeRetime;
Abc_Ntk_t * pNtkAig;
Abc_Obj_t * pObj;
int i, nNodes;
int i, nNodes, RetValue;
assert( Abc_NtkIsStrash(pNtk) );
//timeRetime = clock();
// print warning about choice nodes
if ( Abc_NtkGetChoiceNum( pNtk ) )
printf( "Warning: The choice nodes in the original AIG are removed by strashing.\n" );
......@@ -58,7 +60,7 @@ Abc_Ntk_t * Abc_NtkRestrash( Abc_Ntk_t * pNtk, bool fCleanup )
// restrash the nodes (assuming a topological order of the old network)
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = Abc_AigAnd( pNtkAig->pManFunc, Abc_ObjChild0Copy(pObj), Abc_ObjChild1Copy(pObj) );
// finalize the network
//l finalize the network
Abc_NtkFinalize( pNtk, pNtkAig );
// print warning about self-feed latches
// if ( Abc_NtkCountSelfFeedLatches(pNtkAig) )
......@@ -76,6 +78,9 @@ Abc_Ntk_t * Abc_NtkRestrash( Abc_Ntk_t * pNtk, bool fCleanup )
Abc_NtkDelete( pNtkAig );
return NULL;
}
//timeRetime = clock() - timeRetime;
if ( RetValue = Abc_NtkRemoveSelfFeedLatches(pNtkAig) )
printf( "Modified %d self-feeding latches. The result will not verify.\n", RetValue );
return pNtkAig;
}
......@@ -106,7 +111,7 @@ Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool fCleanup )
return NULL;
}
// perform strashing
Abc_NtkCleanCopy( pNtk );
// Abc_NtkCleanCopy( pNtk );
pNtkAig = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
Abc_NtkStrashPerform( pNtk, pNtkAig, fAllNodes );
Abc_NtkFinalize( pNtk, pNtkAig );
......@@ -205,13 +210,17 @@ int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fAddPos )
***********************************************************************/
void Abc_NtkStrashPerform( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkNew, bool fAllNodes )
{
extern Vec_Ptr_t * Abc_NtkDfsIter( Abc_Ntk_t * pNtk, int fCollectAll );
ProgressBar * pProgress;
Vec_Ptr_t * vNodes;
Abc_Obj_t * pNodeOld;
int i;
int i, clk = clock();
assert( Abc_NtkIsLogic(pNtkOld) );
assert( Abc_NtkIsStrash(pNtkNew) );
vNodes = Abc_NtkDfs( pNtkOld, fAllNodes );
// vNodes = Abc_NtkDfs( pNtkOld, fAllNodes );
vNodes = Abc_NtkDfsIter( pNtkOld, fAllNodes );
//printf( "Nodes = %d. ", Vec_PtrSize(vNodes) );
//PRT( "Time", clock() - clk );
pProgress = Extra_ProgressBarStart( stdout, vNodes->nSize );
Vec_PtrForEachEntry( vNodes, pNodeOld, i )
{
......@@ -233,16 +242,16 @@ void Abc_NtkStrashPerform( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkNew, bool fAllNo
SeeAlso []
***********************************************************************/
void Abc_NodeStrash_rec( Abc_Aig_t * pMan, Aig_Obj_t * pObj )
void Abc_NodeStrash_rec( Abc_Aig_t * pMan, Hop_Obj_t * pObj )
{
assert( !Aig_IsComplement(pObj) );
if ( !Aig_ObjIsNode(pObj) || Aig_ObjIsMarkA(pObj) )
assert( !Hop_IsComplement(pObj) );
if ( !Hop_ObjIsNode(pObj) || Hop_ObjIsMarkA(pObj) )
return;
Abc_NodeStrash_rec( pMan, Aig_ObjFanin0(pObj) );
Abc_NodeStrash_rec( pMan, Aig_ObjFanin1(pObj) );
pObj->pData = Abc_AigAnd( pMan, (Abc_Obj_t *)Aig_ObjChild0Copy(pObj), (Abc_Obj_t *)Aig_ObjChild1Copy(pObj) );
assert( !Aig_ObjIsMarkA(pObj) ); // loop detection
Aig_ObjSetMarkA( pObj );
Abc_NodeStrash_rec( pMan, Hop_ObjFanin0(pObj) );
Abc_NodeStrash_rec( pMan, Hop_ObjFanin1(pObj) );
pObj->pData = Abc_AigAnd( pMan, (Abc_Obj_t *)Hop_ObjChild0Copy(pObj), (Abc_Obj_t *)Hop_ObjChild1Copy(pObj) );
assert( !Hop_ObjIsMarkA(pObj) ); // loop detection
Hop_ObjSetMarkA( pObj );
}
/**Function*************************************************************
......@@ -258,8 +267,8 @@ void Abc_NodeStrash_rec( Abc_Aig_t * pMan, Aig_Obj_t * pObj )
***********************************************************************/
Abc_Obj_t * Abc_NodeStrash( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNodeOld )
{
Aig_Man_t * pMan;
Aig_Obj_t * pRoot;
Hop_Man_t * pMan;
Hop_Obj_t * pRoot;
Abc_Obj_t * pFanin;
int i;
assert( Abc_ObjIsNode(pNodeOld) );
......@@ -269,15 +278,15 @@ Abc_Obj_t * Abc_NodeStrash( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNodeOld )
pRoot = pNodeOld->pData;
// check the constant case
if ( Abc_NodeIsConst(pNodeOld) )
return Abc_ObjNotCond( Abc_AigConst1(pNtkNew), Aig_IsComplement(pRoot) );
return Abc_ObjNotCond( Abc_AigConst1(pNtkNew), Hop_IsComplement(pRoot) );
// set elementary variables
Abc_ObjForEachFanin( pNodeOld, pFanin, i )
Aig_IthVar(pMan, i)->pData = pFanin->pCopy;
Hop_IthVar(pMan, i)->pData = pFanin->pCopy;
// strash the AIG of this node
Abc_NodeStrash_rec( pNtkNew->pManFunc, Aig_Regular(pRoot) );
Aig_ConeUnmark_rec( Aig_Regular(pRoot) );
Abc_NodeStrash_rec( pNtkNew->pManFunc, Hop_Regular(pRoot) );
Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
// return the final node
return Abc_ObjNotCond( Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) );
return Abc_ObjNotCond( Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );
}
......@@ -328,7 +337,7 @@ Abc_Ntk_t * Abc_NtkTopmost( Abc_Ntk_t * pNtk, int nLevels )
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkCoNum(pNtk) == 1 );
// get the cutoff level
LevelCut = ABC_MAX( 0, Abc_AigGetLevelNum(pNtk) - nLevels );
LevelCut = ABC_MAX( 0, Abc_AigLevel(pNtk) - nLevels );
// start the network
pNtkNew = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
......
......@@ -79,7 +79,7 @@ bool Abc_NtkFraigSweep( Abc_Ntk_t * pNtk, int fUseInv, int fExdc, int fVerbose )
if ( fUseTrick )
{
extern void * Abc_FrameReadLibGen();
Aig_ManStop( pNtk->pManFunc );
Hop_ManStop( pNtk->pManFunc );
pNtk->pManFunc = Abc_FrameReadLibGen();
pNtk->ntkFunc = ABC_FUNC_MAP;
Abc_NtkForEachNode( pNtk, pObj, i )
......@@ -269,7 +269,7 @@ void Abc_NtkFraigTransform( Abc_Ntk_t * pNtk, stmm_table * tEquiv, int fUseInv,
if ( stmm_count(tEquiv) == 0 )
return;
// assign levels to the nodes of the network
Abc_NtkGetLevelNum( pNtk );
Abc_NtkLevel( pNtk );
// merge nodes in the classes
if ( Abc_NtkHasMapping( pNtk ) )
{
......@@ -897,7 +897,7 @@ int Abc_NtkReplaceAutonomousLogic( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
int Abc_NtkCleanupSeq( Abc_Ntk_t * pNtk, int fVerbose )
int Abc_NtkCleanupSeq( Abc_Ntk_t * pNtk, int fLatchSweep, int fAutoSweep, int fVerbose )
{
Vec_Ptr_t * vNodes;
int Counter;
......@@ -910,20 +910,26 @@ int Abc_NtkCleanupSeq( Abc_Ntk_t * pNtk, int fVerbose )
if ( fVerbose )
printf( "Cleanup removed %4d dangling objects.\n", Counter );
// check if some of the latches can be removed
Counter = Abc_NtkLatchSweep( pNtk );
if ( fVerbose )
printf( "Cleanup removed %4d redundant latches.\n", Counter );
if ( fLatchSweep )
{
Counter = Abc_NtkLatchSweep( pNtk );
if ( fVerbose )
printf( "Cleanup removed %4d redundant latches.\n", Counter );
}
// detect the autonomous components
vNodes = Abc_NtkDfsSeqReverse( pNtk );
Vec_PtrFree( vNodes );
// replace them by PIs
Counter = Abc_NtkReplaceAutonomousLogic( pNtk );
if ( fVerbose )
printf( "Cleanup added %4d additional PIs.\n", Counter );
// remove the non-marked nodes
Counter = Abc_NodeRemoveNonCurrentObjects( pNtk );
if ( fVerbose )
printf( "Cleanup removed %4d autonomous objects.\n", Counter );
if ( fAutoSweep )
{
vNodes = Abc_NtkDfsSeqReverse( pNtk );
Vec_PtrFree( vNodes );
// replace them by PIs
Counter = Abc_NtkReplaceAutonomousLogic( pNtk );
if ( fVerbose )
printf( "Cleanup added %4d additional PIs.\n", Counter );
// remove the non-marked nodes
Counter = Abc_NodeRemoveNonCurrentObjects( pNtk );
if ( fVerbose )
printf( "Cleanup removed %4d autonomous objects.\n", Counter );
}
// check
if ( !Abc_NtkCheck( pNtk ) )
printf( "Abc_NtkCleanupSeq: The network check has failed.\n" );
......
......@@ -88,7 +88,7 @@ void Abc_NtkSymmetriesUsingBdds( Abc_Ntk_t * pNtk, int fNaive, int fVerbose )
// compute the global functions
clk = clock();
dd = Abc_NtkGlobalBdds( pNtk, 10000000, 0, 1, fVerbose );
dd = Abc_NtkBuildGlobalBdds( pNtk, 10000000, 1, 1, fVerbose );
Cudd_AutodynDisable( dd );
Cudd_zddVarsFromBddVars( dd, 2 );
clkBdd = clock() - clk;
......@@ -97,9 +97,10 @@ clk = clock();
Ntk_NetworkSymmsBdd( dd, pNtk, fNaive, fVerbose );
clkSym = clock() - clk;
// undo the global functions
Abc_NtkFreeGlobalBdds( pNtk );
Extra_StopManager( dd );
pNtk->pManGlob = NULL;
// Abc_NtkFreeGlobalBdds( pNtk );
// Extra_StopManager( dd );
// pNtk->pManGlob = NULL;
Abc_NtkFreeGlobalBdds( pNtk, 1 );
PRT( "Constructing BDDs", clkBdd );
PRT( "Computing symms ", clkSym );
......@@ -129,7 +130,8 @@ void Ntk_NetworkSymmsBdd( DdManager * dd, Abc_Ntk_t * pNtk, int fNaive, int fVer
// compute symmetry info for each PO
Abc_NtkForEachCo( pNtk, pNode, i )
{
bFunc = pNtk->vFuncsGlob->pArray[i];
// bFunc = pNtk->vFuncsGlob->pArray[i];
bFunc = Abc_ObjGlobalBdd( pNode );
nSupps += Cudd_SupportSize( dd, bFunc );
if ( Cudd_IsConstant(bFunc) )
continue;
......
......@@ -648,8 +648,8 @@ void Abc_NtkStartReverseLevels( Abc_Ntk_t * pNtk )
int i, k, nLevelsCur;
// assert( Abc_NtkIsStrash(pNtk) );
// remember the maximum number of direct levels
// pNtk->LevelMax = Abc_AigGetLevelNum(pNtk);
pNtk->LevelMax = Abc_NtkGetLevelNum(pNtk);
// pNtk->LevelMax = Abc_AigLevel(pNtk);
pNtk->LevelMax = Abc_NtkLevel(pNtk);
// start the reverse levels
pNtk->vLevelsR = Vec_IntAlloc( 0 );
Vec_IntFill( pNtk->vLevelsR, Abc_NtkObjNumMax(pNtk), 0 );
......
......@@ -66,20 +66,22 @@ void Abc_NtkPrintUnateBdd( Abc_Ntk_t * pNtk, int fUseNaive, int fVerbose )
Abc_Obj_t * pNode;
Extra_UnateInfo_t * p;
DdManager * dd; // the BDD manager used to hold shared BDDs
DdNode ** pbGlobal; // temporary storage for global BDDs
// DdNode ** pbGlobal; // temporary storage for global BDDs
int TotalSupps = 0;
int TotalUnate = 0;
int i, clk = clock();
int clkBdd, clkUnate;
// compute the global BDDs
if ( Abc_NtkGlobalBdds(pNtk, 10000000, 0, 1, fVerbose) == NULL )
dd = Abc_NtkBuildGlobalBdds(pNtk, 10000000, 1, 1, fVerbose);
if ( dd == NULL )
return;
clkBdd = clock() - clk;
// get information about the network
dd = pNtk->pManGlob;
pbGlobal = (DdNode **)Vec_PtrArray( pNtk->vFuncsGlob );
// dd = pNtk->pManGlob;
// dd = Abc_NtkGlobalBddMan( pNtk );
// pbGlobal = (DdNode **)Vec_PtrArray( pNtk->vFuncsGlob );
// print the size of the BDDs
printf( "The shared BDD size is %d nodes.\n", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
......@@ -89,7 +91,8 @@ clkBdd = clock() - clk;
{
Abc_NtkForEachCo( pNtk, pNode, i )
{
p = Extra_UnateComputeSlow( dd, pbGlobal[i] );
// p = Extra_UnateComputeSlow( dd, pbGlobal[i] );
p = Extra_UnateComputeSlow( dd, Abc_ObjGlobalBdd(pNode) );
if ( fVerbose )
Extra_UnateInfoPrint( p );
TotalSupps += p->nVars;
......@@ -104,7 +107,8 @@ clkBdd = clock() - clk;
Cudd_zddVarsFromBddVars( dd, 2 );
Abc_NtkForEachCo( pNtk, pNode, i )
{
p = Extra_UnateComputeFast( dd, pbGlobal[i] );
// p = Extra_UnateComputeFast( dd, pbGlobal[i] );
p = Extra_UnateComputeFast( dd, Abc_ObjGlobalBdd(pNode) );
if ( fVerbose )
Extra_UnateInfoPrint( p );
TotalSupps += p->nVars;
......@@ -122,10 +126,11 @@ clkUnate = clock() - clk - clkBdd;
PRT( "Total ", clock() - clk );
// deref the PO functions
Abc_NtkFreeGlobalBdds( pNtk );
// Abc_NtkFreeGlobalBdds( pNtk );
// stop the global BDD manager
Extra_StopManager( pNtk->pManGlob );
pNtk->pManGlob = NULL;
// Extra_StopManager( pNtk->pManGlob );
// pNtk->pManGlob = NULL;
Abc_NtkFreeGlobalBdds( pNtk, 1 );
}
/**Function*************************************************************
......
......@@ -58,7 +58,7 @@ int Abc_NtkExtractSequentialDcs( Abc_Ntk_t * pNtk, bool fVerbose )
}
// compute the global BDDs of the latches
dd = Abc_NtkGlobalBdds( pNtk, 10000000, 1, 1, fVerbose );
dd = Abc_NtkBuildGlobalBdds( pNtk, 10000000, 1, 1, fVerbose );
if ( dd == NULL )
return 0;
if ( fVerbose )
......@@ -92,7 +92,7 @@ int Abc_NtkExtractSequentialDcs( Abc_Ntk_t * pNtk, bool fVerbose )
pNtk->pExdc = Abc_NtkConstructExdc( dd, pNtk, bUnreach );
Cudd_RecursiveDeref( dd, bUnreach );
Extra_StopManager( dd );
pNtk->pManGlob = NULL;
// pNtk->pManGlob = NULL;
// make sure that everything is okay
if ( pNtk->pExdc && !Abc_NtkCheck( pNtk->pExdc ) )
......@@ -137,13 +137,15 @@ DdNode * Abc_NtkTransitionRelation( DdManager * dd, Abc_Ntk_t * pNtk, int fVerbo
Abc_NtkForEachLatch( pNtk, pNode, i )
{
bVar = Cudd_bddIthVar( dd, Abc_NtkCiNum(pNtk) + i );
bProd = Cudd_bddXnor( dd, bVar, pNtk->vFuncsGlob->pArray[i] ); Cudd_Ref( bProd );
// bProd = Cudd_bddXnor( dd, bVar, pNtk->vFuncsGlob->pArray[i] ); Cudd_Ref( bProd );
bProd = Cudd_bddXnor( dd, bVar, Abc_ObjGlobalBdd(Abc_ObjFanin0(pNode)) ); Cudd_Ref( bProd );
bRel = Cudd_bddAnd( dd, bTemp = bRel, bProd ); Cudd_Ref( bRel );
Cudd_RecursiveDeref( dd, bTemp );
Cudd_RecursiveDeref( dd, bProd );
}
// free the global BDDs
Abc_NtkFreeGlobalBdds( pNtk );
// Abc_NtkFreeGlobalBdds( pNtk );
Abc_NtkFreeGlobalBdds( pNtk, 0 );
// quantify the PI variables
bInputs = Extra_bddComputeRangeCube( dd, 0, Abc_NtkPiNum(pNtk) ); Cudd_Ref( bInputs );
......
......@@ -15,6 +15,7 @@ SRC += src/base/abci/abc.c \
src/base/abci/abcFraig.c \
src/base/abci/abcFxu.c \
src/base/abci/abcGen.c \
src/base/abci/abcIf.c \
src/base/abci/abcIvy.c \
src/base/abci/abcLut.c \
src/base/abci/abcMap.c \
......@@ -22,7 +23,6 @@ SRC += src/base/abci/abc.c \
src/base/abci/abcMiter.c \
src/base/abci/abcNtbdd.c \
src/base/abci/abcOrder.c \
src/base/abci/abcPga.c \
src/base/abci/abcPrint.c \
src/base/abci/abcProve.c \
src/base/abci/abcReconv.c \
......
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