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Commit 677c984e by Alan Mishchenko
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Expriments with functions.

parent 57d65f73
Showing with 50 additions and 29 deletions
src/base/abci/abc.c
...@@ -23012,11 +23012,11 @@ usage: ...@@ -23012,11 +23012,11 @@ usage:
***********************************************************************/ ***********************************************************************/
int Abc_CommandFunEnum( Abc_Frame_t * pAbc, int argc, char ** argv ) int Abc_CommandFunEnum( Abc_Frame_t * pAbc, int argc, char ** argv )
{ {
extern void Dtt_EnumerateLf( int nVars, int nNodeMax, int fVerbose ); extern void Dtt_EnumerateLf( int nVars, int nNodeMax, int fDelay, int fVerbose );
extern void Dau_FunctionEnum( int nInputs, int nVars, int nNodeMax, int fUseTwo, int fReduce, int fVerbose ); extern void Dau_FunctionEnum( int nInputs, int nVars, int nNodeMax, int fUseTwo, int fReduce, int fVerbose );
int c, nInputs = 4, nVars = 4, nNodeMax = 32, fUseTwo = 0, fReduce = 0, fSimple = 0, fVerbose = 0; int c, nInputs = 4, nVars = 4, nNodeMax = 32, fUseTwo = 0, fReduce = 0, fSimple = 0, fDelay = 0, fVerbose = 0;
Extra_UtilGetoptReset(); Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "SIMtrlvh" ) ) != EOF ) while ( ( c = Extra_UtilGetopt( argc, argv, "SIMtrldvh" ) ) != EOF )
{ {
switch ( c ) switch ( c )
{ {
...@@ -23062,6 +23062,9 @@ int Abc_CommandFunEnum( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -23062,6 +23062,9 @@ int Abc_CommandFunEnum( Abc_Frame_t * pAbc, int argc, char ** argv )
case 'l': case 'l':
fSimple ^= 1; fSimple ^= 1;
break; break;
case 'd':
fDelay ^= 1;
break;
case 'v': case 'v':
fVerbose ^= 1; fVerbose ^= 1;
break; break;
...@@ -23072,14 +23075,14 @@ int Abc_CommandFunEnum( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -23072,14 +23075,14 @@ int Abc_CommandFunEnum( Abc_Frame_t * pAbc, int argc, char ** argv )
goto usage; goto usage;
} }
} }
if ( fSimple ) if ( fSimple || fDelay )
{ {
if ( nVars < 4 || nVars > 5 ) if ( nVars < 3 || nVars > 5 )
{ {
Abc_Print( -1, "The number of inputs should be 4 <= I <= 5.\n" ); Abc_Print( -1, "The number of inputs should be 3 <= I <= 5.\n" );
goto usage; goto usage;
} }
Dtt_EnumerateLf( nVars, nNodeMax, fVerbose ); Dtt_EnumerateLf( nVars, nNodeMax, fDelay, fVerbose );
} }
else else
{ {
...@@ -23098,15 +23101,16 @@ int Abc_CommandFunEnum( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -23098,15 +23101,16 @@ int Abc_CommandFunEnum( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0; return 0;
usage: usage:
Abc_Print( -2, "usage: funenum [-SIM num] [-trlvh]\n" ); Abc_Print( -2, "usage: funenum [-SIM num] [-trldvh]\n" );
Abc_Print( -2, "\t enumerates minimum 2-input-gate implementations\n" ); Abc_Print( -2, "\t enumerates minimum 2-input-gate implementations\n" );
Abc_Print( -2, "\t-S num : the maximum intermediate support size [default = %d]\n", nInputs ); Abc_Print( -2, "\t-S num : the maximum intermediate support size [default = %d]\n", nInputs );
Abc_Print( -2, "\t-I num : the number of inputs of Boolean functions [default = %d]\n", nVars ); Abc_Print( -2, "\t-I num : the number of inputs of Boolean functions [default = %d]\n", nVars );
Abc_Print( -2, "\t-M num : the maximum number of 2-input gates [default = %d]\n", nNodeMax ); Abc_Print( -2, "\t-M num : the maximum number of 2-input gates [default = %d]\n", nNodeMax );
Abc_Print( -2, "\t-t : toggle adding combination of two gates [default = %s]\n", fUseTwo? "yes": "no" ); Abc_Print( -2, "\t-t : toggle adding combination of two gates [default = %s]\n", fUseTwo? "yes": "no" );
Abc_Print( -2, "\t-r : toggle reducing the last level [default = %s]\n", fReduce? "yes": "no" ); Abc_Print( -2, "\t-r : toggle reducing the last level [default = %s]\n", fReduce? "yes": "no" );
Abc_Print( -2, "\t-l : toggle generating L(f) rather than C(f) [default = %s]\n", fSimple? "yes": "no" ); Abc_Print( -2, "\t-l : toggle generating L(f) rather than C(f) [default = %s]\n", fSimple? "yes": "no" );
Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" ); Abc_Print( -2, "\t-d : toggle generating D(f) rather than C(f) [default = %s]\n", fDelay? "yes": "no" );
Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n"); Abc_Print( -2, "\t-h : print the command usage\n");
return 1; return 1;
} }
src/opt/dau/dauNpn2.c
...@@ -45,9 +45,11 @@ struct Dtt_Man_t_ ...@@ -45,9 +45,11 @@ struct Dtt_Man_t_
Vec_Wec_t * vFunNodes; // nodes by NPN class Vec_Wec_t * vFunNodes; // nodes by NPN class
Vec_Int_t * vTemp; // temporary Vec_Int_t * vTemp; // temporary
Vec_Int_t * vTemp2; // temporary Vec_Int_t * vTemp2; // temporary
unsigned FunMask; // function mask
unsigned BinMask; // hash mask unsigned BinMask; // hash mask
unsigned * pBins; // hash bins unsigned * pBins; // hash bins
Vec_Int_t * vUsedBins; // used bins Vec_Int_t * vUsedBins; // used bins
int Counts[32]; // node counts
}; };
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
...@@ -82,6 +84,7 @@ Dtt_Man_t * Dtt_ManAlloc( int nVars ) ...@@ -82,6 +84,7 @@ Dtt_Man_t * Dtt_ManAlloc( int nVars )
p->vFunNodes = Vec_WecStart( 16 ); p->vFunNodes = Vec_WecStart( 16 );
p->vTemp = Vec_IntAlloc( 4000 ); p->vTemp = Vec_IntAlloc( 4000 );
p->vTemp2 = Vec_IntAlloc( 4000 ); p->vTemp2 = Vec_IntAlloc( 4000 );
p->FunMask = nVars == 5 ? ~0 : (nVars == 4 ? 0xFFFF : 0xFF);
p->BinMask = 0x3FFF; p->BinMask = 0x3FFF;
p->pBins = ABC_FALLOC( unsigned, p->BinMask + 1 ); p->pBins = ABC_FALLOC( unsigned, p->BinMask + 1 );
p->vUsedBins = Vec_IntAlloc( 4000 ); p->vUsedBins = Vec_IntAlloc( 4000 );
...@@ -171,45 +174,56 @@ Vec_Int_t * Dtt_ManCollect( Dtt_Man_t * p, unsigned Truth, Vec_Int_t * vFuns ) ...@@ -171,45 +174,56 @@ Vec_Int_t * Dtt_ManCollect( Dtt_Man_t * p, unsigned Truth, Vec_Int_t * vFuns )
***********************************************************************/ ***********************************************************************/
static inline int Dtt_ManGetFun( Dtt_Man_t * p, unsigned tFun ) static inline int Dtt_ManGetFun( Dtt_Man_t * p, unsigned tFun )
{ {
unsigned ttFun = p->nVars == 4 ? 0xFFFF & tFun : tFun; return Abc_TtGetBit( p->pPres, (tFun & p->FunMask) >> 1 );
return Abc_TtGetBit( p->pPres, ttFun >> 1 );
} }
static inline void Dtt_ManSetFun( Dtt_Man_t * p, unsigned tFun ) static inline void Dtt_ManSetFun( Dtt_Man_t * p, unsigned tFun )
{ {
unsigned ttFun = p->nVars == 4 ? 0xFFFF & tFun : tFun; //assert( !Dtt_ManGetFun(p, (fFun & p->FunMask)) );
//assert( !Dtt_ManGetFun(p, ttFun) ); Abc_TtSetBit( p->pPres, (tFun & p->FunMask) >> 1 );
Abc_TtSetBit( p->pPres, ttFun >> 1 );
} }
void Dtt_ManAddFunction( Dtt_Man_t * p, int n, int FanI, int FanJ, int Type, unsigned Truth ) void Dtt_ManAddFunction( Dtt_Man_t * p, int n, int FanI, int FanJ, int Type, unsigned Truth )
{ {
Vec_Int_t * vFuncs = Dtt_ManCollect( p, Truth, p->vTemp2 ); Vec_Int_t * vFuncs = Dtt_ManCollect( p, Truth, p->vTemp2 );
unsigned Min = Vec_IntFindMin( vFuncs ); unsigned Min = Vec_IntFindMin( vFuncs );
int i, nObjs = Vec_IntSize(p->vFanins)/2; int i, nObjs = Vec_IntSize(p->vFanins)/2;
int nNodesI = 0xF & (Vec_IntEntry(p->vConfigs, FanI) >> 3);
int nNodesJ = 0xF & (Vec_IntEntry(p->vConfigs, FanJ) >> 3);
int nNodes = nNodesI + nNodesJ + 1;
assert( nObjs == Vec_IntSize(p->vTruths) ); assert( nObjs == Vec_IntSize(p->vTruths) );
assert( nObjs == Vec_IntSize(p->vConfigs) ); assert( nObjs == Vec_IntSize(p->vConfigs) );
assert( nObjs == Vec_IntSize(p->vClasses) ); assert( nObjs == Vec_IntSize(p->vClasses) );
Vec_WecPush( p->vFunNodes, n, nObjs ); Vec_WecPush( p->vFunNodes, n, nObjs );
Vec_IntPushTwo( p->vFanins, FanI, FanJ ); Vec_IntPushTwo( p->vFanins, FanI, FanJ );
Vec_IntPush( p->vTruths, Truth ); Vec_IntPush( p->vTruths, Truth );
Vec_IntPush( p->vConfigs, Type ); Vec_IntPush( p->vConfigs, (nNodes << 3) | Type );
Vec_IntPush( p->vClasses, Vec_IntSize(p->vTruthNpns) ); Vec_IntPush( p->vClasses, Vec_IntSize(p->vTruthNpns) );
Vec_IntPush( p->vTruthNpns, Min ); Vec_IntPush( p->vTruthNpns, Min );
Vec_IntForEachEntry( vFuncs, Min, i ) Vec_IntForEachEntry( vFuncs, Min, i )
Dtt_ManSetFun( p, Min ); Dtt_ManSetFun( p, Min );
assert( nNodes < 32 );
p->Counts[nNodes]++;
} }
int Dtt_PrintStats( int nNodes, int nVars, Vec_Wec_t * vFunNodes, word nSteps, abctime clk ) int Dtt_PrintStats( int nNodes, int nVars, Vec_Wec_t * vFunNodes, word nSteps, abctime clk, int fDelay )
{ {
int nNew = Vec_IntSize(Vec_WecEntry(vFunNodes, nNodes)); int nNew = Vec_IntSize(Vec_WecEntry(vFunNodes, nNodes));
printf("N =%2d | ", nNodes ); printf("%c =%2d | ", fDelay ? 'D':'N', nNodes );
printf("C =%12.0f | ", (double)(iword)nSteps ); printf("C =%12.0f | ", (double)(iword)nSteps );
printf("New%d =%10d ", nVars, nNew + (int)(nNodes==0) ); printf("New%d =%10d ", nVars, nNew + (int)(nNodes==0) );
printf("All%d =%10d | ", nVars, Vec_WecSizeSize(vFunNodes)+1 ); printf("All%d =%10d | ", nVars, Vec_WecSizeSize(vFunNodes)+1 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk ); Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
//Abc_Print(1, "%9.2f sec\n", 1.0*(Abc_Clock() - clk)/(CLOCKS_PER_SEC)); //Abc_Print(1, "%9.2f sec\n", 1.0*(Abc_Clock() - clk)/(CLOCKS_PER_SEC));
fflush(stdout); fflush(stdout);
return nNew; return nNew;
} }
void Dtt_EnumerateLf( int nVars, int nNodeMax, int fVerbose ) void Dtt_PrintDistrib( Dtt_Man_t * p )
{
int i;
printf( "NPN classes for each node count (N):\n" );
for ( i = 0; i < 32; i++ )
if ( p->Counts[i] )
printf( "N = %2d : NPN = %6d\n", i, p->Counts[i] );
}
void Dtt_EnumerateLf( int nVars, int nNodeMax, int fDelay, int fVerbose )
{ {
abctime clk = Abc_Clock(); word nSteps = 0; abctime clk = Abc_Clock(); word nSteps = 0;
Dtt_Man_t * p = Dtt_ManAlloc( nVars ); int n, i, j; Dtt_Man_t * p = Dtt_ManAlloc( nVars ); int n, i, j;
...@@ -224,16 +238,17 @@ void Dtt_EnumerateLf( int nVars, int nNodeMax, int fVerbose ) ...@@ -224,16 +238,17 @@ void Dtt_EnumerateLf( int nVars, int nNodeMax, int fVerbose )
Vec_WecPush( p->vFunNodes, 0, Vec_IntSize(p->vFanins)/2 ); Vec_WecPush( p->vFunNodes, 0, Vec_IntSize(p->vFanins)/2 );
Vec_IntPushTwo( p->vFanins, 0, 0 ); Vec_IntPushTwo( p->vFanins, 0, 0 );
Vec_IntPush( p->vTruths, (unsigned)s_Truths6[0] ); Vec_IntPush( p->vTruths, (unsigned)s_Truths6[0] );
Vec_IntPush( p->vConfigs, -1 ); Vec_IntPush( p->vConfigs, 0 );
Vec_IntPush( p->vClasses, Vec_IntSize(p->vTruthNpns) ); Vec_IntPush( p->vClasses, Vec_IntSize(p->vTruthNpns) );
Vec_IntPush( p->vTruthNpns, (unsigned)s_Truths6[0] ); Vec_IntPush( p->vTruthNpns, (unsigned)s_Truths6[0] );
for ( i = 0; i < nVars; i++ ) for ( i = 0; i < nVars; i++ )
Dtt_ManSetFun( p, (unsigned)s_Truths6[i] ); Dtt_ManSetFun( p, (unsigned)s_Truths6[i] );
p->Counts[0] = 2;
// enumerate // enumerate
Dtt_PrintStats(0, nVars, p->vFunNodes, nSteps, clk); Dtt_PrintStats(0, nVars, p->vFunNodes, nSteps, clk, fDelay);
for ( n = 1; n < nNodeMax; n++ ) for ( n = 1; n <= nNodeMax; n++ )
{ {
for ( i = 0, j = n - 1; i < n; i++, j-- ) if ( i <= j ) for ( i = 0, j = n - 1; i < n; i++, j = j - 1 + fDelay ) if ( i <= j )
{ {
Vec_Int_t * vFaninI = Vec_WecEntry( p->vFunNodes, i ); Vec_Int_t * vFaninI = Vec_WecEntry( p->vFunNodes, i );
Vec_Int_t * vFaninJ = Vec_WecEntry( p->vFunNodes, j ); Vec_Int_t * vFaninJ = Vec_WecEntry( p->vFunNodes, j );
...@@ -263,9 +278,11 @@ void Dtt_EnumerateLf( int nVars, int nNodeMax, int fVerbose ) ...@@ -263,9 +278,11 @@ void Dtt_EnumerateLf( int nVars, int nNodeMax, int fVerbose )
} }
} }
} }
if ( Dtt_PrintStats(n, nVars, p->vFunNodes, nSteps, clk) == 0 ) if ( Dtt_PrintStats(n, nVars, p->vFunNodes, nSteps, clk, fDelay) == 0 )
break; break;
} }
if ( fDelay )
Dtt_PrintDistrib( p );
Dtt_ManFree( p ); Dtt_ManFree( p );
} }
......
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