Commit 624af674 by Alan Mishchenko

New code since Dec 2010.

parent ab80b015
/**CFile****************************************************************
FileName [saigTempor.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Sequential AIG package.]
Synopsis [Temporal decomposition.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: saigTempor.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "saig.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Creates initialized timeframes for temporal decomposition.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManTemporFrames( Aig_Man_t * pAig, int nFrames )
{
Aig_Man_t * pFrames;
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f;
// start the frames package
Aig_ManCleanData( pAig );
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
pFrames->pName = Aig_UtilStrsav( pAig->pName );
// initiliaze the flops
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_ManConst0(pFrames);
// for each timeframe
for ( f = 0; f < nFrames; f++ )
{
Aig_ManConst1(pAig)->pData = Aig_ManConst1(pFrames);
Saig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi(pFrames);
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
Aig_ManForEachPo( pAig, pObj, i )
pObj->pData = Aig_ObjChild0Copy(pObj);
Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
pObjLo->pData = pObjLi->pData;
}
// create POs for the flop inputs
Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjCreatePo( pFrames, pObj->pData );
Aig_ManCleanup( pFrames );
return pFrames;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManTemporDecompose( Aig_Man_t * pAig, int nFrames )
{
Aig_Man_t * pAigNew, * pFrames;
Aig_Obj_t * pObj, * pReset;
int i;
if ( pAig->nConstrs > 0 )
{
printf( "The AIG manager should have no constraints.\n" );
return NULL;
}
// create initialized timeframes
pFrames = Saig_ManTemporFrames( pAig, nFrames );
assert( Aig_ManPoNum(pFrames) == Aig_ManRegNum(pAig) );
// start the new manager
Aig_ManCleanData( pAig );
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
pAigNew->pName = Aig_UtilStrsav( pAig->pName );
// map the constant node and primary inputs
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
Saig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi( pAigNew );
// insert initialization logic
Aig_ManConst1(pFrames)->pData = Aig_ManConst1( pAigNew );
Aig_ManForEachPi( pFrames, pObj, i )
pObj->pData = Aig_ObjCreatePi( pAigNew );
Aig_ManForEachNode( pFrames, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
Aig_ManForEachPo( pFrames, pObj, i )
pObj->pData = Aig_ObjChild0Copy(pObj);
// create reset latch (the first one among the latches)
pReset = Aig_ObjCreatePi( pAigNew );
// create flop output values
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_Mux( pAigNew, pReset, Aig_ObjCreatePi(pAigNew), Aig_ManPo(pFrames, i)->pData );
Aig_ManStop( pFrames );
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pAigNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create primary outputs
Saig_ManForEachPo( pAig, pObj, i )
Aig_ObjCreatePo( pAigNew, Aig_ObjChild0Copy(pObj) );
// create reset latch (the first one among the latches)
Aig_ObjCreatePo( pAigNew, Aig_ManConst1(pAigNew) );
// create latch inputs
Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjCreatePo( pAigNew, Aig_ObjChild0Copy(pObj) );
// finalize
Aig_ManCleanup( pAigNew );
Aig_ManSetRegNum( pAigNew, Aig_ManRegNum(pAig)+1 ); // + reset latch (011111...)
return pAigNew;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManTempor( Aig_Man_t * pAig, int nFrames, int TimeOut, int nConfLimit, int fUseBmc, int fVerbose, int fVeryVerbose )
{
extern int Saig_ManPhasePrefixLength( Aig_Man_t * p, int fVerbose, int fVeryVerbose );
int RetValue, nFramesFinished = -1;
assert( nFrames >= 0 );
if ( nFrames == 0 )
{
nFrames = Saig_ManPhasePrefixLength( pAig, fVerbose, fVeryVerbose );
if ( nFrames == 1 )
{
printf( "The leading sequence has length 1. Temporal decomposition is not performed.\n" );
return NULL;
}
Abc_Print( 1, "Using computed frame number (%d).\n", nFrames );
}
else
Abc_Print( 1, "Using user-given frame number (%d).\n", nFrames );
// run BMC2
if ( fUseBmc )
{
RetValue = Saig_BmcPerform( pAig, 0, nFrames, 5000, TimeOut, nConfLimit, 0, fVerbose, 0, &nFramesFinished );
if ( RetValue == 0 )
{
printf( "A cex found in the first %d frames.\n", nFrames );
return NULL;
}
if ( nFramesFinished < nFrames )
{
printf( "BMC for %d frames could not be completed. A cex may exist!\n", nFrames );
return NULL;
}
}
return Saig_ManTemporDecompose( pAig, nFrames );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
SRC += src/sat/pdr/pdr.c \
src/sat/pdr/pdrCnf.c \
src/sat/pdr/pdrCore.c \
src/sat/pdr/pdrInv.c \
src/sat/pdr/pdrMan.c \
src/sat/pdr/pdrSat.c \
src/sat/pdr/pdrTsim.c \
src/sat/pdr/pdrUtil.c
/**CFile****************************************************************
FileName [pdr.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Netlist representation.]
Synopsis []
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 20, 2010.]
Revision [$Id: pdr.c,v 1.00 2010/11/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "pdrInt.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
/**CFile****************************************************************
FileName [pdr.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Netlist representation.]
Synopsis [External declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 20, 2010.]
Revision [$Id: pdr.h,v 1.00 2010/11/20 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef __PDR_H__
#define __PDR_H__
ABC_NAMESPACE_HEADER_START
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
typedef struct Pdr_Par_t_ Pdr_Par_t;
struct Pdr_Par_t_
{
int iOutput; // zero-based number of primary output to solve
int nRecycle; // limit on vars for recycling
int nFrameMax; // limit on frame count
int nConfLimit; // limit on SAT solver conflicts
int nTimeOut; // timeout in seconds
int fTwoRounds; // use two rounds for generalization
int fMonoCnf; // monolythic CNF
int fDumpInv; // dump inductive invariant
int fShortest; // forces bug traces to be shortest
int fVerbose; // verbose output
int fVeryVerbose; // very verbose output
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== pdrCore.c ==========================================================*/
extern void Pdr_ManSetDefaultParams( Pdr_Par_t * pPars );
extern int Pdr_ManSolve( Aig_Man_t * p, Pdr_Par_t * pPars, Abc_Cex_t ** ppCex );
ABC_NAMESPACE_HEADER_END
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
/**CFile****************************************************************
FileName [pdrClass.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Netlist representation.]
Synopsis [Equivalence classes of register outputs.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 20, 2010.]
Revision [$Id: pdrClass.c,v 1.00 2010/11/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "pdrInt.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Performs duplication with the variable map.]
Description [Var map contains -1 if const0 and <reg_num> otherwise.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Pdr_ManRehashWithMap( Aig_Man_t * pAig, Vec_Int_t * vMap )
{
Aig_Man_t * pFrames;
Aig_Obj_t * pObj;
int i, iReg;
assert( Vec_IntSize(vMap) == Aig_ManRegNum(pAig) );
// start the fraig package
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) );
pFrames->pName = Aig_UtilStrsav( pAig->pName );
pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
// create CI mapping
Aig_ManCleanData( pAig );
Aig_ManConst1(pAig)->pData = Aig_ManConst1(pFrames);
Aig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi(pFrames);
Saig_ManForEachLo( pAig, pObj, i )
{
iReg = Vec_IntEntry(vMap, i);
if ( iReg == -1 )
pObj->pData = Aig_ManConst0(pFrames);
else
pObj->pData = Saig_ManLo(pAig, iReg)->pData;
}
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// add output nodes
Aig_ManForEachPo( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePo( pFrames, Aig_ObjChild0Copy(pObj) );
// finish off
Aig_ManCleanup( pFrames );
Aig_ManSetRegNum( pFrames, Aig_ManRegNum(pAig) );
return pFrames;
}
/**Function*************************************************************
Synopsis [Creates mapping of registers.]
Description [Var map contains -1 if const0 and <reg_num> otherwise.]
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Pdr_ManCreateMap( Aig_Man_t * p )
{
Aig_Obj_t * pObj;
Vec_Int_t * vMap;
int * pLit2Id, Lit, i;
pLit2Id = ABC_ALLOC( int, Aig_ManObjNumMax(p) * 2 );
for ( i = 0; i < Aig_ManObjNumMax(p) * 2; i++ )
pLit2Id[i] = -1;
vMap = Vec_IntAlloc( Aig_ManRegNum(p) );
Saig_ManForEachLi( p, pObj, i )
{
if ( Aig_ObjChild0(pObj) == Aig_ManConst0(p) )
{
Vec_IntPush( vMap, -1 );
continue;
}
Lit = 2 * Aig_ObjFaninId0(pObj) + Aig_ObjFaninC0(pObj);
if ( pLit2Id[Lit] < 0 ) // the first time
pLit2Id[Lit] = i;
Vec_IntPush( vMap, pLit2Id[Lit] );
}
ABC_FREE( pLit2Id );
return vMap;
}
/**Function*************************************************************
Synopsis [Counts reduced registers.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Pdr_ManCountMap( Vec_Int_t * vMap )
{
int i, Entry, Counter = 0;
Vec_IntForEachEntry( vMap, Entry, i )
if ( Entry != i )
Counter++;
return Counter;
}
/**Function*************************************************************
Synopsis [Counts reduced registers.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Pdr_ManPrintMap( Vec_Int_t * vMap )
{
Vec_Int_t * vMarks;
int f, i, iClass, Entry, Counter = 0;
printf( " Consts: " );
Vec_IntForEachEntry( vMap, Entry, i )
if ( Entry == -1 )
printf( "%d ", i );
printf( "\n" );
vMarks = Vec_IntAlloc( 100 );
Vec_IntForEachEntry( vMap, iClass, f )
{
if ( iClass == -1 )
continue;
if ( iClass == f )
continue;
// check previous classes
if ( Vec_IntFind( vMarks, iClass ) >= 0 )
continue;
Vec_IntPush( vMarks, iClass );
// print class
printf( " Class %d : ", iClass );
Vec_IntForEachEntry( vMap, Entry, i )
if ( Entry == iClass )
printf( "%d ", i );
printf( "\n" );
}
Vec_IntFree( vMarks );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Pdr_ManEquivClasses( Aig_Man_t * pAig )
{
Vec_Int_t * vMap;
Aig_Man_t * pTemp;
int f, nFrames = 100;
assert( Saig_ManRegNum(pAig) > 0 );
// start the map
vMap = Vec_IntAlloc( 0 );
Vec_IntFill( vMap, Aig_ManRegNum(pAig), -1 );
// iterate and print changes
for ( f = 0; f < nFrames; f++ )
{
// implement variable map
pTemp = Pdr_ManRehashWithMap( pAig, vMap );
// report the result
printf( "F =%4d : Total = %6d. Nodes = %6d. RedRegs = %6d. Prop = %s\n",
f+1, Aig_ManNodeNum(pAig), Aig_ManNodeNum(pTemp), Pdr_ManCountMap(vMap),
Aig_ObjChild0(Aig_ManPo(pTemp,0)) == Aig_ManConst0(pTemp) ? "proof" : "unknown" );
// recreate the map
Pdr_ManPrintMap( vMap );
Vec_IntFree( vMap );
vMap = Pdr_ManCreateMap( pTemp );
Aig_ManStop( pTemp );
if ( Pdr_ManCountMap(vMap) == 0 )
break;
}
Vec_IntFree( vMap );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
/**CFile****************************************************************
FileName [pdrInt.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Netlist representation.]
Synopsis [Internal declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 20, 2010.]
Revision [$Id: pdrInt.h,v 1.00 2010/11/20 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef __PDR_INT_H__
#define __PDR_INT_H__
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
#include "saig.h"
#include "cnf.h"
#include "satSolver.h"
#include "pdr.h"
ABC_NAMESPACE_HEADER_START
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
typedef struct Pdr_Set_t_ Pdr_Set_t;
struct Pdr_Set_t_
{
word Sign; // signature
int nRefs; // ref counter
short nTotal; // total literals
short nLits; // num flop literals
int Lits[0];
};
typedef struct Pdr_Obl_t_ Pdr_Obl_t;
struct Pdr_Obl_t_
{
int iFrame; // time frame
int prio; // priority
int nRefs; // reference counter
Pdr_Set_t * pState; // state cube
Pdr_Obl_t * pNext; // next one
Pdr_Obl_t * pLink; // queue link
};
typedef struct Pdr_Man_t_ Pdr_Man_t;
struct Pdr_Man_t_
{
// input problem
Pdr_Par_t * pPars; // parameters
Aig_Man_t * pAig; // user's AIG
// static CNF representation
Cnf_Dat_t * pCnf1; // CNF for this AIG
Vec_Int_t * vVar2Reg; // mapping of SAT var into registers
// dynamic CNF representation
Cnf_Dat_t * pCnf2; // CNF for this AIG
Vec_Int_t** pvId2Vars; // for each used ObjId, maps frame into SAT var
Vec_Ptr_t * vVar2Ids; // for each used frame, maps SAT var into ObjId
// data representation
Vec_Ptr_t * vSolvers; // SAT solvers
Vec_Vec_t * vClauses; // clauses by timeframe
Pdr_Obl_t * pQueue; // proof obligations
int * pOrder; // ordering of the lits
Vec_Int_t * vActVars; // the counter of activation variables
// internal use
Vec_Int_t * vPrio; // priority flops
Vec_Int_t * vLits; // array of literals
Vec_Int_t * vCiObjs; // cone leaves
Vec_Int_t * vCoObjs; // cone roots
Vec_Int_t * vCiVals; // cone leaf values
Vec_Int_t * vCoVals; // cone root values
Vec_Int_t * vNodes; // cone nodes
Vec_Int_t * vUndo; // cone undos
Vec_Int_t * vVisits; // intermediate
Vec_Int_t * vCi2Rem; // CIs to be removed
Vec_Int_t * vRes; // final result
// statistics
int nBlocks; // the number of times blockState was called
int nObligs; // the number of proof obligations derived
int nCubes; // the number of cubes derived
int nCalls; // the number of SAT calls
int nCallsS; // the number of SAT calls (sat)
int nCallsU; // the number of SAT calls (unsat)
int nStarts; // the number of SAT solver restarts
int nFrames; // frames explored
// runtime
int timeStart;
int timeToStop;
// time stats
int tSat;
int tSatSat;
int tSatUnsat;
int tGeneral;
int tPush;
int tTsim;
int tContain;
int tCnf;
int tTotal;
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
static inline sat_solver * Pdr_ManSolver( Pdr_Man_t * p, int k ) { return (sat_solver *)Vec_PtrEntry(p->vSolvers, k); }
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== pdrCex.c ==========================================================*/
extern Abc_Cex_t * Pdr_ManDeriveCex( Pdr_Man_t * p );
/*=== pdrCnf.c ==========================================================*/
extern int Pdr_ObjSatVar( Pdr_Man_t * p, int k, Aig_Obj_t * pObj );
extern int Pdr_ObjRegNum( Pdr_Man_t * p, int k, int iSatVar );
extern int Pdr_ManFreeVar( Pdr_Man_t * p, int k );
extern sat_solver * Pdr_ManNewSolver( Pdr_Man_t * p, int k, int fInit );
/*=== pdrInv.c ==========================================================*/
extern void Pdr_ManPrintProgress( Pdr_Man_t * p, int fClose, int Time );
extern void Pdr_ManPrintClauses( Pdr_Man_t * p, int kStart );
extern void Pdr_ManDumpClauses( Pdr_Man_t * p, char * pFileName );
extern void Pdr_ManReportInvariant( Pdr_Man_t * p );
extern void Pdr_ManVerifyInvariant( Pdr_Man_t * p );
/*=== pdrMan.c ==========================================================*/
extern Pdr_Man_t * Pdr_ManStart( Aig_Man_t * pAig, Pdr_Par_t * pPars, Vec_Int_t * vPrioInit );
extern void Pdr_ManStop( Pdr_Man_t * p );
extern Abc_Cex_t * Pdr_ManDeriveCex( Pdr_Man_t * p );
/*=== pdrSat.c ==========================================================*/
extern sat_solver * Pdr_ManCreateSolver( Pdr_Man_t * p, int k );
extern sat_solver * Pdr_ManFetchSolver( Pdr_Man_t * p, int k );
extern void Pdr_ManSetPropertyOutput( Pdr_Man_t * p, int k );
extern Vec_Int_t * Pdr_ManCubeToLits( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, int fCompl, int fNext );
extern Vec_Int_t * Pdr_ManLitsToCube( Pdr_Man_t * p, int k, int * pArray, int nArray );
extern void Pdr_ManSolverAddClause( Pdr_Man_t * p, int k, Pdr_Set_t * pCube );
extern void Pdr_ManCollectValues( Pdr_Man_t * p, int k, Vec_Int_t * vObjIds, Vec_Int_t * vValues );
extern int Pdr_ManCheckCubeCs( Pdr_Man_t * p, int k, Pdr_Set_t * pCube );
extern int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPred, int nConfLimit );
/*=== pdrTsim.c ==========================================================*/
extern Pdr_Set_t * Pdr_ManTernarySim( Pdr_Man_t * p, int k, Pdr_Set_t * pCube );
/*=== pdrUtil.c ==========================================================*/
extern Pdr_Set_t * Pdr_SetCreate( Vec_Int_t * vLits, Vec_Int_t * vPiLits );
extern Pdr_Set_t * Pdr_SetCreateFrom( Pdr_Set_t * pSet, int iRemove );
extern Pdr_Set_t * Pdr_SetCreateSubset( Pdr_Set_t * pSet, int * pLits, int nLits );
extern Pdr_Set_t * Pdr_SetDup( Pdr_Set_t * pSet );
extern Pdr_Set_t * Pdr_SetRef( Pdr_Set_t * p );
extern void Pdr_SetDeref( Pdr_Set_t * p );
extern int Pdr_SetContains( Pdr_Set_t * pOld, Pdr_Set_t * pNew );
extern int Pdr_SetIsInit( Pdr_Set_t * p, int iRemove );
extern void Pdr_SetPrint( FILE * pFile, Pdr_Set_t * p, int nRegs, Vec_Int_t * vFlopCounts );
extern int Pdr_SetCompare( Pdr_Set_t ** pp1, Pdr_Set_t ** pp2 );
extern Pdr_Obl_t * Pdr_OblStart( int k, int prio, Pdr_Set_t * pState, Pdr_Obl_t * pNext );
extern Pdr_Obl_t * Pdr_OblRef( Pdr_Obl_t * p );
extern void Pdr_OblDeref( Pdr_Obl_t * p );
extern int Pdr_QueueIsEmpty( Pdr_Man_t * p );
extern Pdr_Obl_t * Pdr_QueueHead( Pdr_Man_t * p );
extern Pdr_Obl_t * Pdr_QueuePop( Pdr_Man_t * p );
extern void Pdr_QueuePush( Pdr_Man_t * p, Pdr_Obl_t * pObl );
extern void Pdr_QueuePrint( Pdr_Man_t * p );
extern void Pdr_QueueStop( Pdr_Man_t * p );
ABC_NAMESPACE_HEADER_END
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
/**CFile****************************************************************
FileName [pdr.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Netlist representation.]
Synopsis [Manager procedures.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 20, 2010.]
Revision [$Id: pdr.c,v 1.00 2010/11/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "pdrInt.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Creates manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Pdr_Man_t * Pdr_ManStart( Aig_Man_t * pAig, Pdr_Par_t * pPars, Vec_Int_t * vPrioInit )
{
Pdr_Man_t * p;
p = ABC_CALLOC( Pdr_Man_t, 1 );
p->pPars = pPars;
p->pAig = pAig;
p->vSolvers = Vec_PtrAlloc( 0 );
p->vClauses = Vec_VecAlloc( 0 );
p->pQueue = NULL;
p->pOrder = ABC_ALLOC( int, Aig_ManRegNum(pAig) );
p->vActVars = Vec_IntAlloc( 256 );
// internal use
p->vPrio = vPrioInit ? vPrioInit : Vec_IntStart( Aig_ManRegNum(pAig) ); // priority flops
p->vLits = Vec_IntAlloc( 100 ); // array of literals
p->vCiObjs = Vec_IntAlloc( 100 ); // cone leaves
p->vCoObjs = Vec_IntAlloc( 100 ); // cone roots
p->vCiVals = Vec_IntAlloc( 100 ); // cone leaf values
p->vCoVals = Vec_IntAlloc( 100 ); // cone root values
p->vNodes = Vec_IntAlloc( 100 ); // cone nodes
p->vUndo = Vec_IntAlloc( 100 ); // cone undos
p->vVisits = Vec_IntAlloc( 100 ); // intermediate
p->vCi2Rem = Vec_IntAlloc( 100 ); // CIs to be removed
p->vRes = Vec_IntAlloc( 100 ); // final result
// additional AIG data-members
if ( pAig->pFanData == NULL )
Aig_ManFanoutStart( pAig );
if ( pAig->pTerSimData == NULL )
pAig->pTerSimData = ABC_CALLOC( unsigned, 1 + (Aig_ManObjNumMax(pAig) / 16) );
p->timeStart = clock();
return p;
}
/**Function*************************************************************
Synopsis [Frees manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Pdr_ManStop( Pdr_Man_t * p )
{
Pdr_Set_t * pCla;
sat_solver * pSat;
int i, k;
if ( p->pPars->fVerbose )
{
printf( "Block =%5d Oblig =%6d Clause =%6d Call =%6d (sat=%.1f%%) Start =%4d\n",
p->nBlocks, p->nObligs, p->nCubes, p->nCalls, 100.0 * p->nCallsS / p->nCalls, p->nStarts );
ABC_PRTP( "SAT solving", p->tSat, p->tTotal );
ABC_PRTP( " unsat ", p->tSatUnsat, p->tTotal );
ABC_PRTP( " sat ", p->tSatSat, p->tTotal );
ABC_PRTP( "Generalize ", p->tGeneral, p->tTotal );
ABC_PRTP( "Push clause", p->tPush, p->tTotal );
ABC_PRTP( "Ternary sim", p->tTsim, p->tTotal );
ABC_PRTP( "Containment", p->tContain, p->tTotal );
ABC_PRTP( "CNF compute", p->tCnf, p->tTotal );
ABC_PRTP( "TOTAL ", p->tTotal, p->tTotal );
}
Vec_PtrForEachEntry( sat_solver *, p->vSolvers, pSat, i )
sat_solver_delete( pSat );
Vec_PtrFree( p->vSolvers );
Vec_VecForEachEntry( Pdr_Set_t *, p->vClauses, pCla, i, k )
Pdr_SetDeref( pCla );
Vec_VecFree( p->vClauses );
Pdr_QueueStop( p );
ABC_FREE( p->pOrder );
Vec_IntFree( p->vActVars );
// static CNF
Cnf_DataFree( p->pCnf1 );
Vec_IntFreeP( &p->vVar2Reg );
// dynamic CNF
Cnf_DataFree( p->pCnf2 );
if ( p->pvId2Vars )
for ( i = 0; i < Aig_ManObjNumMax(p->pAig); i++ )
Vec_IntFreeP( &p->pvId2Vars[i] );
ABC_FREE( p->pvId2Vars );
Vec_VecFreeP( (Vec_Vec_t **)&p->vVar2Ids );
// internal use
Vec_IntFreeP( &p->vPrio ); // priority flops
Vec_IntFree( p->vLits ); // array of literals
Vec_IntFree( p->vCiObjs ); // cone leaves
Vec_IntFree( p->vCoObjs ); // cone roots
Vec_IntFree( p->vCiVals ); // cone leaf values
Vec_IntFree( p->vCoVals ); // cone root values
Vec_IntFree( p->vNodes ); // cone nodes
Vec_IntFree( p->vUndo ); // cone undos
Vec_IntFree( p->vVisits ); // intermediate
Vec_IntFree( p->vCi2Rem ); // CIs to be removed
Vec_IntFree( p->vRes ); // final result
// additional AIG data-members
if ( p->pAig->pFanData != NULL )
Aig_ManFanoutStop( p->pAig );
if ( p->pAig->pTerSimData != NULL )
ABC_FREE( p->pAig->pTerSimData );
ABC_FREE( p );
}
/**Function*************************************************************
Synopsis [Derives counter-example.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Cex_t * Pdr_ManDeriveCex( Pdr_Man_t * p )
{
extern Abc_Cex_t * Gia_ManAllocCounterExample( int nRegs, int nRealPis, int nFrames );
Abc_Cex_t * pCex;
Pdr_Obl_t * pObl;
int i, f, Lit, nFrames = 0;
// count the number of frames
for ( pObl = p->pQueue; pObl; pObl = pObl->pNext )
nFrames++;
// create the counter-example
pCex = Gia_ManAllocCounterExample( Aig_ManRegNum(p->pAig), Saig_ManPiNum(p->pAig), nFrames );
pCex->iPo = (p->pPars->iOutput==-1)? 0 : p->pPars->iOutput;
pCex->iFrame = nFrames-1;
for ( pObl = p->pQueue, f = 0; pObl; pObl = pObl->pNext, f++ )
for ( i = pObl->pState->nLits; i < pObl->pState->nTotal; i++ )
{
Lit = pObl->pState->Lits[i];
if ( lit_sign(Lit) )
continue;
assert( lit_var(Lit) < pCex->nPis );
Aig_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + lit_var(Lit) );
}
assert( f == nFrames );
return pCex;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
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