Extending GIA to represent pintypes and pins.

src/aig/gia/gia.h

@@ -114,6 +114,8 @@ struct Gia_Man_t_
     int            nConstrs;      // the number of constraints
     int            nTravIds;      // the current traversal ID
     int            nFront;        // frontier size 
+    int            nPinTypes;     // the number of pintypes 
+    int            nPins;         // the number of pins  
     int *          pReprsOld;     // representatives (for CIs and ANDs)
     Gia_Rpr_t *    pReprs;        // representatives (for CIs and ANDs)
     int *          pNexts;        // next nodes in the equivalence classes
@@ -300,6 +302,8 @@ static inline int          Gia_ObjIsAndOrConst0( Gia_Obj_t * pObj )            {
 static inline int          Gia_ObjIsCi( Gia_Obj_t * pObj )                     { return pObj->fTerm && pObj->iDiff0 == GIA_NONE; } 
 static inline int          Gia_ObjIsCo( Gia_Obj_t * pObj )                     { return pObj->fTerm && pObj->iDiff0 != GIA_NONE; } 
 static inline int          Gia_ObjIsAnd( Gia_Obj_t * pObj )                    { return!pObj->fTerm && pObj->iDiff0 != GIA_NONE; } 
+static inline int          Gia_ObjIsPinType( Gia_Obj_t * pObj )                { return Gia_ObjIsAnd(pObj) && pObj->iDiff0 == pObj->iDiff1;   }
+static inline int          Gia_ObjIsPin( Gia_Obj_t * pObj )                    { return Gia_ObjIsAnd(pObj) && (Gia_ObjIsPinType(pObj - pObj->iDiff0) || Gia_ObjIsPinType(pObj - pObj->iDiff1));   } 
 static inline int          Gia_ObjIsCand( Gia_Obj_t * pObj )                   { return Gia_ObjIsAnd(pObj) || Gia_ObjIsCi(pObj); } 
 static inline int          Gia_ObjIsConst0( Gia_Obj_t * pObj )                 { return pObj->iDiff0 == GIA_NONE && pObj->iDiff1 == GIA_NONE; } 
 static inline int          Gia_ManObjIsConst0( Gia_Man_t * p, Gia_Obj_t * pObj){ return pObj == p->pObjs;                        } 
@@ -453,6 +457,22 @@ static inline int Gia_ManAppendAnd( Gia_Man_t * p, int iLit0, int iLit1 )
     }
     return Gia_ObjId( p, pObj ) << 1;
 }
+static inline int Gia_ManAppendPinType( Gia_Man_t * p, int iLit )  
+{ 
+    Gia_Obj_t * pObj = Gia_ManAppendObj( p );
+    assert( iLit >= 0 && Abc_Lit2Var(iLit) < Gia_ManObjNum(p) );
+    pObj->iDiff0  = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit);
+    pObj->fCompl0 = Abc_LitIsCompl(iLit);
+    pObj->iDiff1  = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit);
+    pObj->fCompl1 = Abc_LitIsCompl(iLit);
+    if ( p->pFanData )
+    {
+        Gia_ObjAddFanout( p, Gia_ObjFanin0(pObj), pObj );
+        Gia_ObjAddFanout( p, Gia_ObjFanin1(pObj), pObj );
+    }
+    p->nPinTypes++;
+    return Gia_ObjId( p, pObj ) << 1;
+}
 static inline int Gia_ManAppendCo( Gia_Man_t * p, int iLit0 )  
 { 
     Gia_Obj_t * pObj;

src/aig/gia/giaAiger.c

@@ -761,7 +761,12 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fSkipS
         iNode1 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
         assert( Vec_IntSize(vNodes) == i + 1 + nInputs + nLatches );
         if ( fSkipStrash )
-            Vec_IntPush( vNodes, Gia_ManAppendAnd(pNew, iNode0, iNode1) );
+        {
+            if ( iNode0 == 1 && iNode1 == 1 )
+                Vec_IntPush( vNodes, Gia_ManAppendPinType(pNew, 1) );
+            else
+                Vec_IntPush( vNodes, Gia_ManAppendAnd(pNew, iNode0, iNode1) );
+        }
         else
             Vec_IntPush( vNodes, Gia_ManHashAnd(pNew, iNode0, iNode1) );
     }
@@ -1448,7 +1453,7 @@ void Gia_WriteAiger( Gia_Man_t * pInit, char * pFileName, int fWriteSymbols, int
         uLit  = Abc_Var2Lit( i, 0 );
         uLit0 = Gia_ObjFaninLit0( pObj, i );
         uLit1 = Gia_ObjFaninLit1( pObj, i );
-        assert( uLit0 < uLit1 );
+        assert( p->nPinTypes || uLit0 < uLit1 );
         Pos = Gia_WriteAigerEncode( pBuffer, Pos, uLit  - uLit1 );
         Pos = Gia_WriteAigerEncode( pBuffer, Pos, uLit1 - uLit0 );
         if ( Pos > nBufferSize - 10 )

src/aig/gia/giaDup.c

@@ -540,7 +540,9 @@ Gia_Man_t * Gia_ManDupMarked( Gia_Man_t * p )
         if ( pObj->fMark0 )
             continue;
         pObj->fMark0 = 0;
-        if ( Gia_ObjIsAnd(pObj) )
+        if ( p->nPinTypes && Gia_ObjIsPinType(pObj) )
+            pObj->Value = Gia_ManAppendPinType( pNew, Gia_ObjFanin0Copy(pObj) );
+        else if ( Gia_ObjIsAnd(pObj) )
             pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
         else if ( Gia_ObjIsCi(pObj) )
         {

src/aig/gia/giaHash.c

@@ -193,7 +193,7 @@ void Gia_ManHashResize( Gia_Man_t * p )
         Counter++;
     }
     Counter2 = Gia_ManAndNum(p);
-    assert( Counter == Counter2 );
+    assert( p->nPinTypes || Counter == Counter2 );
     ABC_FREE( pHTableOld );
 //    if ( p->fVerbose )
 //        printf( "Resizing GIA hash table: %d -> %d.\n", nHTableOld, p->nHTable );

src/aig/gia/giaMan.c

@@ -303,6 +303,7 @@ void Gia_ManPrintStats( Gia_Man_t * p, int fTents, int fSwitch )
         printf( "  ff =%7d", Gia_ManRegNum(p) );
     printf( "  and =%8d", Gia_ManAndNum(p) );
     printf( "  lev =%5d", Gia_ManLevelNum(p) ); Vec_IntFreeP( &p->vLevels );
+    if ( p->nPinTypes == 0 )
     printf( "  cut = %d(%d)", Gia_ManCrossCut(p, 0), Gia_ManCrossCut(p, 1) );
 //    printf( "  mem =%5.2f MB", 1.0*(sizeof(Gia_Obj_t)*p->nObjs + sizeof(int)*(Vec_IntSize(p->vCis) + Vec_IntSize(p->vCos)))/(1<<20) );
     printf( "  mem =%5.2f MB", 1.0*(sizeof(Gia_Obj_t)*p->nObjsAlloc + sizeof(int)*(Vec_IntCap(p->vCis) + Vec_IntCap(p->vCos)))/(1<<20) );

src/base/abci/abc.c

@@ -9407,7 +9407,14 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
     if ( pNtk )
     {
         extern void Abc_NtkTestTim( Abc_Ntk_t * pNtk, int fVerbose );
-        Abc_NtkTestTim( pNtk, fVerbose );
+        extern void Abc_NtkTestPinGia( Abc_Ntk_t * pNtk, int fWhiteBoxOnly, int fVerbose );
+//        Abc_NtkTestTim( pNtk, fVerbose );
+        if ( !Abc_NtkIsLogic(pNtk) )
+        {
+            Abc_Print( -1, "The current ABC netowrk is not a logic network.\n" );
+            return 1;
+        }
+        Abc_NtkTestPinGia( pNtk, 0, 0 );
     }
 
     return 0;

src/base/abci/abcTim.c

@@ -142,6 +142,93 @@ int Abc_NtkTestTimNodeStrash( Gia_Man_t * pGia, Abc_Obj_t * pNode )
 }
 
 
+/**Function*************************************************************
+
+  Synopsis    [Derives GIA manager using special pins to denote box boundaries.]
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+Gia_Man_t * Abc_NtkTestPinDeriveGia( Abc_Ntk_t * pNtk, int fWhiteBoxOnly, int fVerbose )
+{
+    Gia_Man_t * pTemp;
+    Gia_Man_t * pGia = NULL;
+    Vec_Ptr_t * vNodes;
+    Abc_Obj_t * pObj, * pFanin;
+    int i, k, iPinLit = 0;
+    // prepare logic network
+    assert( Abc_NtkIsLogic(pNtk) );
+    Abc_NtkToAig( pNtk );
+    // construct GIA
+    Abc_NtkFillTemp( pNtk );
+    pGia = Gia_ManStart( Abc_NtkObjNumMax(pNtk) );
+    Gia_ManHashAlloc( pGia );
+    // create primary inputs
+    Abc_NtkForEachCi( pNtk, pObj, i )
+        pObj->iTemp = Gia_ManAppendCi(pGia);
+    // create internal nodes in a topologic order from white boxes
+    vNodes = Abc_NtkDfs( pNtk, 0 );
+    Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
+    {
+        // input side
+        if ( !fWhiteBoxOnly || Abc_NodeIsWhiteBox(pObj) )
+        {
+            // create special pintype for this node
+            iPinLit = Gia_ManAppendPinType( pGia, 1 );
+            // create input pins
+            Abc_ObjForEachFanin( pObj, pFanin, k )
+                pFanin->iTemp = Gia_ManAppendAnd( pGia, pFanin->iTemp, iPinLit );
+        }
+        // perform GIA construction
+        pObj->iTemp = Abc_NtkTestTimNodeStrash( pGia, pObj );
+        // output side
+        if ( !fWhiteBoxOnly || Abc_NodeIsWhiteBox(pObj) )
+        {
+            // create special pintype for this node
+            iPinLit = Gia_ManAppendPinType( pGia, 1 );
+            // create output pins
+            pObj->iTemp = Gia_ManAppendAnd( pGia, pObj->iTemp, iPinLit );
+        }
+    }
+    Vec_PtrFree( vNodes );
+    // create primary outputs
+    Abc_NtkForEachCo( pNtk, pObj, i )
+        pObj->iTemp = Gia_ManAppendCo( pGia, Abc_ObjFanin0(pObj)->iTemp );
+    // finalize GIA
+    Gia_ManHashStop( pGia );
+    Gia_ManSetRegNum( pGia, 0 );
+    // clean up GIA
+    pGia = Gia_ManCleanup( pTemp = pGia );
+    Gia_ManStop( pTemp );
+    return pGia;
+}
+
+/**Function*************************************************************
+
+  Synopsis    []
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+void Abc_NtkTestPinGia( Abc_Ntk_t * pNtk, int fWhiteBoxOnly, int fVerbose )
+{
+    Gia_Man_t * pGia;
+    char * pFileName = "testpin.aig";
+    pGia = Abc_NtkTestPinDeriveGia( pNtk, fWhiteBoxOnly, fVerbose );
+    Gia_WriteAiger( pGia, pFileName, 0, 0 );
+    Gia_ManStop( pGia );
+    printf( "AIG with pins derived from mapped network \"%s\" was written into file \"%s\".\n", 
+        Abc_NtkName(pNtk), pFileName );
+}
+
 
 /**Function*************************************************************