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lvzhengyang
abc
Commits
53e4946c
Commit
53e4946c
authored
Mar 24, 2015
by
Alan Mishchenko
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Trying to reduce delay degradation afer 'map' with user timing.
parent
efdd26f8
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4 changed files
with
131 additions
and
0 deletions
+131
-0
src/base/abci/abc.c
+72
-0
src/base/abci/abcDar.c
+1
-0
src/base/abci/abcIf.c
+10
-0
src/base/abci/abcTiming.c
+48
-0
No files found.
src/base/abci/abc.c
View file @
53e4946c
...
...
@@ -238,6 +238,7 @@ static int Abc_CommandUnmap ( Abc_Frame_t * pAbc, int argc, cha
static
int
Abc_CommandAttach
(
Abc_Frame_t
*
pAbc
,
int
argc
,
char
**
argv
);
static
int
Abc_CommandSuperChoice
(
Abc_Frame_t
*
pAbc
,
int
argc
,
char
**
argv
);
static
int
Abc_CommandSuperChoiceLut
(
Abc_Frame_t
*
pAbc
,
int
argc
,
char
**
argv
);
static
int
Abc_CommandTimeScale
(
Abc_Frame_t
*
pAbc
,
int
argc
,
char
**
argv
);
//static int Abc_CommandFpga ( Abc_Frame_t * pAbc, int argc, char ** argv );
//static int Abc_CommandFpgaFast ( Abc_Frame_t * pAbc, int argc, char ** argv );
...
...
@@ -846,6 +847,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd
(
pAbc
,
"SC mapping"
,
"attach"
,
Abc_CommandAttach
,
1
);
Cmd_CommandAdd
(
pAbc
,
"SC mapping"
,
"superc"
,
Abc_CommandSuperChoice
,
1
);
Cmd_CommandAdd
(
pAbc
,
"SC mapping"
,
"supercl"
,
Abc_CommandSuperChoiceLut
,
1
);
Cmd_CommandAdd
(
pAbc
,
"SC mapping"
,
"timescale"
,
Abc_CommandTimeScale
,
0
);
// Cmd_CommandAdd( pAbc, "FPGA mapping", "fpga", Abc_CommandFpga, 1 );
// Cmd_CommandAdd( pAbc, "FPGA mapping", "ffpga", Abc_CommandFpgaFast, 1 );
...
...
@@ -15027,6 +15029,76 @@ usage:
SeeAlso []
***********************************************************************/
int
Abc_CommandTimeScale
(
Abc_Frame_t
*
pAbc
,
int
argc
,
char
**
argv
)
{
extern
void
Abc_NtkTimeScale
(
Abc_Ntk_t
*
pNtk
,
float
Scale
);
Abc_Ntk_t
*
pNtk
;
float
nTimeScale
;
int
c
,
fVerbose
;
pNtk
=
Abc_FrameReadNtk
(
pAbc
);
// set defaults
nTimeScale
=
(
float
)
0
.
01
;
fVerbose
=
0
;
Extra_UtilGetoptReset
();
while
(
(
c
=
Extra_UtilGetopt
(
argc
,
argv
,
"Th"
)
)
!=
EOF
)
{
switch
(
c
)
{
case
'T'
:
if
(
globalUtilOptind
>=
argc
)
{
Abc_Print
(
-
1
,
"Command line switch
\"
-T
\"
should be followed by a positive integer.
\n
"
);
goto
usage
;
}
nTimeScale
=
atof
(
argv
[
globalUtilOptind
]);
globalUtilOptind
++
;
if
(
nTimeScale
<
0
)
goto
usage
;
break
;
case
'v'
:
fVerbose
^=
1
;
break
;
case
'h'
:
goto
usage
;
default:
goto
usage
;
}
}
if
(
pNtk
==
NULL
)
{
Abc_Print
(
-
1
,
"Empty network.
\n
"
);
return
1
;
}
if
(
pNtk
->
pManTime
==
NULL
)
{
Abc_Print
(
-
1
,
"Timing manager is not defined.
\n
"
);
return
1
;
}
Abc_NtkTimeScale
(
pNtk
,
nTimeScale
);
return
0
;
usage:
Abc_Print
(
-
2
,
"usage: timescale [-T float] [-vh]
\n
"
);
Abc_Print
(
-
2
,
"
\t
scales timing information of the current network
\n
"
);
Abc_Print
(
-
2
,
"
\t
-T float : multiplicative factor [default = %f]
\n
"
,
nTimeScale
);
Abc_Print
(
-
2
,
"
\t
-v : toggles verbose output [default = %s]
\n
"
,
fVerbose
?
"yes"
:
"no"
);
Abc_Print
(
-
2
,
"
\t
-h : print the command usage
\n
"
);
return
1
;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
#if 0
int Abc_CommandFpga( Abc_Frame_t * pAbc, int argc, char ** argv )
{
src/base/abci/abcDar.c
View file @
53e4946c
...
...
@@ -290,6 +290,7 @@ Aig_Man_t * Abc_NtkToDar( Abc_Ntk_t * pNtk, int fExors, int fRegisters )
// initialize logic level of the CIs
((
Aig_Obj_t
*
)
pObj
->
pCopy
)
->
Level
=
pObj
->
Level
;
}
// complement the 1-values registers
if
(
fRegisters
)
{
Abc_NtkForEachLatch
(
pNtk
,
pObj
,
i
)
...
...
src/base/abci/abcIf.c
View file @
53e4946c
...
...
@@ -114,6 +114,16 @@ Abc_Ntk_t * Abc_NtkIf( Abc_Ntk_t * pNtk, If_Par_t * pPars )
pPars
->
pTimesArr
=
Abc_NtkGetCiArrivalFloats
(
pNtk
);
pPars
->
pTimesReq
=
Abc_NtkGetCoRequiredFloats
(
pNtk
);
// update timing info to reflect logic level
if
(
(
pPars
->
fDelayOpt
||
pPars
->
fDsdBalance
||
pPars
->
fUserRecLib
)
&&
pNtk
->
AndGateDelay
!=
0
.
0
)
{
int
c
;
for
(
c
=
0
;
c
<
Abc_NtkCiNum
(
pNtk
);
c
++
)
pPars
->
pTimesArr
[
c
]
/=
pNtk
->
AndGateDelay
;
for
(
c
=
0
;
c
<
Abc_NtkCoNum
(
pNtk
);
c
++
)
pPars
->
pTimesReq
[
c
]
/=
pNtk
->
AndGateDelay
;
}
// set the latch paths
if
(
pPars
->
fLatchPaths
&&
pPars
->
pTimesArr
)
{
...
...
src/base/abci/abcTiming.c
View file @
53e4946c
...
...
@@ -365,6 +365,54 @@ void Abc_NtkTimeInitialize( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkOld )
/**Function*************************************************************
Synopsis [Finalizes the timing manager after setting arr/req times.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void
Abc_NtkTimeScale
(
Abc_Ntk_t
*
pNtk
,
float
Scale
)
{
Abc_Obj_t
*
pObj
;
Abc_Time_t
**
ppTimes
,
*
pTime
;
int
i
;
if
(
pNtk
->
pManTime
==
NULL
)
return
;
// arrival
pNtk
->
pManTime
->
tArrDef
.
Fall
*=
Scale
;
pNtk
->
pManTime
->
tArrDef
.
Rise
*=
Scale
;
// departure
if
(
pNtk
->
pManTime
->
tReqDef
.
Fall
!=
ABC_INFINITY
)
pNtk
->
pManTime
->
tReqDef
.
Fall
*=
Scale
;
if
(
pNtk
->
pManTime
->
tReqDef
.
Rise
!=
ABC_INFINITY
)
pNtk
->
pManTime
->
tReqDef
.
Rise
*=
Scale
;
// set the default timing
ppTimes
=
(
Abc_Time_t
**
)
pNtk
->
pManTime
->
vArrs
->
pArray
;
Abc_NtkForEachCi
(
pNtk
,
pObj
,
i
)
{
pTime
=
ppTimes
[
pObj
->
Id
];
if
(
Abc_MaxFloat
(
pTime
->
Fall
,
pTime
->
Rise
)
!=
-
ABC_INFINITY
)
continue
;
pTime
->
Fall
*=
Scale
;
pTime
->
Rise
*=
Scale
;
}
// set the default timing
ppTimes
=
(
Abc_Time_t
**
)
pNtk
->
pManTime
->
vReqs
->
pArray
;
Abc_NtkForEachCo
(
pNtk
,
pObj
,
i
)
{
pTime
=
ppTimes
[
pObj
->
Id
];
if
(
Abc_MaxFloat
(
pTime
->
Fall
,
pTime
->
Rise
)
!=
ABC_INFINITY
)
continue
;
pTime
->
Fall
*=
Scale
;
pTime
->
Rise
*=
Scale
;
}
}
/**Function*************************************************************
Synopsis [Prepares the timing manager for delay trace.]
Description []
...
...
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