Adding APIs to retrieve NOR/OR gates from the library.

src/map/mio/mio.h

@@ -103,6 +103,8 @@ extern Mio_Gate_t *      Mio_LibraryReadConst0     ( Mio_Library_t * pLib );
 extern Mio_Gate_t *      Mio_LibraryReadConst1     ( Mio_Library_t * pLib );
 extern Mio_Gate_t *      Mio_LibraryReadNand2      ( Mio_Library_t * pLib );
 extern Mio_Gate_t *      Mio_LibraryReadAnd2       ( Mio_Library_t * pLib );
+extern Mio_Gate_t *      Mio_LibraryReadNor2       ( Mio_Library_t * pLib );
+extern Mio_Gate_t *      Mio_LibraryReadOr2        ( Mio_Library_t * pLib );
 extern Mio_Gate_t *      Mio_LibraryReadBuf        ( Mio_Library_t * pLib );
 extern Mio_Gate_t *      Mio_LibraryReadInv        ( Mio_Library_t * pLib );
 extern float             Mio_LibraryReadDelayInvRise( Mio_Library_t * pLib );

src/map/mio/mioApi.c

@@ -50,6 +50,8 @@ Mio_Gate_t *      Mio_LibraryReadConst0        ( Mio_Library_t * pLib )  { retur
 Mio_Gate_t *      Mio_LibraryReadConst1        ( Mio_Library_t * pLib )  { return pLib->pGate1;     }
 Mio_Gate_t *      Mio_LibraryReadNand2         ( Mio_Library_t * pLib )  { return pLib->pGateNand2; }
 Mio_Gate_t *      Mio_LibraryReadAnd2          ( Mio_Library_t * pLib )  { return pLib->pGateAnd2;  }
+Mio_Gate_t *      Mio_LibraryReadNor2          ( Mio_Library_t * pLib )  { return pLib->pGateNor2;  }
+Mio_Gate_t *      Mio_LibraryReadOr2           ( Mio_Library_t * pLib )  { return pLib->pGateOr2;   }
 float             Mio_LibraryReadDelayInvRise  ( Mio_Library_t * pLib )  { return (float)(pLib->pGateInv?   pLib->pGateInv->pPins->dDelayBlockRise   : 0.0); }
 float             Mio_LibraryReadDelayInvFall  ( Mio_Library_t * pLib )  { return (float)(pLib->pGateInv?   pLib->pGateInv->pPins->dDelayBlockFall   : 0.0); }
 float             Mio_LibraryReadDelayInvMax   ( Mio_Library_t * pLib )  { return (float)(pLib->pGateInv?   pLib->pGateInv->pPins->dDelayBlockMax    : 0.0); }

src/map/mio/mioInt.h

@@ -71,6 +71,8 @@ struct  Mio_LibraryStruct_t_
     Mio_Gate_t *       pGateInv;    // the inverter
     Mio_Gate_t *       pGateNand2;  // the NAND2 gate
     Mio_Gate_t *       pGateAnd2;   // the AND2 gate
+    Mio_Gate_t *       pGateNor2;   // the NOR2 gate
+    Mio_Gate_t *       pGateOr2;    // the OR2 gate
     st__table *         tName2Gate;  // the mapping of gate names into their pointer
     Mem_Flex_t *       pMmFlex;     // the memory manaqer for SOPs
     Vec_Str_t *        vCube;       // temporary cube

src/map/mio/mioRead.c

@@ -601,14 +601,16 @@ static inline Mio_Gate_t * Mio_GateCompare( Mio_Gate_t * pThis, Mio_Gate_t * pNe
 void Mio_LibraryDetectSpecialGates( Mio_Library_t * pLib )
 {
     Mio_Gate_t * pGate;
-    word uFuncBuf, uFuncInv, uFuncNand2, uFuncAnd2;
+    word uFuncBuf, uFuncInv, uFuncNand2, uFuncAnd2, uFuncNor2, uFuncOr2;
 
     Mio_LibrarySortGates( pLib );
 
     uFuncBuf   = ABC_CONST(0xAAAAAAAAAAAAAAAA);
     uFuncAnd2  = ABC_CONST(0xAAAAAAAAAAAAAAAA) & ABC_CONST(0xCCCCCCCCCCCCCCCC);
+    uFuncOr2   = ABC_CONST(0xAAAAAAAAAAAAAAAA) | ABC_CONST(0xCCCCCCCCCCCCCCCC);
     uFuncInv   = ~uFuncBuf;
     uFuncNand2 = ~uFuncAnd2;
+    uFuncNor2  = ~uFuncOr2;
 
     // get smallest-area buffer
     Mio_LibraryForEachGate( pLib, pGate )
@@ -630,12 +632,15 @@ void Mio_LibraryDetectSpecialGates( Mio_Library_t * pLib )
 
     // get smallest-area NAND2/AND2 gates
     Mio_LibraryForEachGate( pLib, pGate )
+    {
         pLib->pGateNand2 = Mio_GateCompare( pLib->pGateNand2, pGate, uFuncNand2 );
-    Mio_LibraryForEachGate( pLib, pGate )
         pLib->pGateAnd2 = Mio_GateCompare( pLib->pGateAnd2, pGate, uFuncAnd2 );
-    if ( pLib->pGateAnd2 == NULL && pLib->pGateNand2 == NULL )
+        pLib->pGateNor2 = Mio_GateCompare( pLib->pGateNor2, pGate, uFuncNor2 );
+        pLib->pGateOr2 = Mio_GateCompare( pLib->pGateOr2, pGate, uFuncOr2 );
+    }
+    if ( pLib->pGateAnd2 == NULL && pLib->pGateNand2 == NULL && pLib->pGateNor2 == NULL && pLib->pGateOr2 == NULL )
     {
-        printf( "Warnings: genlib library reader cannot detect the AND2 or NAND2 gate.\n" );
+        printf( "Warnings: genlib library reader cannot detect the AND2, NAND2, OR2, and NOR2 gate.\n" );
         printf( "Some parts of the supergate-based technology mapper may not work correctly.\n" );
     }
 }