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lvzhengyang
abc
Commits
29cb71f9
Commit
29cb71f9
authored
Aug 16, 2017
by
Alan Mishchenko
Browse files
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Plain Diff
Integrating Satoko into pdr.
parent
6ff66ed4
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Showing
9 changed files
with
68 additions
and
42 deletions
+68
-42
src/proof/pdr/pdrCnf.c
+11
-11
src/proof/pdr/pdrCore.c
+4
-2
src/proof/pdr/pdrIncr.c
+1
-1
src/proof/pdr/pdrInt.h
+25
-1
src/proof/pdr/pdrMan.c
+10
-10
src/proof/pdr/pdrSat.c
+11
-11
src/proof/pdr/pdrTsim.c
+2
-2
src/proof/pdr/pdrTsim3.c
+1
-1
src/proof/pdr/pdrUtil.c
+3
-3
No files found.
src/proof/pdr/pdrCnf.c
View file @
29cb71f9
...
@@ -86,7 +86,7 @@ static inline int Pdr_ObjSatVar2FindOrAdd( Pdr_Man_t * p, int k, Aig_Obj_t * pOb
...
@@ -86,7 +86,7 @@ static inline int Pdr_ObjSatVar2FindOrAdd( Pdr_Man_t * p, int k, Aig_Obj_t * pOb
sat_solver_setnvars
(
pSat
,
iVarNew
+
1
);
sat_solver_setnvars
(
pSat
,
iVarNew
+
1
);
if
(
k
==
0
&&
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
// initialize the register output
if
(
k
==
0
&&
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
// initialize the register output
{
{
int
Lit
=
toLitCond
(
iVarNew
,
1
);
int
Lit
=
Abc_Var2Lit
(
iVarNew
,
1
);
int
RetValue
=
sat_solver_addclause
(
pSat
,
&
Lit
,
&
Lit
+
1
);
int
RetValue
=
sat_solver_addclause
(
pSat
,
&
Lit
,
&
Lit
+
1
);
assert
(
RetValue
==
1
);
assert
(
RetValue
==
1
);
(
void
)
RetValue
;
(
void
)
RetValue
;
...
@@ -136,11 +136,11 @@ int Pdr_ObjSatVar2( Pdr_Man_t * p, int k, Aig_Obj_t * pObj, int Level, int Pol )
...
@@ -136,11 +136,11 @@ int Pdr_ObjSatVar2( Pdr_Man_t * p, int k, Aig_Obj_t * pObj, int Level, int Pol )
for
(
i
=
iClaBeg
;
i
<
iClaEnd
;
i
++
)
for
(
i
=
iClaBeg
;
i
<
iClaEnd
;
i
++
)
{
{
Vec_IntClear
(
vLits
);
Vec_IntClear
(
vLits
);
Vec_IntPush
(
vLits
,
toLitCond
(
iVarThis
,
lit_sign
(
p
->
pCnf2
->
pClauses
[
i
][
0
])
)
);
Vec_IntPush
(
vLits
,
Abc_Var2Lit
(
iVarThis
,
Abc_LitIsCompl
(
p
->
pCnf2
->
pClauses
[
i
][
0
])
)
);
for
(
pLit
=
p
->
pCnf2
->
pClauses
[
i
]
+
1
;
pLit
<
p
->
pCnf2
->
pClauses
[
i
+
1
];
pLit
++
)
for
(
pLit
=
p
->
pCnf2
->
pClauses
[
i
]
+
1
;
pLit
<
p
->
pCnf2
->
pClauses
[
i
+
1
];
pLit
++
)
{
{
iVar
=
Pdr_ObjSatVar2
(
p
,
k
,
Aig_ManObj
(
p
->
pAig
,
lit_v
ar
(
*
pLit
)),
Level
+
1
,
3
);
iVar
=
Pdr_ObjSatVar2
(
p
,
k
,
Aig_ManObj
(
p
->
pAig
,
Abc_Lit2V
ar
(
*
pLit
)),
Level
+
1
,
3
);
Vec_IntPush
(
vLits
,
toLitCond
(
iVar
,
lit_sign
(
*
pLit
)
)
);
Vec_IntPush
(
vLits
,
Abc_Var2Lit
(
iVar
,
Abc_LitIsCompl
(
*
pLit
)
)
);
}
}
RetValue
=
sat_solver_addclause
(
pSat
,
Vec_IntArray
(
vLits
),
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
)
);
RetValue
=
sat_solver_addclause
(
pSat
,
Vec_IntArray
(
vLits
),
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
)
);
assert
(
RetValue
);
assert
(
RetValue
);
...
@@ -154,11 +154,11 @@ int Pdr_ObjSatVar2( Pdr_Man_t * p, int k, Aig_Obj_t * pObj, int Level, int Pol )
...
@@ -154,11 +154,11 @@ int Pdr_ObjSatVar2( Pdr_Man_t * p, int k, Aig_Obj_t * pObj, int Level, int Pol )
if
(
2
-
!
Abc_LitIsCompl
(
p
->
pCnf2
->
pClauses
[
i
][
0
])
==
(
Pol
&
~
PolPres
)
)
// taking opposite literal
if
(
2
-
!
Abc_LitIsCompl
(
p
->
pCnf2
->
pClauses
[
i
][
0
])
==
(
Pol
&
~
PolPres
)
)
// taking opposite literal
{
{
Vec_IntClear
(
vLits
);
Vec_IntClear
(
vLits
);
Vec_IntPush
(
vLits
,
toLitCond
(
iVarThis
,
Abc_LitIsCompl
(
p
->
pCnf2
->
pClauses
[
i
][
0
])
)
);
Vec_IntPush
(
vLits
,
Abc_Var2Lit
(
iVarThis
,
Abc_LitIsCompl
(
p
->
pCnf2
->
pClauses
[
i
][
0
])
)
);
for
(
pLit
=
p
->
pCnf2
->
pClauses
[
i
]
+
1
;
pLit
<
p
->
pCnf2
->
pClauses
[
i
+
1
];
pLit
++
)
for
(
pLit
=
p
->
pCnf2
->
pClauses
[
i
]
+
1
;
pLit
<
p
->
pCnf2
->
pClauses
[
i
+
1
];
pLit
++
)
{
{
iVar
=
Pdr_ObjSatVar2
(
p
,
k
,
Aig_ManObj
(
p
->
pAig
,
lit_v
ar
(
*
pLit
)),
Level
+
1
,
((
unsigned
)
p
->
pCnf2
->
pClaPols
[
i
]
>>
(
2
*
(
pLit
-
p
->
pCnf2
->
pClauses
[
i
]
-
1
)))
&
3
);
iVar
=
Pdr_ObjSatVar2
(
p
,
k
,
Aig_ManObj
(
p
->
pAig
,
Abc_Lit2V
ar
(
*
pLit
)),
Level
+
1
,
((
unsigned
)
p
->
pCnf2
->
pClaPols
[
i
]
>>
(
2
*
(
pLit
-
p
->
pCnf2
->
pClauses
[
i
]
-
1
)))
&
3
);
Vec_IntPush
(
vLits
,
toLitCond
(
iVar
,
lit_sign
(
*
pLit
)
)
);
Vec_IntPush
(
vLits
,
Abc_Var2Lit
(
iVar
,
Abc_LitIsCompl
(
*
pLit
)
)
);
}
}
RetValue
=
sat_solver_addclause
(
pSat
,
Vec_IntArray
(
vLits
),
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
)
);
RetValue
=
sat_solver_addclause
(
pSat
,
Vec_IntArray
(
vLits
),
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
)
);
assert
(
RetValue
);
assert
(
RetValue
);
...
@@ -187,7 +187,7 @@ static inline int Pdr_ObjSatVar2FindOrAdd( Pdr_Man_t * p, int k, Aig_Obj_t * pOb
...
@@ -187,7 +187,7 @@ static inline int Pdr_ObjSatVar2FindOrAdd( Pdr_Man_t * p, int k, Aig_Obj_t * pOb
sat_solver_setnvars
(
pSat
,
iVarNew
+
1
);
sat_solver_setnvars
(
pSat
,
iVarNew
+
1
);
if
(
k
==
0
&&
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
// initialize the register output
if
(
k
==
0
&&
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
// initialize the register output
{
{
int
Lit
=
toLitCond
(
iVarNew
,
1
);
int
Lit
=
Abc_Var2Lit
(
iVarNew
,
1
);
int
RetValue
=
sat_solver_addclause
(
pSat
,
&
Lit
,
&
Lit
+
1
);
int
RetValue
=
sat_solver_addclause
(
pSat
,
&
Lit
,
&
Lit
+
1
);
assert
(
RetValue
==
1
);
assert
(
RetValue
==
1
);
(
void
)
RetValue
;
(
void
)
RetValue
;
...
@@ -213,11 +213,11 @@ int Pdr_ObjSatVar2( Pdr_Man_t * p, int k, Aig_Obj_t * pObj, int Level, int Pol )
...
@@ -213,11 +213,11 @@ int Pdr_ObjSatVar2( Pdr_Man_t * p, int k, Aig_Obj_t * pObj, int Level, int Pol )
for
(
i
=
iClaBeg
;
i
<
iClaEnd
;
i
++
)
for
(
i
=
iClaBeg
;
i
<
iClaEnd
;
i
++
)
{
{
Vec_IntClear
(
vLits
);
Vec_IntClear
(
vLits
);
Vec_IntPush
(
vLits
,
toLitCond
(
iVarThis
,
lit_sign
(
p
->
pCnf2
->
pClauses
[
i
][
0
])
)
);
Vec_IntPush
(
vLits
,
Abc_Var2Lit
(
iVarThis
,
Abc_LitIsCompl
(
p
->
pCnf2
->
pClauses
[
i
][
0
])
)
);
for
(
pLit
=
p
->
pCnf2
->
pClauses
[
i
]
+
1
;
pLit
<
p
->
pCnf2
->
pClauses
[
i
+
1
];
pLit
++
)
for
(
pLit
=
p
->
pCnf2
->
pClauses
[
i
]
+
1
;
pLit
<
p
->
pCnf2
->
pClauses
[
i
+
1
];
pLit
++
)
{
{
iVar
=
Pdr_ObjSatVar2
(
p
,
k
,
Aig_ManObj
(
p
->
pAig
,
lit_v
ar
(
*
pLit
)),
Level
+
1
,
Pol
);
iVar
=
Pdr_ObjSatVar2
(
p
,
k
,
Aig_ManObj
(
p
->
pAig
,
Abc_Lit2V
ar
(
*
pLit
)),
Level
+
1
,
Pol
);
Vec_IntPush
(
vLits
,
toLitCond
(
iVar
,
lit_sign
(
*
pLit
)
)
);
Vec_IntPush
(
vLits
,
Abc_Var2Lit
(
iVar
,
Abc_LitIsCompl
(
*
pLit
)
)
);
}
}
RetValue
=
sat_solver_addclause
(
pSat
,
Vec_IntArray
(
vLits
),
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
)
);
RetValue
=
sat_solver_addclause
(
pSat
,
Vec_IntArray
(
vLits
),
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
)
);
assert
(
RetValue
);
assert
(
RetValue
);
...
...
src/proof/pdr/pdrCore.c
View file @
29cb71f9
...
@@ -107,13 +107,13 @@ Pdr_Set_t * Pdr_ManReduceClause( Pdr_Man_t * p, int k, Pdr_Set_t * pCube )
...
@@ -107,13 +107,13 @@ Pdr_Set_t * Pdr_ManReduceClause( Pdr_Man_t * p, int k, Pdr_Set_t * pCube )
assert
(
Vec_IntSize
(
vLits
)
<
pCube
->
nLits
);
assert
(
Vec_IntSize
(
vLits
)
<
pCube
->
nLits
);
// if the cube overlaps with init, add any literal
// if the cube overlaps with init, add any literal
Vec_IntForEachEntry
(
vLits
,
Entry
,
i
)
Vec_IntForEachEntry
(
vLits
,
Entry
,
i
)
if
(
lit_sign
(
Entry
)
==
0
)
// positive literal
if
(
Abc_LitIsCompl
(
Entry
)
==
0
)
// positive literal
break
;
break
;
if
(
i
==
Vec_IntSize
(
vLits
)
)
// only negative literals
if
(
i
==
Vec_IntSize
(
vLits
)
)
// only negative literals
{
{
// add the first positive literal
// add the first positive literal
for
(
i
=
0
;
i
<
pCube
->
nLits
;
i
++
)
for
(
i
=
0
;
i
<
pCube
->
nLits
;
i
++
)
if
(
lit_sign
(
pCube
->
Lits
[
i
])
==
0
)
// positive literal
if
(
Abc_LitIsCompl
(
pCube
->
Lits
[
i
])
==
0
)
// positive literal
{
{
Vec_IntPush
(
vLits
,
pCube
->
Lits
[
i
]
);
Vec_IntPush
(
vLits
,
pCube
->
Lits
[
i
]
);
break
;
break
;
...
@@ -524,6 +524,7 @@ static inline int Vec_IntSelectSortPrioReverseLit( int * pArray, int nSize, Vec_
...
@@ -524,6 +524,7 @@ static inline int Vec_IntSelectSortPrioReverseLit( int * pArray, int nSize, Vec_
***********************************************************************/
***********************************************************************/
int
Pdr_ManGeneralize2
(
Pdr_Man_t
*
p
,
int
k
,
Pdr_Set_t
*
pCube
,
Pdr_Set_t
**
ppCubeMin
)
int
Pdr_ManGeneralize2
(
Pdr_Man_t
*
p
,
int
k
,
Pdr_Set_t
*
pCube
,
Pdr_Set_t
**
ppCubeMin
)
{
{
#if 0
int fUseMinAss = 0;
int fUseMinAss = 0;
sat_solver * pSat = Pdr_ManFetchSolver( p, k );
sat_solver * pSat = Pdr_ManFetchSolver( p, k );
int Order = Vec_IntSelectSortPrioReverseLit( pCube->Lits, pCube->nLits, p->vPrio );
int Order = Vec_IntSelectSortPrioReverseLit( pCube->Lits, pCube->nLits, p->vPrio );
...
@@ -661,6 +662,7 @@ int Pdr_ManGeneralize2( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** pp
...
@@ -661,6 +662,7 @@ int Pdr_ManGeneralize2( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** pp
*ppCubeMin = Pdr_SetCreateSubset( pCube, Vec_IntArray(vLits1), Vec_IntSize(vLits1) );
*ppCubeMin = Pdr_SetCreateSubset( pCube, Vec_IntArray(vLits1), Vec_IntSize(vLits1) );
assert( !Pdr_SetIsInit(*ppCubeMin, -1) );
assert( !Pdr_SetIsInit(*ppCubeMin, -1) );
Order = 0;
Order = 0;
#endif
return
0
;
return
0
;
}
}
...
...
src/proof/pdr/pdrIncr.c
View file @
29cb71f9
...
@@ -896,7 +896,7 @@ int IPdr_ManCheckCubeReduce( Pdr_Man_t * p, Vec_Ptr_t * vClauses, Pdr_Set_t * pC
...
@@ -896,7 +896,7 @@ int IPdr_ManCheckCubeReduce( Pdr_Man_t * p, Vec_Ptr_t * vClauses, Pdr_Set_t * pC
if
(
pCube
==
NULL
)
// solve the property
if
(
pCube
==
NULL
)
// solve the property
{
{
Lit
=
toLit
(
Pdr_ObjSatVar
(
p
,
1
,
2
,
Aig_ManCo
(
p
->
pAig
,
p
->
iOutCur
))
);
// pos literal (property fails)
Lit
=
Abc_Var2Lit
(
Pdr_ObjSatVar
(
p
,
1
,
2
,
Aig_ManCo
(
p
->
pAig
,
p
->
iOutCur
)),
0
);
// pos literal (property fails)
RetValue
=
sat_solver_addclause
(
pSat
,
&
Lit
,
&
Lit
+
1
);
RetValue
=
sat_solver_addclause
(
pSat
,
&
Lit
,
&
Lit
+
1
);
assert
(
RetValue
==
1
);
assert
(
RetValue
==
1
);
...
...
src/proof/pdr/pdrInt.h
View file @
29cb71f9
...
@@ -28,11 +28,35 @@
...
@@ -28,11 +28,35 @@
#include "aig/saig/saig.h"
#include "aig/saig/saig.h"
#include "misc/vec/vecWec.h"
#include "misc/vec/vecWec.h"
#include "sat/cnf/cnf.h"
#include "sat/cnf/cnf.h"
#include "sat/bsat/satSolver.h"
#include "pdr.h"
#include "pdr.h"
#include "misc/hash/hashInt.h"
#include "misc/hash/hashInt.h"
#include "aig/gia/giaAig.h"
#include "aig/gia/giaAig.h"
//#define PDR_USE_SATOKO 1
#ifndef PDR_USE_SATOKO
#include "sat/bsat/satSolver.h"
#else
#include "sat/satoko/satoko.h"
#include "sat/satoko/solver.h"
#define l_Undef 0
#define l_True 1
#define l_False -1
#define sat_solver satoko_t
#define sat_solver_new satoko_create
#define sat_solver_delete satoko_destroy
#define zsat_solver_new_seed(s) satoko_create()
#define zsat_solver_restart_seed(s,a) satoko_reset(s)
#define sat_solver_nvars solver_varnum
#define sat_solver_setnvars satoko_setnvars
#define sat_solver_addclause(s,b,e) satoko_add_clause(s,b,e-b)
#define sat_solver_final satoko_final_conflict
#define sat_solver_solve(s,b,e,c,x,y,z) satoko_solve_assumptions_limit(s,b,e-b,(int)c)
#define sat_solver_var_value solver_read_cex_varvalue
#define sat_solver_set_runtime_limit solver_set_runtime_limit
#define sat_solver_compress(s)
#endif
ABC_NAMESPACE_HEADER_START
ABC_NAMESPACE_HEADER_START
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
...
...
src/proof/pdr/pdrMan.c
View file @
29cb71f9
...
@@ -421,12 +421,12 @@ Abc_Cex_t * Pdr_ManDeriveCex( Pdr_Man_t * p )
...
@@ -421,12 +421,12 @@ Abc_Cex_t * Pdr_ManDeriveCex( Pdr_Man_t * p )
for
(
i
=
pObl
->
pState
->
nLits
;
i
<
pObl
->
pState
->
nTotal
;
i
++
)
for
(
i
=
pObl
->
pState
->
nLits
;
i
<
pObl
->
pState
->
nTotal
;
i
++
)
{
{
Lit
=
pObl
->
pState
->
Lits
[
i
];
Lit
=
pObl
->
pState
->
Lits
[
i
];
if
(
lit_sign
(
Lit
)
)
if
(
Abc_LitIsCompl
(
Lit
)
)
continue
;
continue
;
if
(
lit_v
ar
(
Lit
)
>=
pCex
->
nPis
)
// allows PPI literals to be thrown away
if
(
Abc_Lit2V
ar
(
Lit
)
>=
pCex
->
nPis
)
// allows PPI literals to be thrown away
continue
;
continue
;
assert
(
lit_v
ar
(
Lit
)
<
pCex
->
nPis
);
assert
(
Abc_Lit2V
ar
(
Lit
)
<
pCex
->
nPis
);
Abc_InfoSetBit
(
pCex
->
pData
,
pCex
->
nRegs
+
f
*
pCex
->
nPis
+
lit_v
ar
(
Lit
)
);
Abc_InfoSetBit
(
pCex
->
pData
,
pCex
->
nRegs
+
f
*
pCex
->
nPis
+
Abc_Lit2V
ar
(
Lit
)
);
}
}
assert
(
f
==
nFrames
);
assert
(
f
==
nFrames
);
if
(
!
Saig_ManVerifyCex
(
p
->
pAig
,
pCex
)
)
if
(
!
Saig_ManVerifyCex
(
p
->
pAig
,
pCex
)
)
...
@@ -470,9 +470,9 @@ Abc_Cex_t * Pdr_ManDeriveCexAbs( Pdr_Man_t * p )
...
@@ -470,9 +470,9 @@ Abc_Cex_t * Pdr_ManDeriveCexAbs( Pdr_Man_t * p )
for
(
i
=
pObl
->
pState
->
nLits
;
i
<
pObl
->
pState
->
nTotal
;
i
++
)
for
(
i
=
pObl
->
pState
->
nLits
;
i
<
pObl
->
pState
->
nTotal
;
i
++
)
{
{
Lit
=
pObl
->
pState
->
Lits
[
i
];
Lit
=
pObl
->
pState
->
Lits
[
i
];
if
(
lit_v
ar
(
Lit
)
<
nPis
)
// PI literal
if
(
Abc_Lit2V
ar
(
Lit
)
<
nPis
)
// PI literal
continue
;
continue
;
Flop
=
lit_v
ar
(
Lit
)
-
nPis
;
Flop
=
Abc_Lit2V
ar
(
Lit
)
-
nPis
;
if
(
Vec_IntEntry
(
p
->
vMapFf2Ppi
,
Flop
)
>=
0
)
// already used PPI literal
if
(
Vec_IntEntry
(
p
->
vMapFf2Ppi
,
Flop
)
>=
0
)
// already used PPI literal
continue
;
continue
;
Vec_IntWriteEntry
(
p
->
vMapFf2Ppi
,
Flop
,
Vec_IntSize
(
p
->
vMapPpi2Ff
)
);
Vec_IntWriteEntry
(
p
->
vMapFf2Ppi
,
Flop
,
Vec_IntSize
(
p
->
vMapPpi2Ff
)
);
...
@@ -502,13 +502,13 @@ Abc_Cex_t * Pdr_ManDeriveCexAbs( Pdr_Man_t * p )
...
@@ -502,13 +502,13 @@ Abc_Cex_t * Pdr_ManDeriveCexAbs( Pdr_Man_t * p )
for
(
i
=
pObl
->
pState
->
nLits
;
i
<
pObl
->
pState
->
nTotal
;
i
++
)
for
(
i
=
pObl
->
pState
->
nLits
;
i
<
pObl
->
pState
->
nTotal
;
i
++
)
{
{
Lit
=
pObl
->
pState
->
Lits
[
i
];
Lit
=
pObl
->
pState
->
Lits
[
i
];
if
(
lit_sign
(
Lit
)
)
if
(
Abc_LitIsCompl
(
Lit
)
)
continue
;
continue
;
if
(
lit_v
ar
(
Lit
)
<
nPis
)
// PI literal
if
(
Abc_Lit2V
ar
(
Lit
)
<
nPis
)
// PI literal
Abc_InfoSetBit
(
pCex
->
pData
,
pCex
->
nRegs
+
f
*
pCex
->
nPis
+
lit_v
ar
(
Lit
)
);
Abc_InfoSetBit
(
pCex
->
pData
,
pCex
->
nRegs
+
f
*
pCex
->
nPis
+
Abc_Lit2V
ar
(
Lit
)
);
else
else
{
{
int
iPPI
=
nPis
+
Vec_IntEntry
(
p
->
vMapFf2Ppi
,
lit_v
ar
(
Lit
)
-
nPis
);
int
iPPI
=
nPis
+
Vec_IntEntry
(
p
->
vMapFf2Ppi
,
Abc_Lit2V
ar
(
Lit
)
-
nPis
);
assert
(
iPPI
<
pCex
->
nPis
);
assert
(
iPPI
<
pCex
->
nPis
);
Abc_InfoSetBit
(
pCex
->
pData
,
pCex
->
nRegs
+
f
*
pCex
->
nPis
+
iPPI
);
Abc_InfoSetBit
(
pCex
->
pData
,
pCex
->
nRegs
+
f
*
pCex
->
nPis
+
iPPI
);
}
}
...
...
src/proof/pdr/pdrSat.c
View file @
29cb71f9
...
@@ -120,11 +120,11 @@ Vec_Int_t * Pdr_ManLitsToCube( Pdr_Man_t * p, int k, int * pArray, int nArray )
...
@@ -120,11 +120,11 @@ Vec_Int_t * Pdr_ManLitsToCube( Pdr_Man_t * p, int k, int * pArray, int nArray )
Vec_IntClear
(
p
->
vLits
);
Vec_IntClear
(
p
->
vLits
);
for
(
i
=
0
;
i
<
nArray
;
i
++
)
for
(
i
=
0
;
i
<
nArray
;
i
++
)
{
{
RegId
=
Pdr_ObjRegNum
(
p
,
k
,
lit_v
ar
(
pArray
[
i
])
);
RegId
=
Pdr_ObjRegNum
(
p
,
k
,
Abc_Lit2V
ar
(
pArray
[
i
])
);
if
(
RegId
==
-
1
)
if
(
RegId
==
-
1
)
continue
;
continue
;
assert
(
RegId
>=
0
&&
RegId
<
Aig_ManRegNum
(
p
->
pAig
)
);
assert
(
RegId
>=
0
&&
RegId
<
Aig_ManRegNum
(
p
->
pAig
)
);
Vec_IntPush
(
p
->
vLits
,
toLitCond
(
RegId
,
!
lit_sign
(
pArray
[
i
]))
);
Vec_IntPush
(
p
->
vLits
,
Abc_Var2Lit
(
RegId
,
!
Abc_LitIsCompl
(
pArray
[
i
]))
);
}
}
assert
(
Vec_IntSize
(
p
->
vLits
)
>=
0
&&
Vec_IntSize
(
p
->
vLits
)
<=
nArray
);
assert
(
Vec_IntSize
(
p
->
vLits
)
>=
0
&&
Vec_IntSize
(
p
->
vLits
)
<=
nArray
);
return
p
->
vLits
;
return
p
->
vLits
;
...
@@ -153,12 +153,12 @@ Vec_Int_t * Pdr_ManCubeToLits( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, int fCom
...
@@ -153,12 +153,12 @@ Vec_Int_t * Pdr_ManCubeToLits( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, int fCom
if
(
pCube
->
Lits
[
i
]
==
-
1
)
if
(
pCube
->
Lits
[
i
]
==
-
1
)
continue
;
continue
;
if
(
fNext
)
if
(
fNext
)
pObj
=
Saig_ManLi
(
p
->
pAig
,
lit_v
ar
(
pCube
->
Lits
[
i
])
);
pObj
=
Saig_ManLi
(
p
->
pAig
,
Abc_Lit2V
ar
(
pCube
->
Lits
[
i
])
);
else
else
pObj
=
Saig_ManLo
(
p
->
pAig
,
lit_v
ar
(
pCube
->
Lits
[
i
])
);
pObj
=
Saig_ManLo
(
p
->
pAig
,
Abc_Lit2V
ar
(
pCube
->
Lits
[
i
])
);
iVar
=
Pdr_ObjSatVar
(
p
,
k
,
fNext
?
2
-
lit_sign
(
pCube
->
Lits
[
i
])
:
3
,
pObj
);
assert
(
iVar
>=
0
);
iVar
=
Pdr_ObjSatVar
(
p
,
k
,
fNext
?
2
-
Abc_LitIsCompl
(
pCube
->
Lits
[
i
])
:
3
,
pObj
);
assert
(
iVar
>=
0
);
iVarMax
=
Abc_MaxInt
(
iVarMax
,
iVar
);
iVarMax
=
Abc_MaxInt
(
iVarMax
,
iVar
);
Vec_IntPush
(
p
->
vLits
,
toLitCond
(
iVar
,
fCompl
^
lit_sign
(
pCube
->
Lits
[
i
])
)
);
Vec_IntPush
(
p
->
vLits
,
Abc_Var2Lit
(
iVar
,
fCompl
^
Abc_LitIsCompl
(
pCube
->
Lits
[
i
])
)
);
}
}
// sat_solver_setnvars( Pdr_ManSolver(p, k), iVarMax + 1 );
// sat_solver_setnvars( Pdr_ManSolver(p, k), iVarMax + 1 );
p
->
tCnf
+=
Abc_Clock
()
-
clk
;
p
->
tCnf
+=
Abc_Clock
()
-
clk
;
...
@@ -192,7 +192,7 @@ void Pdr_ManSetPropertyOutput( Pdr_Man_t * p, int k )
...
@@ -192,7 +192,7 @@ void Pdr_ManSetPropertyOutput( Pdr_Man_t * p, int k )
// skip timedout outputs
// skip timedout outputs
if
(
p
->
pPars
->
vOutMap
&&
Vec_IntEntry
(
p
->
pPars
->
vOutMap
,
i
)
==
-
1
)
if
(
p
->
pPars
->
vOutMap
&&
Vec_IntEntry
(
p
->
pPars
->
vOutMap
,
i
)
==
-
1
)
continue
;
continue
;
Lit
=
toLitCond
(
Pdr_ObjSatVar
(
p
,
k
,
1
,
pObj
),
1
);
// neg literal
Lit
=
Abc_Var2Lit
(
Pdr_ObjSatVar
(
p
,
k
,
1
,
pObj
),
1
);
// neg literal
RetValue
=
sat_solver_addclause
(
pSat
,
&
Lit
,
&
Lit
+
1
);
RetValue
=
sat_solver_addclause
(
pSat
,
&
Lit
,
&
Lit
+
1
);
assert
(
RetValue
==
1
);
assert
(
RetValue
==
1
);
}
}
...
@@ -300,7 +300,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
...
@@ -300,7 +300,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
if
(
pCube
==
NULL
)
// solve the property
if
(
pCube
==
NULL
)
// solve the property
{
{
clk
=
Abc_Clock
();
clk
=
Abc_Clock
();
Lit
=
toLit
(
Pdr_ObjSatVar
(
p
,
k
,
2
,
Aig_ManCo
(
p
->
pAig
,
p
->
iOutCur
))
);
// pos literal (property fails)
Lit
=
Abc_Var2Lit
(
Pdr_ObjSatVar
(
p
,
k
,
2
,
Aig_ManCo
(
p
->
pAig
,
p
->
iOutCur
)),
0
);
// pos literal (property fails)
Limit
=
sat_solver_set_runtime_limit
(
pSat
,
Pdr_ManTimeLimit
(
p
)
);
Limit
=
sat_solver_set_runtime_limit
(
pSat
,
Pdr_ManTimeLimit
(
p
)
);
RetValue
=
sat_solver_solve
(
pSat
,
&
Lit
,
&
Lit
+
1
,
nConfLimit
,
0
,
0
,
0
);
RetValue
=
sat_solver_solve
(
pSat
,
&
Lit
,
&
Lit
+
1
,
nConfLimit
,
0
,
0
,
0
);
sat_solver_set_runtime_limit
(
pSat
,
Limit
);
sat_solver_set_runtime_limit
(
pSat
,
Limit
);
...
@@ -316,7 +316,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
...
@@ -316,7 +316,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
// add the cube in terms of current state variables
// add the cube in terms of current state variables
vLits
=
Pdr_ManCubeToLits
(
p
,
k
,
pCube
,
1
,
0
);
vLits
=
Pdr_ManCubeToLits
(
p
,
k
,
pCube
,
1
,
0
);
// add activation literal
// add activation literal
Lit
=
toLit
(
Pdr_ManFreeVar
(
p
,
k
)
);
Lit
=
Abc_Var2Lit
(
Pdr_ManFreeVar
(
p
,
k
),
0
);
// add activation literal
// add activation literal
Vec_IntPush
(
vLits
,
Lit
);
Vec_IntPush
(
vLits
,
Lit
);
RetValue
=
sat_solver_addclause
(
pSat
,
Vec_IntArray
(
vLits
),
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
)
);
RetValue
=
sat_solver_addclause
(
pSat
,
Vec_IntArray
(
vLits
),
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
)
);
...
@@ -325,7 +325,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
...
@@ -325,7 +325,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
// create assumptions
// create assumptions
vLits
=
Pdr_ManCubeToLits
(
p
,
k
,
pCube
,
0
,
1
);
vLits
=
Pdr_ManCubeToLits
(
p
,
k
,
pCube
,
0
,
1
);
// add activation literal
// add activation literal
Vec_IntPush
(
vLits
,
lit_neg
(
Lit
)
);
Vec_IntPush
(
vLits
,
Abc_LitNot
(
Lit
)
);
}
}
else
else
vLits
=
Pdr_ManCubeToLits
(
p
,
k
,
pCube
,
0
,
1
);
vLits
=
Pdr_ManCubeToLits
(
p
,
k
,
pCube
,
0
,
1
);
...
@@ -376,7 +376,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
...
@@ -376,7 +376,7 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
if ( fLitUsed )
if ( fLitUsed )
{
{
int RetValue;
int RetValue;
Lit =
lit_neg
(Lit);
Lit =
Abc_LitNot
(Lit);
RetValue = sat_solver_addclause( pSat, &Lit, &Lit + 1 );
RetValue = sat_solver_addclause( pSat, &Lit, &Lit + 1 );
assert( RetValue == 1 );
assert( RetValue == 1 );
sat_solver_compress( pSat );
sat_solver_compress( pSat );
...
...
src/proof/pdr/pdrTsim.c
View file @
29cb71f9
...
@@ -289,14 +289,14 @@ void Pdr_ManDeriveResult( Aig_Man_t * pAig, Vec_Int_t * vCiObjs, Vec_Int_t * vCi
...
@@ -289,14 +289,14 @@ void Pdr_ManDeriveResult( Aig_Man_t * pAig, Vec_Int_t * vCiObjs, Vec_Int_t * vCi
{
{
if
(
Saig_ObjIsPi
(
pAig
,
pObj
)
)
if
(
Saig_ObjIsPi
(
pAig
,
pObj
)
)
{
{
Lit
=
toLitCond
(
Aig_ObjCioId
(
pObj
),
(
Vec_IntEntry
(
vCiVals
,
i
)
==
0
)
);
Lit
=
Abc_Var2Lit
(
Aig_ObjCioId
(
pObj
),
(
Vec_IntEntry
(
vCiVals
,
i
)
==
0
)
);
Vec_IntPush
(
vPiLits
,
Lit
);
Vec_IntPush
(
vPiLits
,
Lit
);
continue
;
continue
;
}
}
assert
(
Saig_ObjIsLo
(
pAig
,
pObj
)
);
assert
(
Saig_ObjIsLo
(
pAig
,
pObj
)
);
if
(
Aig_ObjIsTravIdCurrent
(
pAig
,
pObj
)
)
if
(
Aig_ObjIsTravIdCurrent
(
pAig
,
pObj
)
)
continue
;
continue
;
Lit
=
toLitCond
(
Aig_ObjCioId
(
pObj
)
-
Saig_ManPiNum
(
pAig
),
(
Vec_IntEntry
(
vCiVals
,
i
)
==
0
)
);
Lit
=
Abc_Var2Lit
(
Aig_ObjCioId
(
pObj
)
-
Saig_ManPiNum
(
pAig
),
(
Vec_IntEntry
(
vCiVals
,
i
)
==
0
)
);
Vec_IntPush
(
vRes
,
Lit
);
Vec_IntPush
(
vRes
,
Lit
);
}
}
if
(
Vec_IntSize
(
vRes
)
==
0
)
if
(
Vec_IntSize
(
vRes
)
==
0
)
...
...
src/proof/pdr/pdrTsim3.c
View file @
29cb71f9
...
@@ -233,7 +233,7 @@ Abc_Print( 1, " in frame %d.\n", k );
...
@@ -233,7 +233,7 @@ Abc_Print( 1, " in frame %d.\n", k );
// read solver
// read solver
pSat
=
Pdr_ManFetchSolver
(
p
->
pMan
,
k
);
pSat
=
Pdr_ManFetchSolver
(
p
->
pMan
,
k
);
LitAux
=
toLit
(
Pdr_ManFreeVar
(
p
->
pMan
,
k
)
);
LitAux
=
Abc_Var2Lit
(
Pdr_ManFreeVar
(
p
->
pMan
,
k
),
0
);
// add the clause (complemented cube) in terms of next state variables
// add the clause (complemented cube) in terms of next state variables
if
(
pCube
==
NULL
)
// the target is the property output
if
(
pCube
==
NULL
)
// the target is the property output
{
{
...
...
src/proof/pdr/pdrUtil.c
View file @
29cb71f9
...
@@ -234,7 +234,7 @@ void Pdr_SetPrint( FILE * pFile, Pdr_Set_t * p, int nRegs, Vec_Int_t * vFlopCoun
...
@@ -234,7 +234,7 @@ void Pdr_SetPrint( FILE * pFile, Pdr_Set_t * p, int nRegs, Vec_Int_t * vFlopCoun
{
{
if
(
p
->
Lits
[
i
]
==
-
1
)
if
(
p
->
Lits
[
i
]
==
-
1
)
continue
;
continue
;
pBuff
[
lit_var
(
p
->
Lits
[
i
])]
=
(
lit_sign
(
p
->
Lits
[
i
])
?
'0'
:
'1'
);
pBuff
[
Abc_Lit2Var
(
p
->
Lits
[
i
])]
=
(
Abc_LitIsCompl
(
p
->
Lits
[
i
])
?
'0'
:
'1'
);
}
}
if
(
vFlopCounts
)
if
(
vFlopCounts
)
{
{
...
@@ -351,7 +351,7 @@ void Pdr_SetPrintStr( Vec_Str_t * vStr, Pdr_Set_t * p, int nRegs, Vec_Int_t * vF
...
@@ -351,7 +351,7 @@ void Pdr_SetPrintStr( Vec_Str_t * vStr, Pdr_Set_t * p, int nRegs, Vec_Int_t * vF
{
{
if
(
p
->
Lits
[
i
]
==
-
1
)
if
(
p
->
Lits
[
i
]
==
-
1
)
continue
;
continue
;
pBuff
[
lit_var
(
p
->
Lits
[
i
])]
=
(
lit_sign
(
p
->
Lits
[
i
])
?
'0'
:
'1'
);
pBuff
[
Abc_Lit2Var
(
p
->
Lits
[
i
])]
=
(
Abc_LitIsCompl
(
p
->
Lits
[
i
])
?
'0'
:
'1'
);
}
}
if
(
vFlopCounts
)
if
(
vFlopCounts
)
{
{
...
@@ -465,7 +465,7 @@ int Pdr_SetIsInit( Pdr_Set_t * pCube, int iRemove )
...
@@ -465,7 +465,7 @@ int Pdr_SetIsInit( Pdr_Set_t * pCube, int iRemove )
assert
(
pCube
->
Lits
[
i
]
!=
-
1
);
assert
(
pCube
->
Lits
[
i
]
!=
-
1
);
if
(
i
==
iRemove
)
if
(
i
==
iRemove
)
continue
;
continue
;
if
(
lit_sign
(
pCube
->
Lits
[
i
]
)
==
0
)
if
(
Abc_LitIsCompl
(
pCube
->
Lits
[
i
]
)
==
0
)
return
0
;
return
0
;
}
}
return
1
;
return
1
;
...
...
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