Commit 2696cf05 by Alan Mishchenko

Version abc70313

parent 93c05287
......@@ -254,6 +254,10 @@ SOURCE=.\src\base\abci\abcGen.c
# End Source File
# Begin Source File
SOURCE=.\src\base\abci\abcHaig.c
# End Source File
# Begin Source File
SOURCE=.\src\base\abci\abcIf.c
# End Source File
# Begin Source File
......
......@@ -30,7 +30,6 @@ alias fs fraig_sweep
alias fsto fraig_store
alias fres fraig_restore
alias ft fraig_trust
alias ifs if -s
alias pex print_exdc -d
alias pf print_factor
alias pfan print_fanio
......@@ -68,6 +67,7 @@ alias rs resub
alias rsz resub -z
alias sa set autoexec ps
alias scl scleanup
alias sif if -s
alias so source -x
alias st strash
alias sw sweep
......@@ -117,13 +117,25 @@ alias fflitmin "compress2rs; ren; sop; ps -f"
#alias t "rvl th/lib.v; rvv th/t2.v"
#alias t "so c/pure_sat/test.c"
#alias t "r c/14/csat_998.bench; st; ps"
alias t0 "r res.blif; aig; mfs"
alias t "r res2.blif; aig; mfs"
#alias t0 "r res.blif; aig; mfs"
#alias t "r res2.blif; aig; mfs"
alias tt "r a/quip_opt/nut_001_opt.blif"
alias ttb "wh a/quip_opt/nut_001_opt.blif 1.blif"
alias ttv "wh a/quip_opt/nut_001_opt.blif 1.v"
#alias tt "r a/quip_opt/nut_001_opt.blif"
#alias ttb "wh a/quip_opt/nut_001_opt.blif 1.blif"
#alias ttv "wh a/quip_opt/nut_001_opt.blif 1.v"
alias reach "st; ps; compress2; ps; qrel; ps; compress2; ps; qreach -v; ps"
alias t "r c.blif; st; haig_start; resyn; haig_use"
alias tt "r i10.blif; st; haig_start; resyn2; haig_use"
alias reach "st; ps; compress2; ps; qrel; ps; compress2; ps; qreach -v; ps"
alias qs1 "qvar -I 96 -u; ps; qbf -P 96"
alias qs2 "qvar -I 96 -u; qvar -I 97 -u; ps; qbf -P 96"
alias qs3 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; ps; qbf -P 96"
alias qs4 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; ps; qbf -P 96"
alias qs5 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; ps; qbf -P 96"
alias qs6 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; ps; qbf -P 96"
alias qs7 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; qvar -I 102 -u; ps; qbf -P 96"
alias qs8 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; qvar -I 102 -u; qvar -I 103 -u; ps; qbf -P 96"
alias qs9 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; qvar -I 102 -u; qvar -I 103 -u; qvar -I 104 -u; ps; qbf -P 96"
alias qsA "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; qvar -I 102 -u; qvar -I 103 -u; qvar -I 104 -u; qvar -I 105 -u; ps; qbf -P 96"
......@@ -61,9 +61,10 @@ typedef enum {
} Hop_Type_t;
// the AIG node
struct Hop_Obj_t_ // 4 words
struct Hop_Obj_t_ // 6 words
{
void * pData; // misc
Hop_Obj_t * pNext; // strashing table
Hop_Obj_t * pFanin0; // fanin
Hop_Obj_t * pFanin1; // fanin
unsigned long Type : 3; // object type
......@@ -71,6 +72,7 @@ struct Hop_Obj_t_ // 4 words
unsigned long fMarkA : 1; // multipurpose mask
unsigned long fMarkB : 1; // multipurpose mask
unsigned long nRefs : 26; // reference count (level)
int Id; // unique ID of the node
};
// the AIG manager
......@@ -79,6 +81,7 @@ struct Hop_Man_t_
// AIG nodes
Vec_Ptr_t * vPis; // the array of PIs
Vec_Ptr_t * vPos; // the array of POs
Vec_Ptr_t * vNodes; // the array of all nodes (optional)
Hop_Obj_t * pConst1; // the constant 1 node
Hop_Obj_t Ghost; // the ghost node
// AIG node counters
......@@ -181,6 +184,7 @@ static inline Hop_Obj_t * Hop_ObjChild0Copy( Hop_Obj_t * pObj ) { assert( !Hop_
static inline Hop_Obj_t * Hop_ObjChild1Copy( Hop_Obj_t * pObj ) { assert( !Hop_IsComplement(pObj) ); return Hop_ObjFanin1(pObj)? Hop_NotCond(Hop_ObjFanin1(pObj)->pData, Hop_ObjFaninC1(pObj)) : NULL; }
static inline int Hop_ObjLevel( Hop_Obj_t * pObj ) { return pObj->nRefs; }
static inline int Hop_ObjLevelNew( Hop_Obj_t * pObj ) { return 1 + Hop_ObjIsExor(pObj) + AIG_MAX(Hop_ObjFanin0(pObj)->nRefs, Hop_ObjFanin1(pObj)->nRefs); }
static inline int Hop_ObjFaninPhase( Hop_Obj_t * pObj ) { return Hop_IsComplement(pObj)? !Hop_Regular(pObj)->fPhase : pObj->fPhase; }
static inline void Hop_ObjClean( Hop_Obj_t * pObj ) { memset( pObj, 0, sizeof(Hop_Obj_t) ); }
static inline int Hop_ObjWhatFanin( Hop_Obj_t * pObj, Hop_Obj_t * pFanin )
{
......@@ -219,6 +223,12 @@ static inline Hop_Obj_t * Hop_ManFetchMemory( Hop_Man_t * p )
pTemp = p->pListFree;
p->pListFree = *((Hop_Obj_t **)pTemp);
memset( pTemp, 0, sizeof(Hop_Obj_t) );
if ( p->vNodes )
{
assert( p->nCreated == Vec_PtrSize(p->vNodes) );
Vec_PtrPush( p->vNodes, pTemp );
}
pTemp->Id = p->nCreated++;
return pTemp;
}
static inline void Hop_ManRecycleMemory( Hop_Man_t * p, Hop_Obj_t * pEntry )
......@@ -279,6 +289,8 @@ extern void Hop_ObjConnect( Hop_Man_t * p, Hop_Obj_t * pObj, Hop_Obj_
extern void Hop_ObjDisconnect( Hop_Man_t * p, Hop_Obj_t * pObj );
extern void Hop_ObjDelete( Hop_Man_t * p, Hop_Obj_t * pObj );
extern void Hop_ObjDelete_rec( Hop_Man_t * p, Hop_Obj_t * pObj );
extern Hop_Obj_t * Hop_ObjRepr( Hop_Obj_t * pObj );
extern void Hop_ObjCreateChoice( Hop_Obj_t * pOld, Hop_Obj_t * pNew );
/*=== aigOper.c =========================================================*/
extern Hop_Obj_t * Hop_IthVar( Hop_Man_t * p, int i );
extern Hop_Obj_t * Hop_Oper( Hop_Man_t * p, Hop_Obj_t * p0, Hop_Obj_t * p1, Hop_Type_t Type );
......
......@@ -97,6 +97,7 @@ void Hop_ManStop( Hop_Man_t * p )
if ( p->vChunks ) Hop_ManStopMemory( p );
if ( p->vPis ) Vec_PtrFree( p->vPis );
if ( p->vPos ) Vec_PtrFree( p->vPos );
if ( p->vNodes ) Vec_PtrFree( p->vNodes );
free( p->pTable );
free( p );
}
......
......@@ -46,7 +46,6 @@ Hop_Obj_t * Hop_ObjCreatePi( Hop_Man_t * p )
pObj->Type = AIG_PI;
Vec_PtrPush( p->vPis, pObj );
p->nObjs[AIG_PI]++;
p->nCreated++;
return pObj;
}
......@@ -73,9 +72,10 @@ Hop_Obj_t * Hop_ObjCreatePo( Hop_Man_t * p, Hop_Obj_t * pDriver )
Hop_ObjRef( Hop_Regular(pDriver) );
else
pObj->nRefs = Hop_ObjLevel( Hop_Regular(pDriver) );
// set the phase
// pObj->fPhase = Hop_ObjFaninPhase(pDriver);
// update node counters of the manager
p->nObjs[AIG_PO]++;
p->nCreated++;
return pObj;
}
......@@ -103,7 +103,7 @@ Hop_Obj_t * Hop_ObjCreate( Hop_Man_t * p, Hop_Obj_t * pGhost )
Hop_ObjConnect( p, pObj, pGhost->pFanin0, pGhost->pFanin1 );
// update node counters of the manager
p->nObjs[Hop_ObjType(pObj)]++;
p->nCreated++;
assert( pObj->pData == NULL );
return pObj;
}
......@@ -135,6 +135,8 @@ void Hop_ObjConnect( Hop_Man_t * p, Hop_Obj_t * pObj, Hop_Obj_t * pFan0, Hop_Obj
}
else
pObj->nRefs = Hop_ObjLevelNew( pObj );
// set the phase
// pObj->fPhase = Hop_ObjFaninPhase(pFan0) & Hop_ObjFaninPhase(pFan1);
// add the node to the structural hash table
Hop_TableInsert( p, pObj );
}
......@@ -221,6 +223,46 @@ void Hop_ObjDelete_rec( Hop_Man_t * p, Hop_Obj_t * pObj )
Hop_ObjDelete_rec( p, pFanin1 );
}
/**Function*************************************************************
Synopsis [Returns the representative of the node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Obj_t * Hop_ObjRepr( Hop_Obj_t * pObj )
{
if ( Hop_Regular(pObj)->pData == NULL )
return Hop_Regular(pObj);
return Hop_ObjRepr( Hop_Regular(pObj)->pData );
}
/**Function*************************************************************
Synopsis [Sets an equivalence relation between the nodes.]
Description [Makes the representative of pNew point to the representaive of pOld.]
SideEffects []
SeeAlso []
***********************************************************************/
void Hop_ObjCreateChoice( Hop_Obj_t * pOld, Hop_Obj_t * pNew )
{
Hop_Obj_t * pOldRepr;
Hop_Obj_t * pNewRepr;
assert( pOld != NULL && pNew != NULL );
pOldRepr = Hop_ObjRepr(pOld);
pNewRepr = Hop_ObjRepr(pNew);
if ( pNewRepr != pOldRepr )
pNewRepr->pData = pOldRepr;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
......@@ -166,6 +166,7 @@ struct Abc_Obj_t_ // 12 words
void * pData; // the network specific data (SOP, BDD, gate, equiv class, etc)
Abc_Obj_t * pNext; // the next pointer in the hash table
Abc_Obj_t * pCopy; // the copy of this object
Hop_Obj_t * pEquiv; // pointer to the HAIG node
};
struct Abc_Ntk_t_
......@@ -210,6 +211,7 @@ struct Abc_Ntk_t_
Abc_Ntk_t * pExdc; // the EXDC network (if given)
void * pData; // misc
Abc_Ntk_t * pCopy;
Hop_Man_t * pHaig; // history AIG
// node attributes
Vec_Ptr_t * vAttrs; // managers of various node attributes (node functionality, global BDDs, etc)
};
......@@ -254,6 +256,7 @@ static inline void Abc_InfoAnd( unsigned * p, unsigned * q, int nWords )
static inline void Abc_InfoOr( unsigned * p, unsigned * q, int nWords ) { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] |= q[i]; }
static inline void Abc_InfoXor( unsigned * p, unsigned * q, int nWords ) { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] ^= q[i]; }
static inline int Abc_InfoIsOrOne( unsigned * p, unsigned * q, int nWords ){ int i; for ( i = nWords - 1; i >= 0; i-- ) if ( ~(p[i] | q[i]) ) return 0; return 1; }
static inline int Abc_InfoIsOrOne3( unsigned * p, unsigned * q, unsigned * r, int nWords ){ int i; for ( i = nWords - 1; i >= 0; i-- ) if ( ~(p[i] | q[i] | r[i]) ) return 0; return 1; }
// checking the network type
static inline bool Abc_NtkIsNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_NETLIST; }
......@@ -347,7 +350,8 @@ static inline Vec_Int_t * Abc_ObjFanoutVec( Abc_Obj_t * pObj ) { return &p
static inline Abc_Obj_t * Abc_ObjCopy( Abc_Obj_t * pObj ) { return pObj->pCopy; }
static inline Abc_Ntk_t * Abc_ObjNtk( Abc_Obj_t * pObj ) { return pObj->pNtk; }
static inline void * Abc_ObjData( Abc_Obj_t * pObj ) { return pObj->pData; }
static inline Abc_Obj_t * Abc_ObjEquiv( Abc_Obj_t * pObj ) { return Abc_ObjRegular(pObj)->pCopy? Abc_ObjNotCond(Abc_ObjRegular(pObj)->pCopy, Abc_ObjIsComplement(pObj)) : NULL; }
static inline Hop_Obj_t * Abc_ObjEquiv( Abc_Obj_t * pObj ) { return pObj->pEquiv; }
static inline Abc_Obj_t * Abc_ObjCopyCond( Abc_Obj_t * pObj ) { return Abc_ObjRegular(pObj)->pCopy? Abc_ObjNotCond(Abc_ObjRegular(pObj)->pCopy, Abc_ObjIsComplement(pObj)) : NULL; }
// setting data members of the network
static inline void Abc_ObjSetCopy( Abc_Obj_t * pObj, Abc_Obj_t * pCopy ) { pObj->pCopy = pCopy; }
......@@ -398,6 +402,8 @@ static inline Abc_Obj_t * Abc_ObjChild0Copy( Abc_Obj_t * pObj ) { return Ab
static inline Abc_Obj_t * Abc_ObjChild1Copy( Abc_Obj_t * pObj ) { return Abc_ObjNotCond( Abc_ObjFanin1(pObj)->pCopy, Abc_ObjFaninC1(pObj) ); }
static inline Abc_Obj_t * Abc_ObjChild0Data( Abc_Obj_t * pObj ) { return Abc_ObjNotCond( Abc_ObjFanin0(pObj)->pData, Abc_ObjFaninC0(pObj) ); }
static inline Abc_Obj_t * Abc_ObjChild1Data( Abc_Obj_t * pObj ) { return Abc_ObjNotCond( Abc_ObjFanin1(pObj)->pData, Abc_ObjFaninC1(pObj) ); }
static inline Hop_Obj_t * Abc_ObjChild0Equiv( Abc_Obj_t * pObj ) { return Hop_NotCond( Abc_ObjFanin0(pObj)->pEquiv, Abc_ObjFaninC0(pObj) ); }
static inline Hop_Obj_t * Abc_ObjChild1Equiv( Abc_Obj_t * pObj ) { return Hop_NotCond( Abc_ObjFanin1(pObj)->pEquiv, Abc_ObjFaninC1(pObj) ); }
// checking the AIG node types
static inline bool Abc_AigNodeIsConst( Abc_Obj_t * pNode ) { assert(Abc_NtkIsStrash(Abc_ObjRegular(pNode)->pNtk)); return Abc_ObjRegular(pNode)->Type == ABC_OBJ_CONST1; }
......@@ -615,6 +621,10 @@ extern int Abc_NtkMapToSop( Abc_Ntk_t * pNtk );
extern int Abc_NtkToSop( Abc_Ntk_t * pNtk, int fDirect );
extern int Abc_NtkToBdd( Abc_Ntk_t * pNtk );
extern int Abc_NtkToAig( Abc_Ntk_t * pNtk );
/*=== abcHaig.c ==========================================================*/
extern int Abc_NtkHaigStart( Abc_Ntk_t * pNtk );
extern int Abc_NtkHaigStop( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkHaigUse( Abc_Ntk_t * pNtk );
/*=== abcHie.c ==========================================================*/
extern Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk );
......
......@@ -331,6 +331,9 @@ Abc_Obj_t * Abc_AigAndCreate( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 )
// add the node to the list of updated nodes
if ( pMan->vAddedCells )
Vec_PtrPush( pMan->vAddedCells, pAnd );
// create HAIG
if ( pAnd->pNtk->pHaig )
pAnd->pEquiv = Hop_And( pAnd->pNtk->pHaig, Abc_ObjChild0Equiv(pAnd), Abc_ObjChild1Equiv(pAnd) );
return pAnd;
}
......@@ -371,6 +374,9 @@ Abc_Obj_t * Abc_AigAndCreateFrom( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t *
// add the node to the list of updated nodes
// if ( pMan->vAddedCells )
// Vec_PtrPush( pMan->vAddedCells, pAnd );
// create HAIG
if ( pAnd->pNtk->pHaig )
pAnd->pEquiv = Hop_And( pAnd->pNtk->pHaig, Abc_ObjChild0Equiv(pAnd), Abc_ObjChild1Equiv(pAnd) );
return pAnd;
}
......@@ -812,6 +818,9 @@ void Abc_AigReplace( Abc_Aig_t * pMan, Abc_Obj_t * pOld, Abc_Obj_t * pNew, bool
Vec_PtrPush( pMan->vStackReplaceOld, pOld );
Vec_PtrPush( pMan->vStackReplaceNew, pNew );
assert( !Abc_ObjIsComplement(pOld) );
// create HAIG
if ( pOld->pNtk->pHaig )
Hop_ObjCreateChoice( pOld->pEquiv, Abc_ObjRegular(pNew)->pEquiv );
// process the replacements
while ( Vec_PtrSize(pMan->vStackReplaceOld) )
{
......
......@@ -52,7 +52,7 @@ int Abc_NtkSopToBdd( Abc_Ntk_t * pNtk )
Abc_Obj_t * pNode;
DdManager * dd;
int nFaninsMax, i;
assert( Abc_NtkHasSop(pNtk) );
// start the functionality manager
......
......@@ -256,7 +256,7 @@ Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk )
pNtkNew = Abc_NtkAlloc( pNtk->ntkType, pNtk->ntkFunc, 1 );
// duplicate the name and the spec
pNtkNew->pName = Extra_UtilStrsav( pNtk->pName );
// pNtkNew->pSpec = Extra_UtilStrsav( pNtk->pSpec );
pNtkNew->pSpec = Extra_UtilStrsav( pNtk->pSpec );
// clean the node copy fields
Abc_NtkCleanCopy( pNtk );
......
......@@ -420,9 +420,9 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk )
nDigits = Extra_Base10Log( Abc_NtkLatchNum(pNtk) );
Abc_NtkForEachLatch( pNtk, pObj, i )
{
Abc_ObjAssignName( pObj, Abc_ObjNameDummy("L", i, nDigits), NULL );
Abc_ObjAssignName( Abc_ObjFanin0(pObj), Abc_ObjNameDummy("Li", i, nDigits), NULL );
Abc_ObjAssignName( Abc_ObjFanout0(pObj), Abc_ObjNameDummy("Lo", i, nDigits), NULL );
Abc_ObjAssignName( pObj, Abc_ObjNameDummy("l", i, nDigits), NULL );
Abc_ObjAssignName( Abc_ObjFanin0(pObj), Abc_ObjNameDummy("li", i, nDigits), NULL );
Abc_ObjAssignName( Abc_ObjFanout0(pObj), Abc_ObjNameDummy("lo", i, nDigits), NULL );
}
/*
nDigits = Extra_Base10Log( Abc_NtkBlackboxNum(pNtk) );
......
......@@ -792,6 +792,9 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
int LargePiece = (4 << ABC_NUM_STEPS);
if ( pNtk == NULL )
return;
// free the HAIG
if ( pNtk->pHaig )
Abc_NtkHaigStop( pNtk );
// free EXDC Ntk
if ( pNtk->pExdc )
Abc_NtkDelete( pNtk->pExdc );
......
......@@ -365,6 +365,9 @@ Abc_Obj_t * Abc_NtkDupObj( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj, int fCopyName
}
else if ( Abc_ObjIsLatch(pObj) ) // copy the reset value
pObjNew->pData = pObj->pData;
// transfer HAIG
// pObjNew->pEquiv = pObj->pEquiv;
// remember the new node in the old node
pObj->pCopy = pObjNew;
return pObjNew;
}
......
......@@ -1452,7 +1452,7 @@ void Abc_NtkTransferCopy( Abc_Ntk_t * pNtk )
int i;
Abc_NtkForEachObj( pNtk, pObj, i )
if ( !Abc_ObjIsNet(pObj) )
pObj->pCopy = pObj->pCopy? Abc_ObjEquiv(pObj->pCopy) : NULL;
pObj->pCopy = pObj->pCopy? Abc_ObjCopyCond(pObj->pCopy) : NULL;
}
......@@ -1469,7 +1469,8 @@ void Abc_NtkTransferCopy( Abc_Ntk_t * pNtk )
***********************************************************************/
static inline int Abc_ObjCrossCutInc( Abc_Obj_t * pObj )
{
pObj->pCopy = (void *)(((int)pObj->pCopy)++);
// pObj->pCopy = (void *)(((int)pObj->pCopy)++);
((char*)pObj->pCopy)++;
return (int)pObj->pCopy == Abc_ObjFanoutNum(pObj);
}
......@@ -1563,7 +1564,7 @@ int Abc_NtkCrossCut( Abc_Ntk_t * pNtk )
void Abc_NtkPrint256()
{
FILE * pFile;
int i;
unsigned i;
pFile = fopen( "4varfs.txt", "w" );
for ( i = 1; i < (1<<16)-1; i++ )
{
......
......@@ -49,6 +49,7 @@ static Vec_Ptr_t * Abc_NodeBalanceConeExor( Abc_Obj_t * pNode );
***********************************************************************/
Abc_Ntk_t * Abc_NtkBalance( Abc_Ntk_t * pNtk, bool fDuplicate, bool fSelective, bool fUpdateLevel )
{
extern void Abc_NtkHaigTranfer( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkNew );
Abc_Ntk_t * pNtkAig;
assert( Abc_NtkIsStrash(pNtk) );
// compute the required times
......@@ -59,6 +60,9 @@ Abc_Ntk_t * Abc_NtkBalance( Abc_Ntk_t * pNtk, bool fDuplicate, bool fSelective,
}
// perform balancing
pNtkAig = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
// transfer HAIG
Abc_NtkHaigTranfer( pNtk, pNtkAig );
// perform balancing
Abc_NtkBalancePerform( pNtk, pNtkAig, fDuplicate, fSelective, fUpdateLevel );
Abc_NtkFinalize( pNtk, pNtkAig );
// undo the required times
......@@ -267,6 +271,9 @@ Abc_Obj_t * Abc_NodeBalance_rec( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNodeOld, Vec_
// if ( Abc_ObjRegular(pNodeOld->pCopy) == Abc_AigConst1(pNtkNew) )
// printf( "Constant node\n" );
// assert( pNodeOld->Level >= Abc_ObjRegular(pNodeOld->pCopy)->Level );
// update HAIG
if ( Abc_ObjRegular(pNodeOld->pCopy)->pNtk->pHaig )
Hop_ObjCreateChoice( pNodeOld->pEquiv, Abc_ObjRegular(pNodeOld->pCopy)->pEquiv );
return pNodeOld->pCopy;
}
......
......@@ -360,6 +360,150 @@ void Abc_GenMesh( char * pFileName, int nVars )
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_WriteKLut( FILE * pFile, int nLutSize )
{
int i, iVar, iNext, nPars = (1 << nLutSize);
fprintf( pFile, "\n" );
fprintf( pFile, ".model lut%d\n", nLutSize );
fprintf( pFile, ".inputs" );
for ( i = 0; i < nPars; i++ )
fprintf( pFile, " p%02d", i );
fprintf( pFile, "\n" );
fprintf( pFile, ".inputs" );
for ( i = 0; i < nLutSize; i++ )
fprintf( pFile, " i%d", i );
fprintf( pFile, "\n" );
fprintf( pFile, ".outputs o\n" );
fprintf( pFile, ".names n01 o\n" );
fprintf( pFile, "1 1\n" );
// write internal MUXes
iVar = 0;
iNext = 2;
for ( i = 1; i < nPars; i++ )
{
if ( i == iNext )
{
iNext *= 2;
iVar++;
}
if ( iVar == nLutSize - 1 )
fprintf( pFile, ".names i%d p%02d p%02d n%02d\n", iVar, 2*(i-nPars/2), 2*(i-nPars/2)+1, i );
else
fprintf( pFile, ".names i%d n%02d n%02d n%02d\n", iVar, 2*i, 2*i+1, i );
fprintf( pFile, "01- 1\n" );
fprintf( pFile, "1-1 1\n" );
}
fprintf( pFile, ".end\n" );
fprintf( pFile, "\n" );
}
/**Function*************************************************************
Synopsis [Generates structure of L K-LUTs implementing an N-var function.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_GenFpga( char * pFileName, int nLutSize, int nLuts, int nVars )
{
FILE * pFile;
int nVarsLut = (1 << nLutSize); // the number of LUT variables
int nVarsLog = Extra_Base2Log( nVars + nLuts - 1 ); // the number of encoding vars
int nVarsDeg = (1 << nVarsLog); // the number of LUT variables (total)
int nParsLut = nLuts * (1 << nLutSize); // the number of LUT params
int nParsVar = nLuts * nLutSize * nVarsLog; // the number of var params
int i, j, k;
assert( nVars > 0 );
pFile = fopen( pFileName, "w" );
fprintf( pFile, "# Structure with %d %d-LUTs for %d-var function generated by ABC on %s\n", nLuts, nLutSize, nVars, Extra_TimeStamp() );
fprintf( pFile, ".model struct%dx%d_%d\n", nLuts, nLutSize, nVars );
fprintf( pFile, ".inputs" );
for ( i = 0; i < nParsLut; i++ )
fprintf( pFile, " pl%02d", i );
fprintf( pFile, "\n" );
fprintf( pFile, ".inputs" );
for ( i = 0; i < nParsVar; i++ )
fprintf( pFile, " pv%02d", i );
fprintf( pFile, "\n" );
fprintf( pFile, ".inputs" );
for ( i = 0; i < nVars; i++ )
fprintf( pFile, " v%02d", i );
fprintf( pFile, "\n" );
fprintf( pFile, ".outputs" );
fprintf( pFile, " v%02d", nVars + nLuts - 1 );
fprintf( pFile, "\n" );
fprintf( pFile, ".names Gnd\n" );
fprintf( pFile, " 0\n" );
// generate LUTs
for ( i = 0; i < nLuts; i++ )
{
fprintf( pFile, ".subckt lut%d", nLutSize );
// generate config parameters
for ( k = 0; k < nVarsLut; k++ )
fprintf( pFile, " p%02d=pl%02d", k, i * nVarsLut + k );
// generate the inputs
for ( k = 0; k < nLutSize; k++ )
fprintf( pFile, " i%d=s%02d", k, i * nLutSize + k );
// generate the output
fprintf( pFile, " o=v%02d", nVars + i );
fprintf( pFile, "\n" );
}
// generate LUT inputs
for ( i = 0; i < nLuts; i++ )
{
for ( j = 0; j < nLutSize; j++ )
{
fprintf( pFile, ".subckt lut%d", nVarsLog );
// generate config parameters
for ( k = 0; k < nVarsDeg; k++ )
{
if ( k < nVars + nLuts - 1 && k < nVars + i )
fprintf( pFile, " p%02d=v%02d", k, k );
else
fprintf( pFile, " p%02d=Gnd", k );
}
// generate the inputs
for ( k = 0; k < nVarsLog; k++ )
fprintf( pFile, " i%d=pv%02d", k, (i * nLutSize + j) * nVarsLog + k );
// generate the output
fprintf( pFile, " o=s%02d", i * nLutSize + j );
fprintf( pFile, "\n" );
}
}
fprintf( pFile, ".end\n" );
fprintf( pFile, "\n" );
// generate LUTs
Abc_WriteKLut( pFile, nLutSize );
if ( nVarsLog != nLutSize )
Abc_WriteKLut( pFile, nVarsLog );
fclose( pFile );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
......@@ -24,7 +24,7 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
#define ABC_DC_MAX_NODES (1<<14)
#define ABC_DC_MAX_NODES (1<<15)
typedef unsigned short Odc_Lit_t;
......@@ -416,7 +416,7 @@ void Abc_NtkDontCareWinCollectRoots( Odc_Man_t * p )
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
int Abc_NtkDontCareWinAddMissing_rec( Odc_Man_t * p, Abc_Obj_t * pObj )
......
......@@ -33,6 +33,8 @@
int s_MappingTime = 0;
int s_MappingMem = 0;
int s_ResubTime = 0;
int s_ResynTime = 0;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......@@ -147,20 +149,27 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
fprintf( pTable, "\n" );
fclose( pTable );
}
*/
*/
/*
// print the statistic into a file
{
FILE * pTable;
pTable = fopen( "a/fpga_stats.txt", "a+" );
pTable = fopen( "x/stats_new.txt", "a+" );
fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", Abc_NtkLevel(pNtk) );
fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkPiNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkPoNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkLevel(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkNodeNum(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkGetTotalFanins(pNtk) );
// fprintf( pTable, "%d ", Abc_NtkLatchNum(pNtk) );
// fprintf( pTable, "%.2f ", (float)(s_MappingMem)/(float)(1<<20) );
// fprintf( pTable, "%.2f", (float)(s_MappingTime)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "%.2f", (float)(s_MappingTime)/(float)(CLOCKS_PER_SEC) );
// fprintf( pTable, "%.2f", (float)(s_ResynTime)/(float)(CLOCKS_PER_SEC) );
fprintf( pTable, "\n" );
fclose( pTable );
s_ResynTime = 0;
}
*/
......
......@@ -118,6 +118,7 @@ extern void Abc_NtkDontCareClear( void * p );
extern void Abc_NtkDontCareFree( void * p );
extern int Abc_NtkDontCareCompute( void * p, Abc_Obj_t * pNode, Vec_Ptr_t * vLeaves, unsigned * puTruth );
extern int s_ResubTime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......@@ -261,6 +262,7 @@ pManRes->timeTotal = clock() - clkStart;
printf( "Abc_NtkRefactor: The network check has failed.\n" );
return 0;
}
s_ResubTime = clock() - clkStart;
return 1;
}
......
......@@ -60,7 +60,7 @@ Abc_Ntk_t * Abc_NtkRestrash( Abc_Ntk_t * pNtk, bool fCleanup )
// restrash the nodes (assuming a topological order of the old network)
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = Abc_AigAnd( pNtkAig->pManFunc, Abc_ObjChild0Copy(pObj), Abc_ObjChild1Copy(pObj) );
//l finalize the network
// finalize the network
Abc_NtkFinalize( pNtk, pNtkAig );
// print warning about self-feed latches
// if ( Abc_NtkCountSelfFeedLatches(pNtkAig) )
......
......@@ -603,10 +603,14 @@ void Abc_NtkVerifyReportError( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int * pMode
Abc_NtkForEachCi( pNtk1, pNode, i )
pNode->pCopy = (void*)i;
// print the model
Vec_PtrForEachEntry( vNodes, pNode, i )
pNode = Vec_PtrEntry( vNodes, 0 );
if ( Abc_ObjIsCi(pNode) )
{
assert( Abc_ObjIsCi(pNode) );
printf( " %s=%d", Abc_ObjName(pNode), pModel[(int)pNode->pCopy] );
Vec_PtrForEachEntry( vNodes, pNode, i )
{
assert( Abc_ObjIsCi(pNode) );
printf( " %s=%d", Abc_ObjName(pNode), pModel[(int)pNode->pCopy] );
}
}
printf( "\n" );
Vec_PtrFree( vNodes );
......
......@@ -17,6 +17,7 @@ SRC += src/base/abci/abc.c \
src/base/abci/abcFraig.c \
src/base/abci/abcFxu.c \
src/base/abci/abcGen.c \
src/base/abci/abcHaig.c \
src/base/abci/abcIf.c \
src/base/abci/abcIvy.c \
src/base/abci/abcLut.c \
......
......@@ -877,6 +877,7 @@ int IoCommandReadVerLib( Abc_Frame_t * pAbc, int argc, char ** argv )
FILE * pFile;
int fCheck;
int c;
extern Abc_Lib_t * Ver_ParseFile( char * pFileName, Abc_Lib_t * pGateLib, int fCheck, int fUseMemMan );
fCheck = 1;
Extra_UtilGetoptReset();
......
......@@ -86,7 +86,7 @@ Abc_Ntk_t * Io_ReadBenchNetwork( Extra_FileReader_t * p )
Vec_Str_t * vString;
unsigned uTruth[8];
char * pType, ** ppNames, * pString;
int iLine, nNames;
int iLine, nNames, nDigits, fLutsPresent = 0;
// allocate the empty network
pNtk = Abc_NtkStartRead( Extra_FileReaderGetFileName(p) );
......@@ -122,6 +122,7 @@ Abc_Ntk_t * Io_ReadBenchNetwork( Extra_FileReader_t * p )
}
else if ( strcmp(pType, "LUT") == 0 )
{
fLutsPresent = 1;
ppNames = (char **)vTokens->pArray + 3;
nNames = vTokens->nSize - 3;
// check the number of inputs
......@@ -142,6 +143,18 @@ Abc_Ntk_t * Io_ReadBenchNetwork( Extra_FileReader_t * p )
return NULL;
}
pString += 2;
// pad the string with zero's if needed
nDigits = (1 << nNames) / 4;
if ( nDigits == 0 )
nDigits = 1;
if ( strlen(pString) < (unsigned)nDigits )
{
Vec_StrFill( vString, nDigits - strlen(pString), '0' );
Vec_StrPrintStr( vString, pString );
Vec_StrPush( vString, 0 );
pString = Vec_StrArray( vString );
}
// read the hex number from the string
if ( !Extra_ReadHexadecimal( uTruth, pString, nNames ) )
{
printf( "%s: Reading hexadecimal number (%s) has failed.\n", Extra_FileReaderGetFileName(p), pString );
......@@ -229,6 +242,23 @@ Abc_Ntk_t * Io_ReadBenchNetwork( Extra_FileReader_t * p )
// Io_ReadCreateConst( pNtk, "gnd", 0 );
Abc_NtkFinalizeRead( pNtk );
// if LUTs are present, collapse the truth tables into cubes
if ( fLutsPresent )
{
if ( !Abc_NtkToBdd(pNtk) )
{
printf( "Io_ReadBenchNetwork(): Converting to BDD has failed.\n" );
Abc_NtkDelete( pNtk );
return NULL;
}
if ( !Abc_NtkToSop(pNtk, 0) )
{
printf( "Io_ReadBenchNetwork(): Converting to SOP has failed.\n" );
Abc_NtkDelete( pNtk );
return NULL;
}
}
return pNtk;
}
......
......@@ -212,6 +212,8 @@ Abc_Ntk_t * Io_ReadBlifMv( char * pFileName, int fBlifMv, int fCheck )
Abc_NtkIsAcyclicHierarchy( pNtk );
//Io_WriteBlifMv( pNtk, "_temp_.mv" );
if ( pNtk->pSpec == NULL )
pNtk->pSpec = Extra_UtilStrsav( pFileName );
return pNtk;
}
......
......@@ -318,7 +318,7 @@ Abc_Obj_t * Ver_ParseFindNet( Abc_Ntk_t * pNtk, char * pName )
Abc_Obj_t * pObj;
if ( pObj = Abc_NtkFindNet(pNtk, pName) )
return pObj;
if ( !strcmp( pName, "1\'b0" ) )
if ( !strcmp( pName, "1\'b0" ) || !strcmp( pName, "1\'bx" ) )
return Abc_NtkFindOrCreateNet( pNtk, "1\'b0" );
if ( !strcmp( pName, "1\'b1" ) )
return Abc_NtkFindOrCreateNet( pNtk, "1\'b1" );
......@@ -749,18 +749,20 @@ int Ver_ParseConstant( Ver_Man_t * pMan, char * pWord )
Vec_PtrClear( pMan->vNames );
for ( i = 0; i < nBits; i++ )
{
if ( pWord[i] != '0' && pWord[i] != '1' )
{
sprintf( pMan->sError, "Having problem parsing the binary constant." );
Ver_ParsePrintErrorMessage( pMan );
return 0;
}
Vec_PtrPush( pMan->vNames, (void *)(pWord[i]-'0') );
if ( pWord[i] != '0' && pWord[i] != '1' && pWord[i] != 'x' )
{
sprintf( pMan->sError, "Having problem parsing the binary constant." );
Ver_ParsePrintErrorMessage( pMan );
return 0;
}
if ( pWord[i] == 'x' )
Vec_PtrPush( pMan->vNames, (void *)0 );
else
Vec_PtrPush( pMan->vNames, (void *)(pWord[i]-'0') );
}
return 1;
}
/**Function*************************************************************
Synopsis [Parses one directive.]
......@@ -1100,7 +1102,7 @@ int Ver_ParseAssign( Ver_Man_t * pMan, Abc_Ntk_t * pNtk )
return 0;
}
// set individual bits of the constant
// get individual bits of the constant
if ( !Ver_ParseConstant( pMan, pWord ) )
return 0;
// check that the constant has the same size
......@@ -1206,7 +1208,11 @@ int Ver_ParseAssign( Ver_Man_t * pMan, Abc_Ntk_t * pNtk )
else
{
// parse the formula
if ( fReduction )
if ( !strcmp(pEquation, "0") || !strcmp(pEquation, "1\'b0") || !strcmp(pEquation, "1\'bx") )
pFunc = Hop_ManConst0(pNtk->pManFunc);
else if ( !strcmp(pEquation, "1") || !strcmp(pEquation, "1\'b1") )
pFunc = Hop_ManConst1(pNtk->pManFunc);
else if ( fReduction )
pFunc = Ver_FormulaReduction( pEquation, pNtk->pManFunc, pMan->vNames, pMan->sError );
else
pFunc = Ver_FormulaParser( pEquation, pNtk->pManFunc, pMan->vNames, pMan->vStackFn, pMan->vStackOp, pMan->sError );
......
No preview for this file type
......@@ -24,6 +24,8 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
extern int s_MappingTime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
......@@ -133,6 +135,7 @@ int If_ManPerformMappingComb( If_Man_t * p )
PRT( "Total time", clock() - clkTotal );
}
// printf( "Cross cut memory = %d.\n", Mem_FixedReadMaxEntriesUsed(p->pMemSet) );
s_MappingTime = clock() - clkTotal;
return 1;
}
......
......@@ -24,6 +24,8 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
extern int s_MappingTime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
......@@ -186,15 +188,20 @@ int If_ManBinarySearchPeriod( If_Man_t * p )
p->nAttempts++;
// set LValues of of PIs to be 0 and other nodes to be -infinity
// LValues of the PIs are already set to 0
// undo any previous mapping, except for CIs
// reset initial LValues (PIs to 0; others to -inf)
If_ManForEachObj( p, pObj, i )
{
if ( If_ObjIsPi(pObj) || If_ObjIsConst1(pObj) )
{
If_ObjSetLValue( pObj, (float)0.0 );
If_ObjSetArrTime( pObj, (float)0.0 );
}
else
{
If_ObjSetLValue( pObj, (float)-IF_INFINITY );
If_ObjSetArrTime( pObj, (float)-IF_INFINITY );
}
// undo any previous mapping, except for CIs
if ( If_ObjIsAnd(pObj) )
If_ObjCutBest(pObj)->nLeaves = 0;
}
......@@ -368,6 +375,18 @@ int If_ManPerformMappingSeq( If_Man_t * p )
}
if ( p->pPars->fVerbose )
{
/*
{
FILE * pTable;
pTable = fopen( "iscas/stats_new.txt", "a+" );
// fprintf( pTable, "%s ", pNtk->pName );
fprintf( pTable, "%d ", p->Period );
// fprintf( pTable, "%.2f ", (float)(s_MappingMem)/(float)(1<<20) );
// fprintf( pTable, "%.2f", (float)(s_MappingTime)/(float)(CLOCKS_PER_SEC) );
// fprintf( pTable, "\n" );
fclose( pTable );
}
*/
printf( "The best clock period is %3d. ", p->Period );
PRT( "Sequential time", clock() - clkTotal );
}
......@@ -375,6 +394,7 @@ int If_ManPerformMappingSeq( If_Man_t * p )
// postprocess it using combinational mapping
If_ManPerformMappingSeqPost( p );
s_MappingTime = clock() - clkTotal;
return 1;
}
......
......@@ -143,7 +143,7 @@ float If_ManDelayMax( If_Man_t * p, int fSeq )
void If_ManComputeRequired( If_Man_t * p )
{
If_Obj_t * pObj;
int i;
int i, Counter;
// compute area, clean required times, collect nodes used in the mapping
p->nNets = 0;
......@@ -154,13 +154,19 @@ void If_ManComputeRequired( If_Man_t * p )
{
assert( !p->pPars->fAreaOnly );
// make sure that the required time hold
Counter = 0;
If_ManForEachCo( p, pObj, i )
{
if ( If_ObjArrTime(If_ObjFanin0(pObj)) > p->pPars->pTimesReq[i] + p->fEpsilon )
printf( "Required times are violated for output %d (arr = %d; req = %d).\n",
i, (int)If_ObjArrTime(If_ObjFanin0(pObj)), (int)p->pPars->pTimesReq[i] );
{
Counter++;
// printf( "Required times are violated for output %d (arr = %d; req = %d).\n",
// i, (int)If_ObjArrTime(If_ObjFanin0(pObj)), (int)p->pPars->pTimesReq[i] );
}
If_ObjFanin0(pObj)->Required = p->pPars->pTimesReq[i];
}
if ( Counter )
printf( "Required times are violated for %d outputs.\n", Counter );
}
else
{
......
......@@ -330,6 +330,8 @@ int Extra_ReadHexadecimal( unsigned Sign[], char * pString, int nVars )
Sign[k] = 0;
// read the number from the string
nDigits = (1 << nVars) / 4;
if ( nDigits == 0 )
nDigits = 1;
for ( k = 0; k < nDigits; k++ )
{
c = nDigits-1-k;
......
......@@ -42,6 +42,7 @@ struct Res_Par_t_
{
// general parameters
int nWindow; // window size
int nGrowthLevel; // the maximum allowed growth in level after one iteration of resynthesis
int nSimWords; // the number of simulation words
int nCands; // the number of candidates to try
int fArea; // performs optimization for area
......
......@@ -73,6 +73,8 @@ struct Res_Man_t_
extern Hop_Obj_t * Kit_GraphToHop( Hop_Man_t * pMan, Kit_Graph_t * pGraph );
extern int s_ResynTime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
......@@ -185,13 +187,14 @@ int Abc_NtkResynthesize( Abc_Ntk_t * pNtk, Res_Par_t * pPars )
Kit_Graph_t * pGraph;
Vec_Ptr_t * vFanins;
unsigned * puTruth;
int i, k, RetValue, nNodesOld, nFanins;
int i, k, RetValue, nNodesOld, nFanins, nFaninsMax;
int clk, clkTotal = clock();
// start the manager
p = Res_ManAlloc( pPars );
p->nTotalNets = Abc_NtkGetTotalFanins(pNtk);
p->nTotalNodes = Abc_NtkNodeNum(pNtk);
nFaninsMax = Abc_NtkGetFaninMax(pNtk);
// perform the network sweep
Abc_NtkSweep( pNtk, 0 );
......@@ -236,10 +239,10 @@ p->timeWin += clock() - clk;
Vec_PtrSize(p->pWin->vNodes),
Vec_PtrSize(p->pWin->vRoots) );
}
// collect the divisors
clk = clock();
Res_WinDivisors( p->pWin, pObj->Level + 2 ); //- 1 );
Res_WinDivisors( p->pWin, pObj->Level + pPars->nGrowthLevel - 1 );
p->timeDiv += clock() - clk;
p->nWins++;
......@@ -291,9 +294,9 @@ p->timeSim += clock() - clk;
// find resub candidates for the node
clk = clock();
if ( p->pPars->fArea )
RetValue = Res_FilterCandidatesArea( p->pWin, p->pAig, p->pSim, p->vResubs, p->vResubsW );
RetValue = Res_FilterCandidates( p->pWin, p->pAig, p->pSim, p->vResubs, p->vResubsW, nFaninsMax, 1 );
else
RetValue = Res_FilterCandidatesNets( p->pWin, p->pAig, p->pSim, p->vResubs, p->vResubsW );
RetValue = Res_FilterCandidates( p->pWin, p->pAig, p->pSim, p->vResubs, p->vResubsW, nFaninsMax, 0 );
p->timeCand += clock() - clk;
p->nCandSets += RetValue;
if ( RetValue == 0 )
......@@ -367,6 +370,7 @@ p->timeSatTotal = p->timeSatSat + p->timeSatUnsat + p->timeSatSim;
p->timeTotal = clock() - clkTotal;
Res_ManFree( p );
s_ResynTime += clock() - clkTotal;
// check the resulting network
if ( !Abc_NtkCheck( pNtk ) )
{
......
......@@ -124,6 +124,13 @@ void Res_WinDivisors( Res_Win_t * p, int nLevDivMax )
p->nDivsPlus++;
}
}
/*
printf( "Node level = %d. ", Abc_ObjLevel(p->pNode) );
Vec_PtrForEachEntryStart( p->vDivs, pObj, k, Vec_PtrSize(p->vDivs)-p->nDivsPlus )
printf( "%d ", Abc_ObjLevel(pObj) );
printf( "\n" );
*/
//printf( "%d ", p->nDivsPlus );
}
/**Function*************************************************************
......
......@@ -105,8 +105,8 @@ extern void Res_WinDivisors( Res_Win_t * p, int nLevDivMax );
extern void Res_WinSweepLeafTfo_rec( Abc_Obj_t * pObj, int nLevelLimit );
extern int Res_WinVisitMffc( Abc_Obj_t * pNode );
/*=== resFilter.c ==========================================================*/
extern int Res_FilterCandidatesNets( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pSim, Vec_Vec_t * vResubs, Vec_Vec_t * vResubsW );
extern int Res_FilterCandidatesArea( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pSim, Vec_Vec_t * vResubs, Vec_Vec_t * vResubsW );
extern int Res_FilterCandidates( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pSim, Vec_Vec_t * vResubs, Vec_Vec_t * vResubsW, int nFaninsMax, int fArea );
extern int Res_FilterCandidatesArea( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pSim, Vec_Vec_t * vResubs, Vec_Vec_t * vResubsW, int nFaninsMax );
/*=== resSat.c ==========================================================*/
extern void * Res_SatProveUnsat( Abc_Ntk_t * pAig, Vec_Ptr_t * vFanins );
extern int Res_SatSimulate( Res_Sim_t * p, int nPats, int fOnSet );
......
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