Commit 24f1ca07 by Alan Mishchenko

New parser and framework.

parent c30a0ca0
......@@ -14,7 +14,7 @@ PROG := abc
MODULES := \
$(wildcard src/ext*) \
src/base/abc src/base/abci src/base/cmd src/base/io \
src/base/main src/base/ver src/base/wlc src/base/test \
src/base/main src/base/ver src/base/wlc src/base/cba src/base/test \
src/bdd/cudd src/bdd/dsd src/bdd/epd src/bdd/mtr src/bdd/parse \
src/bdd/reo src/bdd/cas \
src/map/mapper src/map/mio src/map/super src/map/if \
......
......@@ -770,6 +770,58 @@ SOURCE=.\src\base\wlc\wlcReadVer.c
SOURCE=.\src\base\wlc\wlcWriteVer.c
# End Source File
# End Group
# Begin Group "cba"
# PROP Default_Filter ""
# Begin Source File
SOURCE=.\src\base\cba\cba.h
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaBlast.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaBuild.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaCom.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaLib.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaNtk.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaPrs.h
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaReadBlif.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaReadVer.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaSimple.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaWriteBlif.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaWriteVer.c
# End Source File
# End Group
# End Group
# Begin Group "bdd"
......
/**CFile****************************************************************
FileName [cba.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cba.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
/**CFile****************************************************************
FileName [cbaBlast.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaBlast.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
/**CFile****************************************************************
FileName [cbaLib.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaLib.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
/**CFile****************************************************************
FileName [cbaNtk.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaNtk.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
/**CFile****************************************************************
FileName [cbaPrs.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [External declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaPrs.h,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef ABC__base__prs__prs_h
#define ABC__base__prs__prs_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_HEADER_START
// parser objects (object types after parsing)
typedef enum {
CBA_PRS_NONE = 0, // 0: unused
CBA_PRS_NODE, // 1: .names/assign/box2 (box without formal/actual binding)
CBA_PRS_BOX, // 2: .subckt/.gate/box (box with formal/actual binding)
CBA_PRS_LATCH, // 3: .latch
CBA_PRS_CONCAT, // 4: concatenation
CBA_PRS_UNKNOWN // 5: unknown
} Cba_PrsType_t;
// node types during parsing
typedef enum {
CBA_NODE_NONE = 0, // 0: unused
CBA_NODE_CONST, // 1: constant
CBA_NODE_BUF, // 2: buffer
CBA_NODE_INV, // 3: inverter
CBA_NODE_AND, // 4: AND
CBA_NODE_OR, // 5: OR
CBA_NODE_XOR, // 6: XOR
CBA_NODE_NAND, // 7: NAND
CBA_NODE_NOR, // 8: NOR
CBA_NODE_XNOR, // 9 .XNOR
CBA_NODE_MUX, // 10: MUX
CBA_NODE_MAJ, // 11: MAJ
CBA_NODE_UNKNOWN // 12: unknown
} Cba_NodeType_t;
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
// parser
typedef struct Cba_Prs_t_ Cba_Prs_t;
struct Cba_Prs_t_
{
// input data
char * pName; // file name
char * pBuffer; // file contents
char * pLimit; // end of file
char * pCur; // current position
// construction
Cba_Man_t * pLibrary;
Cba_Man_t * pDesign;
// interface collected by the parser
int iModuleName; // name Id
Vec_Int_t * vInoutsCur; // inouts
Vec_Int_t * vInputsCur; // inputs
Vec_Int_t * vOutputsCur; // outputs
Vec_Int_t * vWiresCur; // wires
// objects collected by the parser
Vec_Int_t * vTypesCur; // Cba_PrsType_t
Vec_Int_t * vFuncsCur; // functions (node->func; box->module; gate->cell; latch->init; concat->unused)
Vec_Int_t * vInstIdsCur; // instance names
Vec_Wec_t * vFaninsCur; // instances
// temporary data
Vec_Str_t * vCover; // one SOP cover
Vec_Int_t * vTemp; // array of tokens
Vec_Int_t * vTemp2; // array of tokens
// error handling
char ErrorStr[1000]; // error
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
// create error message
static inline int Cba_PrsErrorSet( Cba_Prs_t * p, char * pError, int Value )
{
assert( !p->ErrorStr[0] );
sprintf( p->ErrorStr, pError );
return Value;
}
// print error message
static inline int Cba_PrsErrorPrint( Cba_Prs_t * p )
{
char * pThis; int iLine = 0;
if ( !p->ErrorStr[0] ) return 1;
for ( pThis = p->pBuffer; pThis < p->pCur; pThis++ )
iLine += (int)(*pThis == '\n');
printf( "Line %d: %s\n", iLine, p->ErrorStr );
return 0;
}
// copy contents to the vector
static inline void Cba_PrsSetupVecInt( Cba_Prs_t * p, Vec_Int_t * vTo, Vec_Int_t * vFrom )
{
if ( Vec_IntSize(vFrom) == 0 )
return;
vTo->nSize = vTo->nCap = Vec_IntSize(vFrom);
vTo->pArray = (int *)Mem_FlexEntryFetch( p->pDesign->pMem, sizeof(int) * Vec_IntSize(vFrom) );
memcpy( Vec_IntArray(vTo), Vec_IntArray(vFrom), sizeof(int) * Vec_IntSize(vFrom) );
Vec_IntClear( vFrom );
}
static inline Cba_Ntk_t * Cba_PrsAddCurrentModel( Cba_Prs_t * p, int iNameId )
{
Cba_Ntk_t * pNtk = Cba_NtkAlloc( p->pDesign, Abc_NamStr(p->pDesign->pNames, iNameId) );
assert( Vec_IntSize(p->vInputsCur) != 0 && Vec_IntSize(p->vOutputsCur) != 0 );
Cba_PrsSetupVecInt( p, &pNtk->vInouts, p->vInoutsCur );
Cba_PrsSetupVecInt( p, &pNtk->vInputs, p->vInputsCur );
Cba_PrsSetupVecInt( p, &pNtk->vOutputs, p->vOutputsCur );
Cba_PrsSetupVecInt( p, &pNtk->vWires, p->vWiresCur );
Cba_PrsSetupVecInt( p, &pNtk->vTypes, p->vTypesCur );
Cba_PrsSetupVecInt( p, &pNtk->vFuncs, p->vFuncsCur );
Cba_PrsSetupVecInt( p, &pNtk->vInstIds, p->vInstIdsCur );
pNtk->vFanins = *p->vFaninsCur;
Vec_WecZero( &pNtk->vFanins );
return pNtk;
}
static inline char * Cba_PrsLoadFile( char * pFileName, char ** ppLimit )
{
char * pBuffer;
int nFileSize, RetValue;
FILE * pFile = fopen( pFileName, "rb" );
if ( pFile == NULL )
{
printf( "Cannot open input file.\n" );
return NULL;
}
// get the file size, in bytes
fseek( pFile, 0, SEEK_END );
nFileSize = ftell( pFile );
// move the file current reading position to the beginning
rewind( pFile );
// load the contents of the file into memory
pBuffer = ABC_ALLOC( char, nFileSize + 3 );
pBuffer[0] = '\n';
RetValue = fread( pBuffer+1, nFileSize, 1, pFile );
// terminate the string with '\0'
pBuffer[nFileSize + 0] = '\n';
pBuffer[nFileSize + 1] = '\0';
*ppLimit = pBuffer + nFileSize + 2;
return pBuffer;
}
static inline Cba_Prs_t * Cba_PrsAlloc( char * pFileName )
{
Cba_Prs_t * p;
char * pBuffer, * pLimit;
pBuffer = Cba_PrsLoadFile( pFileName, &pLimit );
if ( pBuffer == NULL )
return NULL;
p = ABC_CALLOC( Cba_Prs_t, 1 );
p->pName = pFileName;
p->pBuffer = pBuffer;
p->pLimit = pLimit;
p->pCur = pBuffer;
p->pDesign = Cba_ManAlloc( pFileName );
// temporaries
p->vCover = Vec_StrAlloc( 1000 );
p->vTemp = Vec_IntAlloc( 1000 );
p->vTemp2 = Vec_IntAlloc( 1000 );
return p;
}
static inline void Cba_PrsFree( Cba_Prs_t * p )
{
if ( p->pDesign )
Cba_ManFree( p->pDesign );
Vec_IntFreeP( &p->vInoutsCur );
Vec_IntFreeP( &p->vInputsCur );
Vec_IntFreeP( &p->vOutputsCur );
Vec_IntFreeP( &p->vWiresCur );
Vec_IntFreeP( &p->vTypesCur );
Vec_IntFreeP( &p->vFuncsCur );
Vec_IntFreeP( &p->vInstIdsCur );
Vec_WecFreeP( &p->vFaninsCur );
// temporary
Vec_StrFreeP( &p->vCover );
Vec_IntFreeP( &p->vTemp );
Vec_IntFreeP( &p->vTemp2 );
ABC_FREE( p->pBuffer );
ABC_FREE( p );
}
////////////////////////////////////////////////////////////////////////
/// ITERATORS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== cba.c ========================================================*/
ABC_NAMESPACE_HEADER_END
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
/**CFile****************************************************************
FileName [cbaWriteBlif.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaWriteVer.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
#include "cbaPrs.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Writing parser state into a file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_PrsWriteBlifArray( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins, int fFirst )
{
int NameId, i;
Vec_IntForEachEntryStart( vFanins, NameId, i, fFirst )
fprintf( pFile, " %s", Cba_NtkStr(p, NameId) );
if ( fFirst )
fprintf( pFile, " %s", Cba_NtkStr(p, Vec_IntEntry(vFanins,0)) );
fprintf( pFile, "\n" );
}
void Cba_PrsWriteBlifArray2( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
{
int FormId, NameId, i;
assert( Vec_IntSize(vFanins) % 2 == 0 );
Vec_IntForEachEntryDouble( vFanins, FormId, NameId, i )
fprintf( pFile, " %s=%s", Cba_NtkStr(p, FormId), Cba_NtkStr(p, NameId) );
}
void Cba_PrsWriteBlifLines( FILE * pFile, Cba_Ntk_t * p )
{
Vec_Int_t * vFanins;
int Type, Func, i;
Cba_NtkForEachObjTypeFuncFanins( p, Type, Func, vFanins, i )
if ( Type == CBA_PRS_NODE ) // .names/assign/box2 (no formal/actual binding)
{
fprintf( pFile, ".names" );
Cba_PrsWriteBlifArray( pFile, p, vFanins, 1 );
fprintf( pFile, " %s", Cba_NtkStr(p, Func) );
}
else if ( Type == CBA_PRS_BOX ) // .names/assign/box2 (no formal/actual binding)
{
fprintf( pFile, ".subckt" );
fprintf( pFile, " %s", Cba_NtkFuncStr(p, Func) );
Cba_PrsWriteBlifArray2( pFile, p, vFanins );
}
else if ( Type == CBA_PRS_LATCH ) // .names/assign/box2 (no formal/actual binding)
{
fprintf( pFile, ".latch" );
fprintf( pFile, " %s", Cba_NtkFuncStr(p, Vec_IntEntry(vFanins, 1)) );
fprintf( pFile, " %s", Cba_NtkFuncStr(p, Vec_IntEntry(vFanins, 0)) );
fprintf( pFile, " %c\n", '0' + Func );
}
}
void Cba_PrsWriteBlifNtk( FILE * pFile, Cba_Ntk_t * p )
{
assert( Vec_IntSize(&p->vTypes) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFuncs) == Cba_NtkObjNum(p) );
// write header
fprintf( pFile, ".model %s\n", Cba_NtkName(p) );
fprintf( pFile, ".inouts" );
Cba_PrsWriteBlifArray( pFile, p, &p->vInouts, 0 );
fprintf( pFile, ".inputs" );
Cba_PrsWriteBlifArray( pFile, p, &p->vInputs, 0 );
fprintf( pFile, ".outputs" );
Cba_PrsWriteBlifArray( pFile, p, &p->vOutputs, 0 );
// write objects
Cba_PrsWriteBlifLines( pFile, p );
fprintf( pFile, ".end\n" );
}
void Cba_PrsWriteBlif( char * pFileName, Cba_Man_t * pDes )
{
FILE * pFile;
Cba_Ntk_t * pNtk;
int i;
pFile = fopen( pFileName, "wb" );
if ( pFile == NULL )
{
printf( "Cannot open output file \"%s\".\n", pFileName );
return;
}
fprintf( pFile, "// Design \"%s\" written by ABC on %s\n\n", Cba_ManName(pDes), Extra_TimeStamp() );
Cba_ManForEachNtk( pDes, pNtk, i )
Cba_PrsWriteBlifNtk( pFile, pNtk );
fclose( pFile );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
/**CFile****************************************************************
FileName [cba.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cba.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
#include "cbaPrs.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*
// node types during parsing
typedef enum {
CBA_NODE_NONE = 0, // 0: unused
CBA_NODE_CONST, // 1: constant
CBA_NODE_BUF, // 2: buffer
CBA_NODE_INV, // 3: inverter
CBA_NODE_AND, // 4: AND
CBA_NODE_OR, // 5: OR
CBA_NODE_XOR, // 6: XOR
CBA_NODE_NAND, // 7: NAND
CBA_NODE_NOR, // 8: NOR
CBA_NODE_XNOR, // 9 .XNOR
CBA_NODE_MUX, // 10: MUX
CBA_NODE_MAJ, // 11: MAJ
CBA_NODE_UNKNOWN // 12: unknown
} Cba_NodeType_t;
*/
const char * s_NodeTypes[CBA_NODE_UNKNOWN+1] = {
NULL, // 0: unused
"const", // 1: constant
"buf", // 2: buffer
"not", // 3: inverter
"and", // 4: AND
"or", // 5: OR
"xor", // 6: XOR
"nand", // 7: NAND
"nor", // 8: NOR
"xnor", // 9 .XNOR
"mux", // 10: MUX
"maj", // 11: MAJ
"???" // 12: unknown
};
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Writing parser state into a file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_PrsWriteVerilogMux( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
{
int NameId, RangeId, i;
char * pStrs[4] = { " = ", " ? ", " : ", ";\n" };
assert( Vec_IntSize(vFanins) == 8 );
fprintf( pFile, "assign " );
Vec_IntForEachEntryDouble( vFanins, NameId, RangeId, i )
fprintf( pFile, "%s%s%s", Cba_NtkStr(p, NameId), RangeId ? Cba_NtkStr(p, RangeId) : "", pStrs[i/2] );
}
void Cba_PrsWriteVerilogArray2( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
{
int NameId, RangeId, i;
assert( Vec_IntSize(vFanins) % 2 == 0 );
Vec_IntForEachEntryDouble( vFanins, NameId, RangeId, i )
fprintf( pFile, "%s%s%s", Cba_NtkStr(p, NameId), RangeId ? Cba_NtkStr(p, RangeId) : "", (i == Vec_IntSize(vFanins) - 2) ? "" : " ," );
}
void Cba_PrsWriteVerilogArray3( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
{
int FormId, NameId, RangeId, i;
assert( Vec_IntSize(vFanins) % 3 == 0 );
Vec_IntForEachEntryTriple( vFanins, FormId, NameId, RangeId, i )
fprintf( pFile, ".%s(%s%s)%s", Cba_NtkStr(p, FormId), Cba_NtkStr(p, NameId), RangeId ? Cba_NtkStr(p, RangeId) : "", (i == Vec_IntSize(vFanins) - 3) ? "" : " ," );
}
void Cba_PrsWriteVerilogConcat( FILE * pFile, Cba_Ntk_t * p, int Id )
{
fprintf( pFile, "{" );
Cba_PrsWriteVerilogArray2( pFile, p, Cba_ObjFanins(p, Id) );
fprintf( pFile, "}" );
}
void Cba_PrsWriteVerilogNodes( FILE * pFile, Cba_Ntk_t * p )
{
int Type, Func, i;
Cba_NtkForEachObjType( p, Type, i )
if ( Type == CBA_PRS_NODE ) // .names/assign/box2 (no formal/actual binding)
{
Func = Cba_ObjFuncId(p, i);
if ( Func >= CBA_NODE_BUF && Func <= CBA_NODE_XNOR )
{
fprintf( pFile, "%s (", s_NodeTypes[Func] );
Cba_PrsWriteVerilogArray2( pFile, p, Cba_ObjFanins(p, i) );
fprintf( pFile, ");\n" );
}
else if ( Func == CBA_NODE_MUX )
Cba_PrsWriteVerilogMux( pFile, p, Cba_ObjFanins(p, i) );
else assert( 0 );
}
}
void Cba_PrsWriteVerilogBoxes( FILE * pFile, Cba_Ntk_t * p )
{
int Type, i;
Cba_NtkForEachObjType( p, Type, i )
if ( Type == CBA_PRS_BOX ) // .subckt/.gate/box (formal/actual binding)
{
fprintf( pFile, "%s %s (", Cba_ObjFuncStr(p, i), Cba_ObjInstStr(p, i) );
Cba_PrsWriteVerilogArray3( pFile, p, Cba_ObjFanins(p, i) );
fprintf( pFile, ");\n" );
}
}
void Cba_PrsWriteVerilogSignals( FILE * pFile, Cba_Ntk_t * p, int SigType )
{
int NameId, RangeId, i;
char * pSigNames[4] = { "inout", "input", "output", "wire" };
Vec_Int_t * vSigs[4] = { &p->vInouts, &p->vInputs, &p->vOutputs, &p->vWires };
Vec_IntForEachEntryDouble( vSigs[SigType], NameId, RangeId, i )
fprintf( pFile, "%s %s%s;\n", pSigNames[SigType], RangeId ? Cba_NtkStr(p, RangeId) : "", Cba_NtkStr(p, NameId) );
}
void Cba_PrsWriteVerilogSignalList( FILE * pFile, Cba_Ntk_t * p, int SigType, int fSkipComma )
{
int NameId, RangeId, i;
Vec_Int_t * vSigs[4] = { &p->vInouts, &p->vInputs, &p->vOutputs, &p->vWires };
Vec_IntForEachEntryDouble( vSigs[SigType], NameId, RangeId, i )
fprintf( pFile, " %s%s", Cba_NtkStr(p, NameId), (fSkipComma && i == Vec_IntSize(vSigs[SigType]) - 2) ? "" : "," );
}
void Cba_PrsWriteVerilogNtk( FILE * pFile, Cba_Ntk_t * p )
{
int s;
assert( Vec_IntSize(&p->vTypes) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFuncs) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vInstIds) == Cba_NtkObjNum(p) );
// write header
fprintf( pFile, "module %s (\n", Cba_NtkName(p) );
for ( s = 0; s < 3; s++ )
Cba_PrsWriteVerilogSignalList( pFile, p, s, s==2 );
fprintf( pFile, ");\n" );
// write declarations
for ( s = 0; s < 4; s++ )
Cba_PrsWriteVerilogSignals( pFile, p, s );
// write objects
Cba_PrsWriteVerilogNodes( pFile, p );
Cba_PrsWriteVerilogBoxes( pFile, p );
fprintf( pFile, "endmodule\n" );
}
void Cba_PrsWriteVerilog( char * pFileName, Cba_Man_t * pDes )
{
FILE * pFile;
Cba_Ntk_t * pNtk;
int i;
pFile = fopen( pFileName, "wb" );
if ( pFile == NULL )
{
printf( "Cannot open output file \"%s\".\n", pFileName );
return;
}
fprintf( pFile, "// Design \"%s\" written by ABC on %s\n\n", Cba_ManName(pDes), Extra_TimeStamp() );
Cba_ManForEachNtk( pDes, pNtk, i )
Cba_PrsWriteVerilogNtk( pFile, pNtk );
fclose( pFile );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
SRC += src/base/cba/cbaBlast.c \
src/base/cba/cbaBuild.c \
src/base/cba/cbaCom.c \
src/base/cba/cbaLib.c \
src/base/cba/cbaNtk.c \
src/base/cba/cbaReadBlif.c \
src/base/cba/cbaReadVer.c \
src/base/cba/cbaSimple.c \
src/base/cba/cbaWriteBlif.c \
src/base/cba/cbaWriteVer.c
......@@ -49,6 +49,8 @@ extern void Scl_Init( Abc_Frame_t * pAbc );
extern void Scl_End( Abc_Frame_t * pAbc );
extern void Wlc_Init( Abc_Frame_t * pAbc );
extern void Wlc_End( Abc_Frame_t * pAbc );
extern void Cba_Init( Abc_Frame_t * pAbc );
extern void Cba_End( Abc_Frame_t * pAbc );
extern void Test_Init( Abc_Frame_t * pAbc );
extern void Test_End( Abc_Frame_t * pAbc );
extern void Abc2_Init( Abc_Frame_t * pAbc );
......@@ -104,6 +106,7 @@ void Abc_FrameInit( Abc_Frame_t * pAbc )
Load_Init( pAbc );
Scl_Init( pAbc );
Wlc_Init( pAbc );
Cba_Init( pAbc );
Test_Init( pAbc );
for( p = s_InitializerStart ; p ; p = p->next )
if(p->init)
......@@ -139,6 +142,7 @@ void Abc_FrameEnd( Abc_Frame_t * pAbc )
Load_End( pAbc );
Scl_End( pAbc );
Wlc_End( pAbc );
Cba_End( pAbc );
Test_End( pAbc );
}
......
......@@ -127,6 +127,7 @@ struct Abc_Frame_t_
void * pAbc85Best;
void * pAbc85Delay;
void * pAbcWlc;
void * pAbcCba;
};
typedef void (*Abc_Frame_Initialization_Func)( Abc_Frame_t * pAbc );
......
......@@ -106,6 +106,7 @@ extern char * Extra_FileNameGenericAppend( char * pBase, char * pSuffix );
extern void Extra_FileNameCorrectPath( char * FileName );
extern char * Extra_FileNameWithoutPath( char * FileName );
extern char * Extra_FilePathWithoutName( char * FileName );
extern char * Extra_FileDesignName( char * pFileName );
extern int Extra_FileCheck( char * pFileName );
extern int Extra_FileSize( char * pFileName );
extern char * Extra_FileRead( FILE * pFile );
......
......@@ -247,6 +247,25 @@ char * Extra_FilePathWithoutName( char * FileName )
ABC_FREE( FileName );
return NULL;
}
char * Extra_FileDesignName( char * pFileName )
{
char * pBeg, * pEnd, * pStore, * pCur;
// find the first dot
for ( pEnd = pFileName; *pEnd; pEnd++ )
if ( *pEnd == '.' )
break;
// find the first char
for ( pBeg = pEnd - 1; pBeg >= pFileName; pBeg-- )
if ( !((*pBeg >= 'a' && *pBeg <= 'z') || (*pBeg >= 'A' && *pBeg <= 'Z') || (*pBeg >= '0' && *pBeg <= '9') || *pBeg == '_') )
break;
pBeg++;
// fill up storage
pStore = ABC_ALLOC( char, pEnd - pBeg + 1 );
for ( pCur = pStore; pBeg < pEnd; pBeg++, pCur++ )
*pCur = *pBeg;
*pCur = 0;
return pStore;
}
/**Function*************************************************************
......
......@@ -237,7 +237,7 @@ int Abc_NamMemAlloc( Abc_Nam_t * p )
SeeAlso []
***********************************************************************/
int Abc_NamStrHash( const char * pStr, int nTableSize )
int Abc_NamStrHash( const char * pStr, const char * pLim, int nTableSize )
{
static int s_FPrimes[128] = {
1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459,
......@@ -255,11 +255,22 @@ int Abc_NamStrHash( const char * pStr, int nTableSize )
8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
};
unsigned i, uHash;
for ( uHash = 0, i = 0; pStr[i]; i++ )
if ( i & 1 )
uHash *= pStr[i] * s_FPrimes[i & 0x7F];
else
uHash ^= pStr[i] * s_FPrimes[i & 0x7F];
if ( pLim )
{
for ( uHash = 0, i = 0; pStr < pLim; i++ )
if ( i & 1 )
uHash *= pStr[i] * s_FPrimes[i & 0x7F];
else
uHash ^= pStr[i] * s_FPrimes[i & 0x7F];
}
else
{
for ( uHash = 0, i = 0; pStr[i]; i++ )
if ( i & 1 )
uHash *= pStr[i] * s_FPrimes[i & 0x7F];
else
uHash ^= pStr[i] * s_FPrimes[i & 0x7F];
}
return uHash % nTableSize;
}
......@@ -274,10 +285,10 @@ int Abc_NamStrHash( const char * pStr, int nTableSize )
SeeAlso []
***********************************************************************/
static inline int * Abc_NamStrHashFind( Abc_Nam_t * p, const char * pStr )
static inline int * Abc_NamStrHashFind( Abc_Nam_t * p, const char * pStr, const char * pLim )
{
char * pThis;
int * pPlace = (int *)(p->pBins + Abc_NamStrHash( pStr, p->nBins ));
int * pPlace = (int *)(p->pBins + Abc_NamStrHash( pStr, pLim, p->nBins ));
assert( *pStr );
for ( pThis = (*pPlace)? Abc_NamIntToStr(p, *pPlace) : NULL;
pThis; pPlace = Abc_NamIntToNextP(p, *pPlace),
......@@ -318,7 +329,7 @@ void Abc_NamStrHashResize( Abc_Nam_t * p )
Vec_IntForEachEntryStart( vInt2HandleOld, iHandleOld, i, 1 )
{
pThis = Abc_NamHandleToStr( p, iHandleOld );
piPlace = Abc_NamStrHashFind( p, pThis );
piPlace = Abc_NamStrHashFind( p, pThis, NULL );
assert( *piPlace == 0 );
*piPlace = Vec_IntSize( p->vInt2Handle );
assert( Vec_IntSize( p->vInt2Handle ) == i );
......@@ -343,7 +354,11 @@ void Abc_NamStrHashResize( Abc_Nam_t * p )
***********************************************************************/
int Abc_NamStrFind( Abc_Nam_t * p, char * pStr )
{
return *Abc_NamStrHashFind( p, pStr );
return *Abc_NamStrHashFind( p, pStr, NULL );
}
int Abc_NamStrFindLim( Abc_Nam_t * p, char * pStr, char * pLim )
{
return *Abc_NamStrHashFind( p, pStr, pLim );
}
/**Function*************************************************************
......@@ -368,7 +383,7 @@ int Abc_NamStrFindOrAdd( Abc_Nam_t * p, char * pStr, int * pfFound )
break;
assert( i < (int)strlen(pStr) );
}
piPlace = Abc_NamStrHashFind( p, pStr );
piPlace = Abc_NamStrHashFind( p, pStr, NULL );
if ( *piPlace )
{
if ( pfFound )
......@@ -396,6 +411,41 @@ int Abc_NamStrFindOrAdd( Abc_Nam_t * p, char * pStr, int * pfFound )
Abc_NamStrHashResize( p );
return Vec_IntSize(p->vInt2Handle) - 1;
}
int Abc_NamStrFindOrAddLim( Abc_Nam_t * p, char * pStr, char * pLim, int * pfFound )
{
int iHandleNew;
int *piPlace;
char * pStore;
piPlace = Abc_NamStrHashFind( p, pStr, pLim );
if ( *piPlace )
{
if ( pfFound )
*pfFound = 1;
return *piPlace;
}
if ( pfFound )
*pfFound = 0;
iHandleNew = p->iHandle + (pLim - pStr) + 1;
while ( p->nStore < iHandleNew )
{
p->nStore *= 3;
p->nStore /= 2;
p->pStore = ABC_REALLOC( char, p->pStore, p->nStore );
}
assert( p->nStore >= iHandleNew );
// create new handle
*piPlace = Vec_IntSize( p->vInt2Handle );
pStore = Abc_NamHandleToStr( p, p->iHandle );
strncpy( pStore, pStr, pLim - pStr );
pStore[pLim - pStr] = 0;
Vec_IntPush( p->vInt2Handle, p->iHandle );
Vec_IntPush( p->vInt2Next, 0 );
p->iHandle = iHandleNew;
// extend the hash table
if ( Vec_IntSize(p->vInt2Handle) > 2 * p->nBins )
Abc_NamStrHashResize( p );
return Vec_IntSize(p->vInt2Handle) - 1;
}
/**Function*************************************************************
......@@ -435,7 +485,7 @@ Vec_Int_t * Abc_NamComputeIdMap( Abc_Nam_t * p1, Abc_Nam_t * p2 )
Vec_IntForEachEntryStart( p1->vInt2Handle, iHandle1, i, 1 )
{
pThis = Abc_NamHandleToStr( p1, iHandle1 );
piPlace = Abc_NamStrHashFind( p2, pThis );
piPlace = Abc_NamStrHashFind( p2, pThis, NULL );
Vec_IntWriteEntry( vMap, i, *piPlace );
// Abc_Print( 1, "%d->%d ", i, *piPlace );
}
......
......@@ -59,7 +59,9 @@ extern int Abc_NamObjNumMax( Abc_Nam_t * p );
extern int Abc_NamMemUsed( Abc_Nam_t * p );
extern int Abc_NamMemAlloc( Abc_Nam_t * p );
extern int Abc_NamStrFind( Abc_Nam_t * p, char * pStr );
extern int Abc_NamStrFindLim( Abc_Nam_t * p, char * pStr, char * pLim );
extern int Abc_NamStrFindOrAdd( Abc_Nam_t * p, char * pStr, int * pfFound );
extern int Abc_NamStrFindOrAddLim( Abc_Nam_t * p, char * pStr, char * pLim, int * pfFound );
extern char * Abc_NamStr( Abc_Nam_t * p, int id );
extern Vec_Int_t * Abc_NamComputeIdMap( Abc_Nam_t * p1, Abc_Nam_t * p2 );
extern int Abc_NamReportCommon( Vec_Int_t * vNameIds1, Abc_Nam_t * p1, Abc_Nam_t * p2 );
......
......@@ -65,6 +65,8 @@ struct Vec_Int_t_
for ( i = 0; (i < Vec_IntSize(vVec1)) && (((Entry1) = Vec_IntEntry(vVec1, i)), 1) && (((Entry2) = Vec_IntEntry(vVec2, i)), 1); i++ )
#define Vec_IntForEachEntryDouble( vVec, Entry1, Entry2, i ) \
for ( i = 0; (i+1 < Vec_IntSize(vVec)) && (((Entry1) = Vec_IntEntry(vVec, i)), 1) && (((Entry2) = Vec_IntEntry(vVec, i+1)), 1); i += 2 )
#define Vec_IntForEachEntryTriple( vVec, Entry1, Entry2, Entry3, i ) \
for ( i = 0; (i+2 < Vec_IntSize(vVec)) && (((Entry1) = Vec_IntEntry(vVec, i)), 1) && (((Entry2) = Vec_IntEntry(vVec, i+1)), 1) && (((Entry3) = Vec_IntEntry(vVec, i+2)), 1); i += 3 )
#define Vec_IntForEachEntryThisNext( vVec, This, Next, i ) \
for ( i = 0, (This) = (Next) = (Vec_IntSize(vVec) ? Vec_IntEntry(vVec, 0) : -1); (i+1 < Vec_IntSize(vVec)) && (((Next) = Vec_IntEntry(vVec, i+1)), 1); i += 2, (This) = (Next) )
......@@ -696,6 +698,11 @@ static inline void Vec_IntPush( Vec_Int_t * p, int Entry )
}
p->pArray[p->nSize++] = Entry;
}
static inline void Vec_IntPushTwo( Vec_Int_t * p, int Entry1, int Entry2 )
{
Vec_IntPush( p, Entry1 );
Vec_IntPush( p, Entry2 );
}
static inline void Vec_IntPushArray( Vec_Int_t * p, int * pEntries, int nEntries )
{
int i;
......@@ -1045,6 +1052,34 @@ static inline void Vec_IntReverseOrder( Vec_Int_t * p )
/**Function*************************************************************
Synopsis [Removes odd entries.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline void Vec_IntRemoveOdd( Vec_Int_t * p )
{
int i;
assert( (p->nSize & 1) == 0 );
p->nSize >>= 1;
for ( i = 0; i < p->nSize; i++ )
p->pArray[i] = p->pArray[2*i];
}
static inline void Vec_IntRemoveEven( Vec_Int_t * p )
{
int i;
assert( (p->nSize & 1) == 0 );
p->nSize >>= 1;
for ( i = 0; i < p->nSize; i++ )
p->pArray[i] = p->pArray[2*i+1];
}
/**Function*************************************************************
Synopsis []
Description []
......@@ -1144,6 +1179,13 @@ static inline int Vec_IntCountPositive( Vec_Int_t * p )
Counter += (p->pArray[i] > 0);
return Counter;
}
static inline int Vec_IntCountZero( Vec_Int_t * p )
{
int i, Counter = 0;
for ( i = 0; i < p->nSize; i++ )
Counter += (p->pArray[i] == 0);
return Counter;
}
/**Function*************************************************************
......
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