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Commit 1afa8a2f by Alan Mishchenko
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Version abc80725

parent 2c96c8af
Showing with 962 additions and 145 deletions
Makefile
......@@ -24,7 +24,8 @@ MODULES := \
src/aig/mem src/aig/dar src/aig/fra src/aig/cnf \
src/aig/csw src/aig/ioa src/aig/aig src/aig/kit \
src/aig/bdc src/aig/bar src/aig/ntl src/aig/nwk \
src/aig/mfx src/aig/tim src/aig/saig src/aig/bbr
src/aig/mfx src/aig/tim src/aig/saig src/aig/bbr \
src/aig/int
default: $(PROG)
......
abc.dsp
......@@ -42,7 +42,7 @@ RSC=rc.exe
# PROP Ignore_Export_Lib 0
# PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c
# ADD CPP /nologo /W3 /GX /O2 /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/sat/nsat" /I "src/sat/psat" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D ABC_DLL=DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /D "ABC_USE_LIBRARIES" /FR /YX /FD /c
# ADD CPP /nologo /W3 /GX /O2 /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/sat/nsat" /I "src/sat/psat" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /I "src/aig/int" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D ABC_DLL=DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /D "ABC_USE_LIBRARIES" /FR /YX /FD /c
# ADD BASE RSC /l 0x409 /d "NDEBUG"
# ADD RSC /l 0x409 /d "NDEBUG"
BSC32=bscmake.exe
......@@ -66,7 +66,7 @@ LINK32=link.exe
# PROP Ignore_Export_Lib 0
# PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c
# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/sat/nsat" /I "src/sat/psat" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D ABC_DLL=DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /D "ABC_USE_LIBRARIES" /FR /YX /FD /GZ /c
# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/sat/nsat" /I "src/sat/psat" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /I "src/aig/int" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D ABC_DLL=DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /D "ABC_USE_LIBRARIES" /FR /YX /FD /GZ /c
# SUBTRACT CPP /X
# ADD BASE RSC /l 0x409 /d "_DEBUG"
# ADD RSC /l 0x409 /d "_DEBUG"
......@@ -3194,10 +3194,6 @@ SOURCE=.\src\aig\saig\saigHaig.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\saig\saigInter.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\saig\saigIoa.c
# End Source File
# Begin Source File
......@@ -3228,9 +3224,53 @@ SOURCE=.\src\aig\saig\saigScl.c
SOURCE=.\src\aig\saig\saigTrans.c
# End Source File
# End Group
# Begin Group "int"
# PROP Default_Filter ""
# Begin Source File
SOURCE=.\src\aig\int\int.h
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intContain.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intCore.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intDup.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intFrames.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intInt.h
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intInter.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intM114.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intM114p.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\int\intMan.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\saig\saigUnique.c
SOURCE=.\src\aig\int\intUtil.c
# End Source File
# End Group
# End Group
......
src/aig/aig/aig.h
......@@ -486,7 +486,7 @@ extern Aig_Man_t * Aig_ManDupWithoutPos( Aig_Man_t * p );
extern Aig_Man_t * Aig_ManDupRepres( Aig_Man_t * p );
extern Aig_Man_t * Aig_ManDupRepresDfs( Aig_Man_t * p );
extern Aig_Man_t * Aig_ManCreateMiter( Aig_Man_t * p1, Aig_Man_t * p2, int fImpl );
extern Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum );
extern Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum, int fAddRegs );
/*=== aigFanout.c ==========================================================*/
extern void Aig_ObjAddFanout( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFanout );
extern void Aig_ObjRemoveFanout( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFanout );
......
src/aig/aig/aigCheck.c
......@@ -17,7 +17,7 @@
Revision [$Id: aigCheck.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
***********************************************************************/
#include "aig.h"
////////////////////////////////////////////////////////////////////////
......
src/aig/aig/aigDup.c
......@@ -905,7 +905,7 @@ Aig_Man_t * Aig_ManCreateMiter( Aig_Man_t * p1, Aig_Man_t * p2, int Oper )
SeeAlso []
***********************************************************************/
Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum )
Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum, int fAddRegs )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj;
......@@ -922,8 +922,8 @@ Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum )
Aig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
// set registers
pNew->nRegs = p->nRegs;
pNew->nTruePis = p->nTruePis;
pNew->nRegs = fAddRegs? p->nRegs : 0;
pNew->nTruePis = fAddRegs? p->nTruePis : p->nTruePis + p->nRegs;
pNew->nTruePos = 1;
// duplicate internal nodes
Aig_ManForEachNode( p, pObj, i )
......@@ -932,8 +932,11 @@ Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum )
pObj = Aig_ManPo( p, iPoNum );
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
// create register inputs with MUXes
Aig_ManForEachLiSeq( p, pObj, i )
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
if ( fAddRegs )
{
Aig_ManForEachLiSeq( p, pObj, i )
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
}
Aig_ManCleanup( pNew );
return pNew;
}
......
src/aig/bar/bar.c
......@@ -60,9 +60,9 @@ static void Bar_ProgressClean( Bar_Progress_t * p );
Bar_Progress_t * Bar_ProgressStart( FILE * pFile, int nItemsTotal )
{
Bar_Progress_t * p;
// extern int Abc_FrameShowProgress( void * p );
// extern void * Abc_FrameGetGlobalFrame();
// if ( !Abc_FrameShowProgress(Abc_FrameGetGlobalFrame()) ) return NULL;
extern int Abc_FrameShowProgress( void * p );
extern void * Abc_FrameGetGlobalFrame();
if ( !Abc_FrameShowProgress(Abc_FrameGetGlobalFrame()) ) return NULL;
p = (Bar_Progress_t *) malloc(sizeof(Bar_Progress_t));
memset( p, 0, sizeof(Bar_Progress_t) );
p->pFile = pFile;
......
src/aig/fra/fraSec.c
......@@ -20,6 +20,7 @@
#include "fra.h"
#include "ioa.h"
#include "int.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -389,11 +390,15 @@ PRT( "Time", clock() - clkTotal );
clk = clock();
if ( pParSec->fInterpolation && RetValue == -1 && Aig_ManRegNum(pNew) > 0 && Aig_ManPoNum(pNew)-Aig_ManRegNum(pNew) == 1 )
{
extern int Saig_Interpolate( Aig_Man_t * pAig, int nConfLimit, int nFramesMax, int fRewrite, int fTransLoop, int fUsePudlak, int fUseOther, int fUseMiniSat, int fCheckInd, int fCheckKstep, int fVerbose, int * pDepth );
Inter_ManParams_t Pars, * pPars = &Pars;
int Depth;
pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew);
pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew);
RetValue = Saig_Interpolate( pNew, 5000, 40, 0, 1, 0, 0, 0, 1, 1, pParSec->fVeryVerbose, &Depth );
Inter_ManSetDefaultParams( pPars );
pPars->fVerbose = pParSec->fVeryVerbose;
RetValue = Inter_ManPerformInterpolation( pNew, pPars, &Depth );
if ( pParSec->fVerbose )
{
if ( RetValue == 1 )
......@@ -454,7 +459,7 @@ PRT( "Time", clock() - clk );
iCount++;
if ( !pParSec->fSilent )
printf( "*** Running output %d of the miter (number %d out of %d unsolved).\n", i, iCount, Counter );
pNew2 = Aig_ManDupOneOutput( pNew, i );
pNew2 = Aig_ManDupOneOutput( pNew, i, 1 );
TimeLimitCopy = pParSec->TimeLimit;
pParSec->TimeLimit = TimeLimit2;
......
src/aig/fra/fraSim.c
......@@ -542,6 +542,35 @@ void Fra_SmlNodeSimulate( Fra_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
SeeAlso []
***********************************************************************/
int Fra_SmlNodesCompareInFrame( Fra_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1, int iFrame0, int iFrame1 )
{
unsigned * pSims0, * pSims1;
int i;
assert( !Aig_IsComplement(pObj0) );
assert( !Aig_IsComplement(pObj1) );
assert( iFrame0 == 0 || p->nWordsFrame < p->nWordsTotal );
assert( iFrame1 == 0 || p->nWordsFrame < p->nWordsTotal );
// get hold of the simulation information
pSims0 = Fra_ObjSim(p, pObj0->Id) + p->nWordsFrame * iFrame0;
pSims1 = Fra_ObjSim(p, pObj1->Id) + p->nWordsFrame * iFrame1;
// compare
for ( i = 0; i < p->nWordsFrame; i++ )
if ( pSims0[i] != pSims1[i] )
return 0;
return 1;
}
/**Function*************************************************************
Synopsis [Simulates one node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Fra_SmlNodeCopyFanin( Fra_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
{
unsigned * pSims, * pSims0;
......
src/aig/int/int.h 0 → 100644
/**CFile****************************************************************
FileName [int.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Interpolation engine.]
Synopsis [External declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 24, 2008.]
Revision [$Id: int.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef __INT_H__
#define __INT_H__
#ifdef __cplusplus
extern "C" {
#endif
/*
The interpolation algorithm implemented here was introduced in the paper:
K. L. McMillan. Interpolation and SAT-based model checking. CAV’03, pp. 1-13.
*/
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
// simulation manager
typedef struct Inter_ManParams_t_ Inter_ManParams_t;
struct Inter_ManParams_t_
{
int nBTLimit; // limit on the number of conflicts
int nFramesMax; // the max number timeframes to unroll
int nFramesK; // the number of timeframes to use in induction
int fRewrite; // use additional rewriting to simplify timeframes
int fTransLoop; // add transition into the init state under new PI var
int fUsePudlak; // use Pudluk interpolation procedure
int fUseOther; // use other undisclosed option
int fUseMiniSat; // use MiniSat-1.14p instead of internal proof engine
int fCheckKstep; // check using K-step induction
int fUseBias; // bias decisions to global variables
int fUseBackward; // perform backward interpolation
int fVerbose; // print verbose statistics
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== intCore.c ==========================================================*/
extern void Inter_ManSetDefaultParams( Inter_ManParams_t * p );
extern int Inter_ManPerformInterpolation( Aig_Man_t * pAig, Inter_ManParams_t * pPars, int * pDepth );
#ifdef __cplusplus
}
#endif
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/int/intDup.c 0 → 100644
/**CFile****************************************************************
FileName [intDup.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Interpolation engine.]
Synopsis [Specialized AIG duplication procedures.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 24, 2008.]
Revision [$Id: intDup.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "intInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Create trivial AIG manager for the init state.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManStartInitState( int nRegs )
{
Aig_Man_t * p;
Aig_Obj_t * pRes;
Aig_Obj_t ** ppInputs;
int i;
assert( nRegs > 0 );
ppInputs = ALLOC( Aig_Obj_t *, nRegs );
p = Aig_ManStart( nRegs );
for ( i = 0; i < nRegs; i++ )
ppInputs[i] = Aig_Not( Aig_ObjCreatePi(p) );
pRes = Aig_Multi( p, ppInputs, nRegs, AIG_OBJ_AND );
Aig_ObjCreatePo( p, pRes );
free( ppInputs );
return p;
}
/**Function*************************************************************
Synopsis [Duplicate the AIG w/o POs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManStartDuplicated( Aig_Man_t * p )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
assert( Aig_ManRegNum(p) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
pNew->pName = Aig_UtilStrsav( p->pName );
pNew->pSpec = Aig_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
// set registers
pNew->nRegs = p->nRegs;
pNew->nTruePis = p->nTruePis;
pNew->nTruePos = 0;
// duplicate internal nodes
Aig_ManForEachNode( p, pObj, i )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// create register inputs with MUXes
Saig_ManForEachLi( p, pObj, i )
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
Aig_ManCleanup( pNew );
return pNew;
}
/**Function*************************************************************
Synopsis [Duplicate the AIG w/o POs and transforms to transit into init state.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo )
{
Aig_Man_t * pNew;
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
Aig_Obj_t * pCtrl = NULL; // Suppress "might be used uninitialized"
int i;
assert( Aig_ManRegNum(p) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
pNew->pName = Aig_UtilStrsav( p->pName );
pNew->pSpec = Aig_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
{
if ( i == Saig_ManPiNum(p) )
pCtrl = Aig_ObjCreatePi( pNew );
pObj->pData = Aig_ObjCreatePi( pNew );
}
// set registers
pNew->nRegs = fAddFirstPo? 0 : p->nRegs;
pNew->nTruePis = fAddFirstPo? Aig_ManPiNum(p) + 1 : p->nTruePis + 1;
pNew->nTruePos = fAddFirstPo;
// duplicate internal nodes
Aig_ManForEachNode( p, pObj, i )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// add the PO
if ( fAddFirstPo )
{
pObj = Aig_ManPo( p, 0 );
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
}
else
{
// create register inputs with MUXes
Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
{
pObj = Aig_Mux( pNew, pCtrl, pObjLo->pData, Aig_ObjChild0Copy(pObjLi) );
// pObj = Aig_Mux( pNew, pCtrl, Aig_ManConst0(pNew), Aig_ObjChild0Copy(pObjLi) );
Aig_ObjCreatePo( pNew, pObj );
}
}
Aig_ManCleanup( pNew );
return pNew;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/saig/saigUnique.c → src/aig/int/intFrames.c
/**CFile****************************************************************
FileName [saigUnique.c]
FileName [intFrames.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Sequential AIG package.]
PackageName [Interpolation engine.]
Synopsis [Containment checking with unique state constraints.]
Synopsis [Sequential AIG unrolling for interpolation.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Date [Ver. 1.0. Started - June 24, 2008.]
Revision [$Id: saigUnique.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
Revision [$Id: intFrames.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "saig.h"
#include "cnf.h"
#include "satSolver.h"
#include "intInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -35,28 +33,34 @@
Synopsis [Create timeframes of the manager for interpolation.]
Description [The resulting manager is combinational. The primary inputs
corresponding to register outputs are ordered first.]
corresponding to register outputs are ordered first. The only POs of the
manager is the property output of the last timeframe.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Saig_ManFramesLatches( Aig_Man_t * pAig, int nFrames, Vec_Ptr_t ** pvMapReg )
Aig_Man_t * Inter_ManFramesInter( Aig_Man_t * pAig, int nFrames, int fAddRegOuts )
{
Aig_Man_t * pFrames;
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f;
assert( Saig_ManRegNum(pAig) > 0 );
assert( Saig_ManPoNum(pAig) == 1 );
pFrames = Aig_ManStart( Aig_ManNodeNum(pAig) * nFrames );
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pFrames );
// create variables for register outputs
*pvMapReg = Vec_PtrAlloc( (nFrames+1) * Saig_ManRegNum(pAig) );
Saig_ManForEachLo( pAig, pObj, i )
if ( fAddRegOuts )
{
pObj->pData = Aig_ObjCreatePi( pFrames );
Vec_PtrPush( *pvMapReg, pObj->pData );
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_ManConst0( pFrames );
}
else
{
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi( pFrames );
}
// add timeframes
for ( f = 0; f < nFrames; f++ )
......@@ -67,102 +71,31 @@ Aig_Man_t * Saig_ManFramesLatches( Aig_Man_t * pAig, int nFrames, Vec_Ptr_t ** p
// add internal nodes of this frame
Aig_ManForEachNode( pAig, pObj, i )
pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
if ( f == nFrames - 1 )
break;
// save register inputs
Saig_ManForEachLi( pAig, pObj, i )
pObj->pData = Aig_ObjChild0Copy(pObj);
// transfer to register outputs
Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
{
pObjLo->pData = pObjLi->pData;
Vec_PtrPush( *pvMapReg, pObjLo->pData );
}
}
return pFrames;
}
/**Function*************************************************************
Synopsis [Duplicates AIG while mapping PIs into the given array.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Saig_ManAppendCone( Aig_Man_t * pOld, Aig_Man_t * pNew, Aig_Obj_t ** ppNewPis, int fCompl )
{
Aig_Obj_t * pObj;
int i;
assert( Aig_ManPoNum(pOld) == 1 );
// create the PIs
Aig_ManCleanData( pOld );
Aig_ManConst1(pOld)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( pOld, pObj, i )
pObj->pData = ppNewPis[i];
// duplicate internal nodes
Aig_ManForEachNode( pOld, pObj, i )
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
// add one PO to new
pObj = Aig_ManPo( pOld, 0 );
Aig_ObjCreatePo( pNew, Aig_NotCond( Aig_ObjChild0Copy(pObj), fCompl ) );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Saig_ManUniqueState( Aig_Man_t * pTrans, Vec_Ptr_t * vInters )
{
Aig_Man_t * pFrames, * pInterNext, * pInterThis;
Aig_Obj_t ** ppNodes;
Vec_Ptr_t * vMapRegs;
Cnf_Dat_t * pCnf;
sat_solver * pSat;
int f, nRegs, status;
nRegs = Saig_ManRegNum(pTrans);
assert( nRegs > 0 );
assert( Vec_PtrSize(vInters) > 1 );
// generate the timeframes
pFrames = Saig_ManFramesLatches( pTrans, Vec_PtrSize(vInters)-1, &vMapRegs );
assert( Vec_PtrSize(vMapRegs) == Vec_PtrSize(vInters) * nRegs );
// add main constraints to the timeframes
ppNodes = (Aig_Obj_t **)Vec_PtrArray(vMapRegs);
Vec_PtrForEachEntryStop( vInters, pInterThis, f, Vec_PtrSize(vInters)-1 )
// create POs for each register output
if ( fAddRegOuts )
{
assert( nRegs == Aig_ManPiNum(pInterThis) );
pInterNext = Vec_PtrEntry( vInters, f+1 );
Saig_ManAppendCone( pInterNext, pFrames, ppNodes + f * nRegs, 0 );
Saig_ManAppendCone( pInterThis, pFrames, ppNodes + f * nRegs, 1 );
Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjCreatePo( pFrames, Aig_ObjChild0Copy(pObj) );
}
// create the only PO of the manager
else
{
pObj = Aig_ManPo( pAig, 0 );
Aig_ObjCreatePo( pFrames, Aig_ObjChild0Copy(pObj) );
}
Saig_ManAppendCone( Vec_PtrEntryLast(vInters), pFrames, ppNodes + f * nRegs, 1 );
Aig_ManCleanup( pFrames );
Vec_PtrFree( vMapRegs );
// convert to CNF
pCnf = Cnf_Derive( pFrames, 0 );
pSat = Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
Cnf_DataFree( pCnf );
Aig_ManStop( pFrames );
if ( pSat == NULL )
return 1;
// solve the problem
status = sat_solver_solve( pSat, NULL, NULL, (sint64)0, (sint64)0, (sint64)0, (sint64)0 );
sat_solver_delete( pSat );
return status == l_False;
return pFrames;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/aig/int/intInt.h 0 → 100644
/**CFile****************************************************************
FileName [intInt.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Interpolation engine.]
Synopsis [Internal declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 24, 2008.]
Revision [$Id: intInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef __INT_INT_H__
#define __INT_INT_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
#include "saig.h"
#include "cnf.h"
#include "satSolver.h"
#include "satStore.h"
#include "int.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
// simulation manager
typedef struct Inter_Man_t_ Inter_Man_t;
struct Inter_Man_t_
{
// AIG manager
Aig_Man_t * pAig; // the original AIG manager
Aig_Man_t * pAigTrans; // the transformed original AIG manager
Cnf_Dat_t * pCnfAig; // CNF for the original manager
// interpolant
Aig_Man_t * pInter; // the current interpolant
Cnf_Dat_t * pCnfInter; // CNF for the current interplant
// timeframes
Aig_Man_t * pFrames; // the timeframes
Cnf_Dat_t * pCnfFrames; // CNF for the timeframes
// other data
Vec_Int_t * vVarsAB; // the variables participating in
// temporary place for the new interpolant
Aig_Man_t * pInterNew;
Vec_Ptr_t * vInters;
// parameters
int nFrames; // the number of timeframes
int nConfCur; // the current number of conflicts
int nConfLimit; // the limit on the number of conflicts
int fVerbose; // the verbosiness flag
// runtime
int timeRwr;
int timeCnf;
int timeSat;
int timeInt;
int timeEqu;
int timeOther;
int timeTotal;
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== intContain.c ==========================================================*/
extern int Inter_ManCheckContainment( Aig_Man_t * pNew, Aig_Man_t * pOld );
extern int Inter_ManCheckEquivalence( Aig_Man_t * pNew, Aig_Man_t * pOld );
extern int Inter_ManCheckInductiveContainment( Aig_Man_t * pTrans, Aig_Man_t * pInter, int nSteps, int fBackward );
/*=== intDup.c ==========================================================*/
extern Aig_Man_t * Inter_ManStartInitState( int nRegs );
extern Aig_Man_t * Inter_ManStartDuplicated( Aig_Man_t * p );
extern Aig_Man_t * Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo );
/*=== intFrames.c ==========================================================*/
extern Aig_Man_t * Inter_ManFramesInter( Aig_Man_t * pAig, int nFrames, int fAddRegOuts );
/*=== intMan.c ==========================================================*/
extern Inter_Man_t * Inter_ManCreate( Aig_Man_t * pAig, Inter_ManParams_t * pPars );
extern void Inter_ManClean( Inter_Man_t * p );
extern void Inter_ManStop( Inter_Man_t * p );
/*=== intM114.c ==========================================================*/
extern int Inter_ManPerformOneStep( Inter_Man_t * p, int fUseBias, int fUseBackward );
/*=== intM114p.c ==========================================================*/
#ifdef ABC_USE_LIBRARIES
extern int Inter_ManPerformOneStepM114p( Inter_Man_t * p, int fUsePudlak, int fUseOther );
#endif
/*=== intUtil.c ==========================================================*/
extern int Inter_ManCheckInitialState( Aig_Man_t * p );
extern int Inter_ManCheckAllStates( Aig_Man_t * p );
#ifdef __cplusplus
}
#endif
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/int/intInter.c 0 → 100644
/**CFile****************************************************************
FileName [intInter.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Interpolation engine.]
Synopsis [Experimental procedures to derive and compare interpolants.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 24, 2008.]
Revision [$Id: intInter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "intInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Inter_ManDupExpand( Aig_Man_t * pInter, Aig_Man_t * pOther )
{
Aig_Man_t * pInterC;
assert( Aig_ManPiNum(pInter) <= Aig_ManPiNum(pOther) );
pInterC = Aig_ManDupSimple( pInter );
Aig_IthVar( pInterC, Aig_ManPiNum(pOther)-1 );
assert( Aig_ManPiNum(pInterC) == Aig_ManPiNum(pOther) );
return pInterC;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Inter_ManVerifyInterpolant1( Inta_Man_t * pMan, Sto_Man_t * pCnf, Aig_Man_t * pInter )
{
extern Aig_Man_t * Inta_ManDeriveClauses( Inta_Man_t * pMan, Sto_Man_t * pCnf, int fClausesA );
Aig_Man_t * pLower, * pUpper, * pInterC;
int RetValue1, RetValue2;
pLower = Inta_ManDeriveClauses( pMan, pCnf, 1 );
pUpper = Inta_ManDeriveClauses( pMan, pCnf, 0 );
Aig_ManFlipFirstPo( pUpper );
pInterC = Inter_ManDupExpand( pInter, pLower );
RetValue1 = Inter_ManCheckContainment( pLower, pInterC );
Aig_ManStop( pInterC );
pInterC = Inter_ManDupExpand( pInter, pUpper );
RetValue2 = Inter_ManCheckContainment( pInterC, pUpper );
Aig_ManStop( pInterC );
if ( RetValue1 && RetValue2 )
printf( "Im is correct.\n" );
if ( !RetValue1 )
printf( "Property A => Im fails.\n" );
if ( !RetValue2 )
printf( "Property Im => !B fails.\n" );
Aig_ManStop( pLower );
Aig_ManStop( pUpper );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Inter_ManVerifyInterpolant2( Intb_Man_t * pMan, Sto_Man_t * pCnf, Aig_Man_t * pInter )
{
extern Aig_Man_t * Intb_ManDeriveClauses( Intb_Man_t * pMan, Sto_Man_t * pCnf, int fClausesA );
Aig_Man_t * pLower, * pUpper, * pInterC;
int RetValue1, RetValue2;
pLower = Intb_ManDeriveClauses( pMan, pCnf, 1 );
pUpper = Intb_ManDeriveClauses( pMan, pCnf, 0 );
Aig_ManFlipFirstPo( pUpper );
pInterC = Inter_ManDupExpand( pInter, pLower );
//Aig_ManPrintStats( pLower );
//Aig_ManPrintStats( pUpper );
//Aig_ManPrintStats( pInterC );
//Aig_ManDumpBlif( pInterC, "inter_c.blif", NULL, NULL );
RetValue1 = Inter_ManCheckContainment( pLower, pInterC );
Aig_ManStop( pInterC );
pInterC = Inter_ManDupExpand( pInter, pUpper );
RetValue2 = Inter_ManCheckContainment( pInterC, pUpper );
Aig_ManStop( pInterC );
if ( RetValue1 && RetValue2 )
printf( "Ip is correct.\n" );
if ( !RetValue1 )
printf( "Property A => Ip fails.\n" );
if ( !RetValue2 )
printf( "Property Ip => !B fails.\n" );
Aig_ManStop( pLower );
Aig_ManStop( pUpper );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/int/intMan.c 0 → 100644
/**CFile****************************************************************
FileName [intMan.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Interpolation engine.]
Synopsis [Interpolation manager procedures.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 24, 2008.]
Revision [$Id: intMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "intInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Frees the interpolation manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Inter_Man_t * Inter_ManCreate( Aig_Man_t * pAig, Inter_ManParams_t * pPars )
{
Inter_Man_t * p;
// create interpolation manager
p = ALLOC( Inter_Man_t, 1 );
memset( p, 0, sizeof(Inter_Man_t) );
p->vVarsAB = Vec_IntAlloc( Aig_ManRegNum(pAig) );
p->nConfLimit = pPars->nBTLimit;
p->fVerbose = pPars->fVerbose;
p->pAig = pAig;
return p;
}
/**Function*************************************************************
Synopsis [Frees the interpolation manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Inter_ManClean( Inter_Man_t * p )
{
if ( p->pCnfInter )
Cnf_DataFree( p->pCnfInter );
if ( p->pCnfFrames )
Cnf_DataFree( p->pCnfFrames );
if ( p->pInter )
Aig_ManStop( p->pInter );
if ( p->pFrames )
Aig_ManStop( p->pFrames );
}
/**Function*************************************************************
Synopsis [Frees the interpolation manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Inter_ManStop( Inter_Man_t * p )
{
if ( p->fVerbose )
{
p->timeOther = p->timeTotal-p->timeRwr-p->timeCnf-p->timeSat-p->timeInt-p->timeEqu;
printf( "Runtime statistics:\n" );
PRTP( "Rewriting ", p->timeRwr, p->timeTotal );
PRTP( "CNF mapping", p->timeCnf, p->timeTotal );
PRTP( "SAT solving", p->timeSat, p->timeTotal );
PRTP( "Interpol ", p->timeInt, p->timeTotal );
PRTP( "Containment", p->timeEqu, p->timeTotal );
PRTP( "Other ", p->timeOther, p->timeTotal );
PRTP( "TOTAL ", p->timeTotal, p->timeTotal );
}
if ( p->pCnfAig )
Cnf_DataFree( p->pCnfAig );
if ( p->pCnfFrames )
Cnf_DataFree( p->pCnfFrames );
if ( p->pCnfInter )
Cnf_DataFree( p->pCnfInter );
Vec_IntFree( p->vVarsAB );
if ( p->pAigTrans )
Aig_ManStop( p->pAigTrans );
if ( p->pFrames )
Aig_ManStop( p->pFrames );
if ( p->pInter )
Aig_ManStop( p->pInter );
if ( p->pInterNew )
Aig_ManStop( p->pInterNew );
free( p );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/int/intUtil.c 0 → 100644
/**CFile****************************************************************
FileName [intUtil.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Interpolation engine.]
Synopsis [Various interpolation utilities.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 24, 2008.]
Revision [$Id: intUtil.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "intInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Returns 1 if the property fails in the initial state.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Inter_ManCheckInitialState( Aig_Man_t * p )
{
Cnf_Dat_t * pCnf;
sat_solver * pSat;
int status;
int clk = clock();
pCnf = Cnf_Derive( p, Saig_ManRegNum(p) );
pSat = Cnf_DataWriteIntoSolver( pCnf, 1, 1 );
Cnf_DataFree( pCnf );
if ( pSat == NULL )
return 0;
status = sat_solver_solve( pSat, NULL, NULL, (sint64)0, (sint64)0, (sint64)0, (sint64)0 );
sat_solver_delete( pSat );
PRT( "Time", clock() - clk );
return status == l_True;
}
/**Function*************************************************************
Synopsis [Returns 1 if the property holds in all states.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Inter_ManCheckAllStates( Aig_Man_t * p )
{
Cnf_Dat_t * pCnf;
sat_solver * pSat;
int status;
int clk = clock();
pCnf = Cnf_Derive( p, Saig_ManRegNum(p) );
pSat = Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
Cnf_DataFree( pCnf );
if ( pSat == NULL )
return 1;
status = sat_solver_solve( pSat, NULL, NULL, (sint64)0, (sint64)0, (sint64)0, (sint64)0 );
sat_solver_delete( pSat );
PRT( "Time", clock() - clk );
return status == l_False;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/int/module.make 0 → 100644
SRC += src/aig/int/intContain.c \
src/aig/int/intCore.c \
src/aig/int/intDup.c \
src/aig/int/intFrames.c \
src/aig/int/intInter.c \
src/aig/int/intM114.c \
src/aig/int/intM114p.c \
src/aig/int/intMan.c \
src/aig/int/intUtil.c
src/aig/ntl/ntlExtract.c
......@@ -803,8 +803,8 @@ Nwk_Man_t * Ntl_ManExtractNwk( Ntl_Man_t * p, Aig_Man_t * pAig, Tim_Man_t * pMan
pNtk->pManTime = Tim_ManDup( pManTime, 0 );
else
pNtk->pManTime = Tim_ManDup( p->pManTime, 0 );
// Nwk_ManRemoveDupFanins( pNtk, 0 );
// assert( Nwk_ManCheck( pNtk ) );
Nwk_ManRemoveDupFanins( pNtk, 0 );
assert( Nwk_ManCheck( pNtk ) );
return pNtk;
}
......
src/aig/ntl/ntlFraig.c
......@@ -145,13 +145,20 @@ void Ntl_ManReduce( Ntl_Man_t * p, Aig_Man_t * pAig )
continue;
assert( pObj != pObjRepr );
pNet = pObj->pData;
// do not reduce the net if it is driven by a multi-output box
if ( Ntl_ObjIsBox(pNet->pDriver) && Ntl_ObjFanoutNum(pNet->pDriver) > 1 )
continue;
// do not reduce the net if it has no-merge attribute
if ( Ntl_ObjIsBox(pNet->pDriver) && pNet->pDriver->pImplem->attrNoMerge )
continue;
pNetRepr = pObjRepr->pData;
// consider special cases, when the net should not be reduced
if ( Ntl_ObjIsBox(pNet->pDriver) )
{
// do not reduce the net if it is driven by a multi-output box
if ( Ntl_ObjFanoutNum(pNet->pDriver) > 1 )
continue;
// do not reduce the net if it has no-merge attribute
if ( pNet->pDriver->pImplem->attrNoMerge )
continue;
// do not reduce the net if the replacement net has no-merge attribute
if ( pNetRepr != NULL && pNetRepr->pDriver->pImplem->attrNoMerge )
continue;
}
if ( pNetRepr == NULL )
{
// this is the constant node
......
src/aig/saig/module.make
SRC += src/aig/saig/saigBmc.c \
src/aig/saig/saigCone.c \
src/aig/saig/saigHaig.c \
src/aig/saig/saigInter.c \
src/aig/saig/saigIoa.c \
src/aig/saig/saigMiter.c \
src/aig/saig/saigPhase.c \
......@@ -9,5 +8,4 @@ SRC += src/aig/saig/saigBmc.c \
src/aig/saig/saigRetMin.c \
src/aig/saig/saigRetStep.c \
src/aig/saig/saigScl.c \
src/aig/saig/saigTrans.c \
src/aig/saig/saigUnique.c
src/aig/saig/saigTrans.c
src/aig/saig/saig.h
......@@ -30,6 +30,7 @@ extern "C" {
////////////////////////////////////////////////////////////////////////
#include "aig.h"
#include "int.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
......@@ -85,7 +86,7 @@ extern Aig_Man_t * Saig_ManHaigRecord( Aig_Man_t * p, int nIters, int nSte
extern void Saig_ManDumpBlif( Aig_Man_t * p, char * pFileName );
extern Aig_Man_t * Saig_ManReadBlif( char * pFileName );
/*=== saigInter.c ==========================================================*/
extern int Saig_Interpolate( Aig_Man_t * pAig, int nConfLimit, int nFramesMax, int fRewrite, int fTransLoop, int fUsePudlak, int fUseOther, int fUseMiniSat, int fCheckInd, int fCheckKstep, int fVerbose, int * pDepth );
extern int Saig_Interpolate( Aig_Man_t * pAig, Inter_ManParams_t * pPars, int * pDepth );
/*=== saigMiter.c ==========================================================*/
extern Aig_Man_t * Saig_ManCreateMiter( Aig_Man_t * p1, Aig_Man_t * p2, int Oper );
/*=== saigPhase.c ==========================================================*/
......
src/base/abc/abc.h
......@@ -748,7 +748,7 @@ extern ABC_DLL bool Abc_NodeIsBuf( Abc_Obj_t * pNode );
extern ABC_DLL bool Abc_NodeIsInv( Abc_Obj_t * pNode );
extern ABC_DLL void Abc_NodeComplement( Abc_Obj_t * pNode );
/*=== abcPrint.c ==========================================================*/
extern ABC_DLL void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored, int fSaveBest, int fDumpResult, int fUseLutLib );
extern ABC_DLL void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored, int fSaveBest, int fDumpResult, int fUseLutLib, int fPrintMuxes );
extern ABC_DLL void Abc_NtkPrintIo( FILE * pFile, Abc_Ntk_t * pNtk );
extern ABC_DLL void Abc_NtkPrintLatch( FILE * pFile, Abc_Ntk_t * pNtk );
extern ABC_DLL void Abc_NtkPrintFanio( FILE * pFile, Abc_Ntk_t * pNtk );
......
src/base/abc/abcUtil.c
......@@ -933,9 +933,9 @@ bool Abc_NodeIsMuxType( Abc_Obj_t * pNode )
pNode0 = Abc_ObjFanin0(pNode);
pNode1 = Abc_ObjFanin1(pNode);
// if the children are not ANDs, this is not MUX
if ( Abc_ObjFaninNum(pNode0) != 2 || Abc_ObjFaninNum(pNode1) != 2 )
if ( !Abc_AigNodeIsAnd(pNode0) || !Abc_AigNodeIsAnd(pNode1) )
return 0;
// otherwise the node is MUX iff it has a pair of equal grandchildren
// otherwise the node is MUX iff it has a pair of equal grandchildren with opposite polarity
return (Abc_ObjFaninId0(pNode0) == Abc_ObjFaninId0(pNode1) && (Abc_ObjFaninC0(pNode0) ^ Abc_ObjFaninC0(pNode1))) ||
(Abc_ObjFaninId0(pNode0) == Abc_ObjFaninId1(pNode1) && (Abc_ObjFaninC0(pNode0) ^ Abc_ObjFaninC1(pNode1))) ||
(Abc_ObjFaninId1(pNode0) == Abc_ObjFaninId0(pNode1) && (Abc_ObjFaninC1(pNode0) ^ Abc_ObjFaninC0(pNode1))) ||
......@@ -944,6 +944,27 @@ bool Abc_NodeIsMuxType( Abc_Obj_t * pNode )
/**Function*************************************************************
Synopsis [Returns 1 if the node is the root of MUX or EXOR/NEXOR.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkCountMuxes( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
int i;
int Counter = 0;
Abc_NtkForEachNode( pNtk, pNode, i )
Counter += Abc_NodeIsMuxType( pNode );
return Counter;
}
/**Function*************************************************************
Synopsis [Returns 1 if the node is the control type of the MUX.]
Description []
......
src/base/abci/abcDar.c
......@@ -25,6 +25,7 @@
#include "cnf.h"
#include "fra.h"
#include "fraig.h"
#include "int.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
......@@ -1295,7 +1296,7 @@ PRT( "Time", clock() - clk );
SeeAlso []
***********************************************************************/
int Abc_NtkDarBmcInter( Abc_Ntk_t * pNtk, int nConfLimit, int nFramesMax, int fRewrite, int fTransLoop, int fUsePudlak, int fUseOther, int fUseMiniSat, int fCheckInd, int fCheckKstep, int fVerbose )
int Abc_NtkDarBmcInter( Abc_Ntk_t * pNtk, Inter_ManParams_t * pPars )
{
Aig_Man_t * pMan;
int RetValue, Depth, clk = clock();
......@@ -1307,7 +1308,7 @@ int Abc_NtkDarBmcInter( Abc_Ntk_t * pNtk, int nConfLimit, int nFramesMax, int fR
return -1;
}
assert( pMan->nRegs > 0 );
RetValue = Saig_Interpolate( pMan, nConfLimit, nFramesMax, fRewrite, fTransLoop, fUsePudlak, fUseOther, fUseMiniSat, fCheckInd, fCheckKstep, fVerbose, &Depth );
RetValue = Inter_ManPerformInterpolation( pMan, pPars, &Depth );
if ( RetValue == 1 )
printf( "Property proved. " );
else if ( RetValue == 0 )
......
src/base/abci/abcPrint.c
......@@ -111,7 +111,7 @@ int Abc_NtkCompareAndSaveBest( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored, int fSaveBest, int fDumpResult, int fUseLutLib )
void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored, int fSaveBest, int fDumpResult, int fUseLutLib, int fPrintMuxes )
{
int Num;
......@@ -153,6 +153,12 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored, int fSave
// fprintf( pFile, " (mux = %d)", Num2-Num );
// if ( Num2 )
// fprintf( pFile, " (other = %d)", Abc_NtkNodeNum(pNtk)-3*Num2 );
if ( fPrintMuxes )
{
extern int Abc_NtkCountMuxes( Abc_Ntk_t * pNtk );
fprintf( pFile, " (mux = %d)", Abc_NtkCountMuxes(pNtk)-Num );
fprintf( pFile, " (pure and = %d)", Abc_NtkNodeNum(pNtk) - (Abc_NtkCountMuxes(pNtk) * 3) );
}
}
else
{
......
src/base/io/ioWriteDot.c
......@@ -275,6 +275,12 @@ void Io_WriteDotNtk( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes, Vec_Ptr_t * vNodesSho
fprintf( pFile, " Level%d;\n", Level );
Vec_PtrForEachEntry( vNodes, pNode, i )
{
if ( (int)pNode->Level != Level )
continue;
if ( Abc_ObjFaninNum(pNode) == 0 )
continue;
/*
int SuppSize;
Vec_Ptr_t * vSupp;
if ( (int)pNode->Level != Level )
......@@ -284,6 +290,7 @@ void Io_WriteDotNtk( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes, Vec_Ptr_t * vNodesSho
vSupp = Abc_NtkNodeSupport( pNtk, &pNode, 1 );
SuppSize = Vec_PtrSize( vSupp );
Vec_PtrFree( vSupp );
*/
// fprintf( pFile, " Node%d [label = \"%d\"", pNode->Id, pNode->Id );
if ( Abc_NtkIsStrash(pNtk) )
......@@ -294,10 +301,10 @@ void Io_WriteDotNtk( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes, Vec_Ptr_t * vNodesSho
pSopString = Abc_NtkPrintSop(Mio_GateReadSop(pNode->pData));
else
pSopString = Abc_NtkPrintSop(pNode->pData);
// fprintf( pFile, " Node%d [label = \"%d\\n%s\"", pNode->Id, pNode->Id, pSopString );
fprintf( pFile, " Node%d [label = \"%d\\n%s\"", pNode->Id,
SuppSize,
pSopString );
fprintf( pFile, " Node%d [label = \"%d\\n%s\"", pNode->Id, pNode->Id, pSopString );
// fprintf( pFile, " Node%d [label = \"%d\\n%s\"", pNode->Id,
// SuppSize,
// pSopString );
fprintf( pFile, ", shape = ellipse" );
if ( pNode->fMarkB )
......
src/map/mapper/mapperTree.c
......@@ -34,7 +34,7 @@ static int Map_LibraryGetMaxSuperPi_rec( Map_Super_t * pGate );
static unsigned Map_LibraryGetGateSupp_rec( Map_Super_t * pGate );
// fanout limits
static const int s_MapFanoutLimits[10] = { 1/*0*/, 10/*1*/, 5/*2*/, 2/*3*/, 1/*4*/, 1/*5*/, 1/*6*/ };
extern const int s_MapFanoutLimits[10] = { 1/*0*/, 10/*1*/, 5/*2*/, 2/*3*/, 1/*4*/, 1/*5*/, 1/*6*/ };
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......@@ -124,7 +124,14 @@ int Map_LibraryReadFileTree( Map_SuperLib_t * pLib, FILE * pFile, char *pFileNam
// get the genlib file name (base)
pLibName = strtok( pTemp, " \t\r\n" );
#ifdef __linux__
if( strchr( pLibName, '/' ) != NULL )
pLibName = strrchr( pLibName, '/' ) + 1;
#else
if( strchr( pLibName, '\\' ) != NULL )
pLibName = strrchr( pLibName, '\\' ) + 1;
#endif
if ( strcmp( pLibName, "GATE" ) == 0 )
{
printf( "The input file \"%s\" looks like a GENLIB file and not a supergate library file.\n", pLib->pName );
......@@ -145,7 +152,7 @@ int Map_LibraryReadFileTree( Map_SuperLib_t * pLib, FILE * pFile, char *pFileNam
if ( pStr == pLibFile )
strcpy( pLibFile, pLibName );
else
sprintf( pStr, "/%s", pLibName );
sprintf( pStr, "\\%s", pLibName );
}
#endif
......
src/sat/bsat/satSolver.c
......@@ -226,7 +226,8 @@ static inline void act_var_rescale(sat_solver* s) {
}
static inline void act_var_bump(sat_solver* s, int v) {
s->activity[v] += s->var_inc;
// s->activity[v] += s->var_inc;
s->activity[v] += (s->pGlobalVars? 3.0 : 1.0) * s->var_inc;
if (s->activity[v] > 1e100)
act_var_rescale(s);
//printf("bump %d %f\n", v-1, activity[v]);
......@@ -243,6 +244,15 @@ static inline void act_var_bump_factor(sat_solver* s, int v) {
order_update(s,v);
}
static inline void act_var_bump_global(sat_solver* s, int v) {
s->activity[v] += (s->var_inc * 3.0 * s->pGlobalVars[v]);
if (s->activity[v] > 1e100)
act_var_rescale(s);
//printf("bump %d %f\n", v-1, activity[v]);
if (s->orderpos[v] != -1)
order_update(s,v);
}
static inline void act_var_decay(sat_solver* s) { s->var_inc *= s->var_decay; }
static inline void act_clause_rescale(sat_solver* s) {
......@@ -845,6 +855,11 @@ static lbool sat_solver_search(sat_solver* s, sint64 nof_conflicts, sint64 nof_l
for ( i = 0; i < s->act_vars.size; i++ )
act_var_bump_factor(s, s->act_vars.ptr[i]);
// use activity factors in every restart
if ( s->pGlobalVars && veci_size(&s->act_vars) > 0 )
for ( i = 0; i < s->act_vars.size; i++ )
act_var_bump_global(s, s->act_vars.ptr[i]);
for (;;){
clause* confl = sat_solver_propagate(s);
if (confl != 0){
......
src/sat/bsat/satSolver.h
......@@ -180,6 +180,7 @@ struct sat_solver_t
int fSkipSimplify; // set to one to skip simplification of the clause database
int * pGlobalVars; // for experiments with global vars during interpolation
// clause store
void * pStore;
int fSolved;
......
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